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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: lvivier@redhat.com, aik@ozlabs.ru, qemu-devel@nongnu.org,
	Daniel Black <daniel@linux.ibm.com>,
	groug@kaod.org, qemu-ppc@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 01/42] spapr: quantify error messages regarding capability settings
Date: Wed, 21 Aug 2019 17:25:01 +1000	[thread overview]
Message-ID: <20190821072542.23090-2-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20190821072542.23090-1-david@gibson.dropbear.id.au>

From: Daniel Black <daniel@linux.ibm.com>

Its not immediately obvious how cap-X=Y setting need to be applied
to the command line so, for spapr capability error messages, this
has been clarified to:

 appending -machine cap-X=Y

The wrong value messages have been left as is, as the user has found
the right location.

Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Daniel Black <daniel@linux.ibm.com>
Message-Id: <20190812071044.30806-1-daniel@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/ppc/spapr_caps.c | 42 ++++++++++++++++++++++++++++--------------
 1 file changed, 28 insertions(+), 14 deletions(-)

diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
index 7830d66d77..a61bf329bf 100644
--- a/hw/ppc/spapr_caps.c
+++ b/hw/ppc/spapr_caps.c
@@ -195,10 +195,12 @@ static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
     }
     if (tcg_enabled()) {
         error_setg(errp,
-                   "No Transactional Memory support in TCG, try cap-htm=off");
+                   "No Transactional Memory support in TCG,"
+                   " try appending -machine cap-htm=off");
     } else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
         error_setg(errp,
-"KVM implementation does not support Transactional Memory, try cap-htm=off"
+"KVM implementation does not support Transactional Memory,"
+                   " try appending -machine cap-htm=off"
             );
     }
 }
@@ -216,7 +218,8 @@ static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
      * rid of anything that doesn't do VMX */
     g_assert(env->insns_flags & PPC_ALTIVEC);
     if (!(env->insns_flags2 & PPC2_VSX)) {
-        error_setg(errp, "VSX support not available, try cap-vsx=off");
+        error_setg(errp, "VSX support not available,"
+                   " try appending -machine cap-vsx=off");
     }
 }
 
@@ -230,7 +233,8 @@ static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
         return;
     }
     if (!(env->insns_flags2 & PPC2_DFP)) {
-        error_setg(errp, "DFP support not available, try cap-dfp=off");
+        error_setg(errp, "DFP support not available,"
+                   " try appending -machine cap-dfp=off");
     }
 }
 
@@ -254,7 +258,8 @@ static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val,
                    cap_cfpc_possible.vals[val]);
     } else if (kvm_enabled() && (val > kvm_val)) {
         error_setg(errp,
-"Requested safe cache capability level not supported by kvm, try cap-cfpc=%s",
+                   "Requested safe cache capability level not supported by kvm,"
+                   " try appending -machine cap-cfpc=%s",
                    cap_cfpc_possible.vals[kvm_val]);
     }
 
@@ -282,7 +287,8 @@ static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val,
                    cap_sbbc_possible.vals[val]);
     } else if (kvm_enabled() && (val > kvm_val)) {
         error_setg(errp,
-"Requested safe bounds check capability level not supported by kvm, try cap-sbbc=%s",
+"Requested safe bounds check capability level not supported by kvm,"
+                   " try appending -machine cap-sbbc=%s",
                    cap_sbbc_possible.vals[kvm_val]);
     }
 
@@ -313,7 +319,8 @@ static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr,
                    cap_ibs_possible.vals[val]);
     } else if (kvm_enabled() && (val > kvm_val)) {
         error_setg(errp,
-"Requested safe indirect branch capability level not supported by kvm, try cap-ibs=%s",
+"Requested safe indirect branch capability level not supported by kvm,"
+                   " try appending -machine cap-ibs=%s",
                    cap_ibs_possible.vals[kvm_val]);
     }
 
@@ -402,11 +409,13 @@ static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr,
 
     if (tcg_enabled()) {
         error_setg(errp,
-                   "No Nested KVM-HV support in tcg, try cap-nested-hv=off");
+                   "No Nested KVM-HV support in tcg,"
+                   " try appending -machine cap-nested-hv=off");
     } else if (kvm_enabled()) {
         if (!kvmppc_has_cap_nested_kvm_hv()) {
             error_setg(errp,
-"KVM implementation does not support Nested KVM-HV, try cap-nested-hv=off");
+"KVM implementation does not support Nested KVM-HV,"
+                       " try appending -machine cap-nested-hv=off");
         } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) {
                 error_setg(errp,
 "Error enabling cap-nested-hv with KVM, try cap-nested-hv=off");
@@ -436,10 +445,12 @@ static void cap_large_decr_apply(SpaprMachineState *spapr,
 
         if (!kvm_nr_bits) {
             error_setg(errp,
-                       "No large decrementer support, try cap-large-decr=off");
+                       "No large decrementer support,"
+                        " try appending -machine cap-large-decr=off");
         } else if (pcc->lrg_decr_bits != kvm_nr_bits) {
             error_setg(errp,
-"KVM large decrementer size (%d) differs to model (%d), try -cap-large-decr=off",
+"KVM large decrementer size (%d) differs to model (%d),"
+                " try appending -machine cap-large-decr=off",
                 kvm_nr_bits, pcc->lrg_decr_bits);
         }
     }
@@ -455,7 +466,8 @@ static void cap_large_decr_cpu_apply(SpaprMachineState *spapr,
     if (kvm_enabled()) {
         if (kvmppc_enable_cap_large_decr(cpu, val)) {
             error_setg(errp,
-                       "No large decrementer support, try cap-large-decr=off");
+                       "No large decrementer support,"
+                       " try appending -machine cap-large-decr=off");
         }
     }
 
@@ -475,10 +487,12 @@ static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val,
     if (tcg_enabled() && val) {
         /* TODO - for now only allow broken for TCG */
         error_setg(errp,
-"Requested count cache flush assist capability level not supported by tcg, try cap-ccf-assist=off");
+"Requested count cache flush assist capability level not supported by tcg,"
+                   " try appending -machine cap-ccf-assist=off");
     } else if (kvm_enabled() && (val > kvm_val)) {
         error_setg(errp,
-"Requested count cache flush assist capability level not supported by kvm, try cap-ccf-assist=off");
+"Requested count cache flush assist capability level not supported by kvm,"
+                   " try appending -machine cap-ccf-assist=off");
     }
 }
 
-- 
2.21.0



  reply	other threads:[~2019-08-21  7:27 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-21  7:25 [Qemu-devel] [PULL 00/42] ppc-for-4.2 queue 20190821 David Gibson
2019-08-21  7:25 ` David Gibson [this message]
2019-08-21  7:25 ` [Qemu-devel] [PULL 02/42] spapr_iommu: Fix xlate trace to print translated address David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 03/42] hw: add compat machines for 4.2 David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 04/42] spapr_pci: Allow 2MiB and 16MiB IOMMU pagesizes by default David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 05/42] migration: Do not re-read the clock on pre_save in case of paused guest David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 06/42] target/ppc: Optimize emulation of lvsl and lvsr instructions David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 07/42] target/ppc: Optimize emulation of vsl and vsr instructions David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 08/42] target/ppc: move opcode decode tables to PowerPCCPU David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 09/42] target/ppc: Optimize emulation of vgbbd instruction David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 10/42] target/ppc: Optimize emulation of vclzd instruction David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 11/42] target/ppc: Optimize emulation of vclzw instruction David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 12/42] ppc: fix memory leak in spapr_caps_add_properties David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 13/42] ppc: fix memory leak in spapr_dt_drc() David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 14/42] ppc: fix leak in h_client_architecture_support David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 15/42] spapr: Implement dispatch tracking for tcg David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 16/42] spapr: Implement H_PROD David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 17/42] spapr: Implement H_CONFER David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 18/42] spapr: Implement H_JOIN David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 19/42] docs/specs: initial spec summary for Ultravisor-related hcalls David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 20/42] spapr: initial implementation for H_TPM_COMM/spapr-tpm-proxy David Gibson
2019-09-09 17:23   ` Peter Maydell
2019-09-09 17:51     ` Greg Kurz
2019-08-21  7:25 ` [Qemu-devel] [PULL 21/42] pseries: Update SLOF firmware image David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 22/42] ppc/xive: use an abstract type for XiveNotifier David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 23/42] ppc/xive: Implement TM_PULL_OS_CTX special command David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 24/42] ppc/xive: Provide backlog support David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 25/42] ppc/xive: Provide escalation support David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 26/42] ppc/xive: Provide unconditional " David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 27/42] ppc/xive: Provide silent " David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 28/42] ppc/xive: Improve 'info pic' support David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 29/42] machine: Add wakeup method to MachineClass David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 30/42] i386: use machine class ->wakeup method David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 31/42] spapr: Implement ibm,suspend-me David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 32/42] ppc: remove idle_timer logic David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 33/42] spapr/pci: Consolidate de-allocation of MSIs David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 34/42] spapr/pci: Free MSIs during reset David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 35/42] spapr/irq: Drop spapr_irq_msi_reset() David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 36/42] spapr: Implement better workaround in spapr-vty device David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 37/42] spapr/xive: Mask the EAS when allocating an IRQ David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 38/42] target/ppc: Add Directed Privileged Door-bell Exception State (DPDES) SPR David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 39/42] ppc: Add support for 'mffsl' instruction David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 40/42] ppc: conform to processor User's Manual for xscvdpspn David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 41/42] ppc: Fix emulated INFINITY and NAN conversions David Gibson
2019-08-21  7:25 ` [Qemu-devel] [PULL 42/42] ppc: Fix emulated single to double denormalized conversions David Gibson
2019-08-21  8:25 ` [Qemu-devel] [PULL 00/42] ppc-for-4.2 queue 20190821 no-reply
2019-08-21 14:18 ` Peter Maydell

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