From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v9 09/24] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state
Date: Wed, 23 Oct 2019 11:00:42 -0400 [thread overview]
Message-ID: <20191023150057.25731-10-richard.henderson@linaro.org> (raw)
In-Reply-To: <20191023150057.25731-1-richard.henderson@linaro.org>
We do not need to compute any of these values for M-profile.
Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two
sets must be mutually exclusive.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index ddd21edfcf..e2a62cf19a 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11235,21 +11235,28 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
}
} else {
flags = rebuild_hflags_a32(env, fp_el, mmu_idx);
+
+ /*
+ * Note that XSCALE_CPAR shares bits with VECSTRIDE.
+ * Note that VECLEN+VECSTRIDE are RES0 for M-profile.
+ */
+ if (arm_feature(env, ARM_FEATURE_XSCALE)) {
+ flags = FIELD_DP32(flags, TBFLAG_A32,
+ XSCALE_CPAR, env->cp15.c15_cpar);
+ } else {
+ flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN,
+ env->vfp.vec_len);
+ flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE,
+ env->vfp.vec_stride);
+ }
}
flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
- flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
- flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride);
flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits);
if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)
|| arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
}
- /* Note that XSCALE_CPAR shares bits with VECSTRIDE */
- if (arm_feature(env, ARM_FEATURE_XSCALE)) {
- flags = FIELD_DP32(flags, TBFLAG_A32,
- XSCALE_CPAR, env->cp15.c15_cpar);
- }
}
/* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
--
2.17.1
next prev parent reply other threads:[~2019-10-23 15:22 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-23 15:00 [PATCH v9 00/24] target/arm: Reduce overhead of cpu_get_tb_cpu_state Richard Henderson
2019-10-23 15:00 ` [PATCH v9 01/24] target/arm: Split out rebuild_hflags_common Richard Henderson
2019-10-23 15:00 ` [PATCH v9 02/24] target/arm: Split out rebuild_hflags_a64 Richard Henderson
2019-10-23 15:00 ` [PATCH v9 03/24] target/arm: Split out rebuild_hflags_common_32 Richard Henderson
2019-10-23 15:00 ` [PATCH v9 04/24] target/arm: Split arm_cpu_data_is_big_endian Richard Henderson
2019-10-23 15:00 ` [PATCH v9 05/24] target/arm: Split out rebuild_hflags_m32 Richard Henderson
2019-10-23 15:00 ` [PATCH v9 06/24] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Richard Henderson
2019-10-23 15:00 ` [PATCH v9 07/24] target/arm: Split out rebuild_hflags_a32 Richard Henderson
2019-10-23 15:00 ` [PATCH v9 08/24] target/arm: Split out rebuild_hflags_aprofile Richard Henderson
2019-10-23 15:00 ` Richard Henderson [this message]
2019-10-23 15:00 ` [PATCH v9 10/24] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state Richard Henderson
2019-10-23 15:00 ` [PATCH v9 11/24] target/arm: Hoist computation of TBFLAG_A32.VFPEN Richard Henderson
2019-10-23 15:00 ` [PATCH v9 12/24] target/arm: Add arm_rebuild_hflags Richard Henderson
2019-10-23 15:00 ` [PATCH v9 13/24] target/arm: Split out arm_mmu_idx_el Richard Henderson
2019-10-23 15:00 ` [PATCH v9 14/24] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Richard Henderson
2019-10-23 15:00 ` [PATCH v9 15/24] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Richard Henderson
2019-10-23 15:00 ` [PATCH v9 16/24] target/arm: Rebuild hflags at EL changes Richard Henderson
2019-10-23 15:00 ` [PATCH v9 17/24] target/arm: Rebuild hflags at MSR writes Richard Henderson
2019-10-23 15:00 ` [PATCH v9 18/24] target/arm: Rebuild hflags at CPSR writes Richard Henderson
2019-10-23 15:00 ` [PATCH v9 19/24] target/arm: Rebuild hflags at Xscale SCTLR writes Richard Henderson
2019-10-23 15:00 ` [PATCH v9 20/24] target/arm: Rebuild hflags for M-profile Richard Henderson
2019-10-23 15:00 ` [PATCH v9 21/24] target/arm: Rebuild hflags for M-profile NVIC Richard Henderson
2019-10-23 15:00 ` [PATCH v9 22/24] linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN Richard Henderson
2019-10-23 15:00 ` [PATCH v9 23/24] linux-user/arm: " Richard Henderson
2019-10-23 15:00 ` [PATCH v9 24/24] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Richard Henderson
2019-10-24 11:41 ` [PATCH v9 00/24] target/arm: Reduce overhead of cpu_get_tb_cpu_state Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191023150057.25731-10-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).