* [PATCH 1/5] aspeed/smc: Restore default AHB window mapping at reset
2019-11-14 9:45 [PATCH 0/5] aspeed: AST2600 SMC fixes and tacoma-bmc machine Cédric Le Goater
@ 2019-11-14 9:45 ` Cédric Le Goater
2019-11-18 7:12 ` Joel Stanley
2019-11-14 9:45 ` [PATCH 2/5] aspeed/smc: Do not map disabled segment on the AST2600 Cédric Le Goater
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Cédric Le Goater @ 2019-11-14 9:45 UTC (permalink / raw)
To: Peter Maydell
Cc: Andrew Jeffery, Cédric Le Goater, qemu-arm, Joel Stanley,
qemu-devel
The current model only restores the Segment Register values but leaves
the previous CS mapping behind. Introduce a helper setting the
register value and mapping the region at the requested address. Use
this helper when a Segment register is set and at reset.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ssi/aspeed_smc.c | 32 +++++++++++++++++++++-----------
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index f0c7bbbad302..955ec21852ac 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -475,10 +475,26 @@ static bool aspeed_smc_flash_overlap(const AspeedSMCState *s,
return false;
}
+static void aspeed_smc_flash_set_segment_region(AspeedSMCState *s, int cs,
+ uint64_t regval)
+{
+ AspeedSMCFlash *fl = &s->flashes[cs];
+ AspeedSegments seg;
+
+ s->ctrl->reg_to_segment(s, regval, &seg);
+
+ memory_region_transaction_begin();
+ memory_region_set_size(&fl->mmio, seg.size);
+ memory_region_set_address(&fl->mmio, seg.addr - s->ctrl->flash_window_base);
+ memory_region_set_enabled(&fl->mmio, true);
+ memory_region_transaction_commit();
+
+ s->regs[R_SEG_ADDR0 + cs] = regval;
+}
+
static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
uint64_t new)
{
- AspeedSMCFlash *fl = &s->flashes[cs];
AspeedSegments seg;
s->ctrl->reg_to_segment(s, new, &seg);
@@ -529,13 +545,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
aspeed_smc_flash_overlap(s, &seg, cs);
/* All should be fine now to move the region */
- memory_region_transaction_begin();
- memory_region_set_size(&fl->mmio, seg.size);
- memory_region_set_address(&fl->mmio, seg.addr - s->ctrl->flash_window_base);
- memory_region_set_enabled(&fl->mmio, true);
- memory_region_transaction_commit();
-
- s->regs[R_SEG_ADDR0 + cs] = new;
+ aspeed_smc_flash_set_segment_region(s, cs, new);
}
static uint64_t aspeed_smc_flash_default_read(void *opaque, hwaddr addr,
@@ -897,10 +907,10 @@ static void aspeed_smc_reset(DeviceState *d)
qemu_set_irq(s->cs_lines[i], true);
}
- /* setup default segment register values for all */
+ /* setup the default segment register values and regions for all */
for (i = 0; i < s->ctrl->max_slaves; ++i) {
- s->regs[R_SEG_ADDR0 + i] =
- s->ctrl->segment_to_reg(s, &s->ctrl->segments[i]);
+ aspeed_smc_flash_set_segment_region(s, i,
+ s->ctrl->segment_to_reg(s, &s->ctrl->segments[i]));
}
/* HW strapping flash type for the AST2600 controllers */
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/5] aspeed/smc: Restore default AHB window mapping at reset
2019-11-14 9:45 ` [PATCH 1/5] aspeed/smc: Restore default AHB window mapping at reset Cédric Le Goater
@ 2019-11-18 7:12 ` Joel Stanley
0 siblings, 0 replies; 12+ messages in thread
From: Joel Stanley @ 2019-11-18 7:12 UTC (permalink / raw)
To: Cédric Le Goater
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, QEMU Developers
On Thu, 14 Nov 2019 at 09:46, Cédric Le Goater <clg@kaod.org> wrote:
>
> The current model only restores the Segment Register values but leaves
> the previous CS mapping behind. Introduce a helper setting the
> register value and mapping the region at the requested address. Use
> this helper when a Segment register is set and at reset.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> hw/ssi/aspeed_smc.c | 32 +++++++++++++++++++++-----------
> 1 file changed, 21 insertions(+), 11 deletions(-)
>
> diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> index f0c7bbbad302..955ec21852ac 100644
> --- a/hw/ssi/aspeed_smc.c
> +++ b/hw/ssi/aspeed_smc.c
> @@ -475,10 +475,26 @@ static bool aspeed_smc_flash_overlap(const AspeedSMCState *s,
> return false;
> }
>
> +static void aspeed_smc_flash_set_segment_region(AspeedSMCState *s, int cs,
> + uint64_t regval)
> +{
> + AspeedSMCFlash *fl = &s->flashes[cs];
> + AspeedSegments seg;
> +
> + s->ctrl->reg_to_segment(s, regval, &seg);
> +
> + memory_region_transaction_begin();
> + memory_region_set_size(&fl->mmio, seg.size);
> + memory_region_set_address(&fl->mmio, seg.addr - s->ctrl->flash_window_base);
> + memory_region_set_enabled(&fl->mmio, true);
> + memory_region_transaction_commit();
> +
> + s->regs[R_SEG_ADDR0 + cs] = regval;
> +}
> +
> static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
> uint64_t new)
> {
> - AspeedSMCFlash *fl = &s->flashes[cs];
> AspeedSegments seg;
>
> s->ctrl->reg_to_segment(s, new, &seg);
> @@ -529,13 +545,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
> aspeed_smc_flash_overlap(s, &seg, cs);
>
> /* All should be fine now to move the region */
> - memory_region_transaction_begin();
> - memory_region_set_size(&fl->mmio, seg.size);
> - memory_region_set_address(&fl->mmio, seg.addr - s->ctrl->flash_window_base);
> - memory_region_set_enabled(&fl->mmio, true);
> - memory_region_transaction_commit();
> -
> - s->regs[R_SEG_ADDR0 + cs] = new;
> + aspeed_smc_flash_set_segment_region(s, cs, new);
> }
>
> static uint64_t aspeed_smc_flash_default_read(void *opaque, hwaddr addr,
> @@ -897,10 +907,10 @@ static void aspeed_smc_reset(DeviceState *d)
> qemu_set_irq(s->cs_lines[i], true);
> }
>
> - /* setup default segment register values for all */
> + /* setup the default segment register values and regions for all */
> for (i = 0; i < s->ctrl->max_slaves; ++i) {
> - s->regs[R_SEG_ADDR0 + i] =
> - s->ctrl->segment_to_reg(s, &s->ctrl->segments[i]);
> + aspeed_smc_flash_set_segment_region(s, i,
> + s->ctrl->segment_to_reg(s, &s->ctrl->segments[i]));
> }
>
> /* HW strapping flash type for the AST2600 controllers */
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/5] aspeed/smc: Do not map disabled segment on the AST2600
2019-11-14 9:45 [PATCH 0/5] aspeed: AST2600 SMC fixes and tacoma-bmc machine Cédric Le Goater
2019-11-14 9:45 ` [PATCH 1/5] aspeed/smc: Restore default AHB window mapping at reset Cédric Le Goater
@ 2019-11-14 9:45 ` Cédric Le Goater
2019-11-18 7:13 ` Joel Stanley
2019-11-14 9:45 ` [PATCH 3/5] aspeed/smc: Add AST2600 timings registers Cédric Le Goater
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Cédric Le Goater @ 2019-11-14 9:45 UTC (permalink / raw)
To: Peter Maydell
Cc: Andrew Jeffery, Cédric Le Goater, qemu-arm, Joel Stanley,
qemu-devel
The segments can be disabled on the AST2600 (zero register value).
CS0 is open by default but not the other CS. This is closing the
access to the flash device in user mode and forbids scanning.
In the model, check the segment size and disable the associated region
when the value is zero.
Fixes: bcaa8ddd081c ("aspeed/smc: Add AST2600 support")
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ssi/aspeed_smc.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 955ec21852ac..86cadbe4cc00 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -444,8 +444,13 @@ static void aspeed_2600_smc_reg_to_segment(const AspeedSMCState *s,
uint32_t start_offset = (reg << 16) & AST2600_SEG_ADDR_MASK;
uint32_t end_offset = reg & AST2600_SEG_ADDR_MASK;
- seg->addr = s->ctrl->flash_window_base + start_offset;
- seg->size = end_offset + MiB - start_offset;
+ if (reg) {
+ seg->addr = s->ctrl->flash_window_base + start_offset;
+ seg->size = end_offset + MiB - start_offset;
+ } else {
+ seg->addr = s->ctrl->flash_window_base;
+ seg->size = 0;
+ }
}
static bool aspeed_smc_flash_overlap(const AspeedSMCState *s,
@@ -486,7 +491,7 @@ static void aspeed_smc_flash_set_segment_region(AspeedSMCState *s, int cs,
memory_region_transaction_begin();
memory_region_set_size(&fl->mmio, seg.size);
memory_region_set_address(&fl->mmio, seg.addr - s->ctrl->flash_window_base);
- memory_region_set_enabled(&fl->mmio, true);
+ memory_region_set_enabled(&fl->mmio, !!seg.size);
memory_region_transaction_commit();
s->regs[R_SEG_ADDR0 + cs] = regval;
@@ -526,8 +531,9 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
}
/* Keep the segment in the overall flash window */
- if (seg.addr + seg.size <= s->ctrl->flash_window_base ||
- seg.addr > s->ctrl->flash_window_base + s->ctrl->flash_window_size) {
+ if (seg.size &&
+ (seg.addr + seg.size <= s->ctrl->flash_window_base ||
+ seg.addr > s->ctrl->flash_window_base + s->ctrl->flash_window_size)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: new segment for CS%d is invalid : "
"[ 0x%"HWADDR_PRIx" - 0x%"HWADDR_PRIx" ]\n",
s->ctrl->name, cs, seg.addr, seg.addr + seg.size);
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/5] aspeed/smc: Do not map disabled segment on the AST2600
2019-11-14 9:45 ` [PATCH 2/5] aspeed/smc: Do not map disabled segment on the AST2600 Cédric Le Goater
@ 2019-11-18 7:13 ` Joel Stanley
0 siblings, 0 replies; 12+ messages in thread
From: Joel Stanley @ 2019-11-18 7:13 UTC (permalink / raw)
To: Cédric Le Goater
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, QEMU Developers
On Thu, 14 Nov 2019 at 09:46, Cédric Le Goater <clg@kaod.org> wrote:
>
> The segments can be disabled on the AST2600 (zero register value).
> CS0 is open by default but not the other CS. This is closing the
> access to the flash device in user mode and forbids scanning.
>
> In the model, check the segment size and disable the associated region
> when the value is zero.
>
> Fixes: bcaa8ddd081c ("aspeed/smc: Add AST2600 support")
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> hw/ssi/aspeed_smc.c | 16 +++++++++++-----
> 1 file changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> index 955ec21852ac..86cadbe4cc00 100644
> --- a/hw/ssi/aspeed_smc.c
> +++ b/hw/ssi/aspeed_smc.c
> @@ -444,8 +444,13 @@ static void aspeed_2600_smc_reg_to_segment(const AspeedSMCState *s,
> uint32_t start_offset = (reg << 16) & AST2600_SEG_ADDR_MASK;
> uint32_t end_offset = reg & AST2600_SEG_ADDR_MASK;
>
> - seg->addr = s->ctrl->flash_window_base + start_offset;
> - seg->size = end_offset + MiB - start_offset;
> + if (reg) {
> + seg->addr = s->ctrl->flash_window_base + start_offset;
> + seg->size = end_offset + MiB - start_offset;
> + } else {
> + seg->addr = s->ctrl->flash_window_base;
> + seg->size = 0;
> + }
> }
>
> static bool aspeed_smc_flash_overlap(const AspeedSMCState *s,
> @@ -486,7 +491,7 @@ static void aspeed_smc_flash_set_segment_region(AspeedSMCState *s, int cs,
> memory_region_transaction_begin();
> memory_region_set_size(&fl->mmio, seg.size);
> memory_region_set_address(&fl->mmio, seg.addr - s->ctrl->flash_window_base);
> - memory_region_set_enabled(&fl->mmio, true);
> + memory_region_set_enabled(&fl->mmio, !!seg.size);
> memory_region_transaction_commit();
>
> s->regs[R_SEG_ADDR0 + cs] = regval;
> @@ -526,8 +531,9 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
> }
>
> /* Keep the segment in the overall flash window */
> - if (seg.addr + seg.size <= s->ctrl->flash_window_base ||
> - seg.addr > s->ctrl->flash_window_base + s->ctrl->flash_window_size) {
> + if (seg.size &&
> + (seg.addr + seg.size <= s->ctrl->flash_window_base ||
> + seg.addr > s->ctrl->flash_window_base + s->ctrl->flash_window_size)) {
> qemu_log_mask(LOG_GUEST_ERROR, "%s: new segment for CS%d is invalid : "
> "[ 0x%"HWADDR_PRIx" - 0x%"HWADDR_PRIx" ]\n",
> s->ctrl->name, cs, seg.addr, seg.addr + seg.size);
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/5] aspeed/smc: Add AST2600 timings registers
2019-11-14 9:45 [PATCH 0/5] aspeed: AST2600 SMC fixes and tacoma-bmc machine Cédric Le Goater
2019-11-14 9:45 ` [PATCH 1/5] aspeed/smc: Restore default AHB window mapping at reset Cédric Le Goater
2019-11-14 9:45 ` [PATCH 2/5] aspeed/smc: Do not map disabled segment on the AST2600 Cédric Le Goater
@ 2019-11-14 9:45 ` Cédric Le Goater
2019-11-18 7:15 ` Joel Stanley
2019-11-14 9:45 ` [PATCH 4/5] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass Cédric Le Goater
2019-11-14 9:45 ` [PATCH 5/5] aspeed: Add support for the tacoma-bmc board Cédric Le Goater
4 siblings, 1 reply; 12+ messages in thread
From: Cédric Le Goater @ 2019-11-14 9:45 UTC (permalink / raw)
To: Peter Maydell
Cc: Andrew Jeffery, Cédric Le Goater, qemu-arm, Joel Stanley,
qemu-devel
Each CS has its own Read Timing Compensation Register on newer SoCs.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/ssi/aspeed_smc.h | 1 +
hw/ssi/aspeed_smc.c | 17 ++++++++++++++---
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 684d16e33613..6fbbb238f158 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -40,6 +40,7 @@ typedef struct AspeedSMCController {
uint8_t r_ce_ctrl;
uint8_t r_ctrl0;
uint8_t r_timings;
+ uint8_t nregs_timings;
uint8_t conf_enable_w0;
uint8_t max_slaves;
const AspeedSegments *segments;
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 86cadbe4cc00..7755eca34976 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -137,7 +137,7 @@
/* Checksum Calculation Result */
#define R_DMA_CHECKSUM (0x90 / 4)
-/* Misc Control Register #2 */
+/* Read Timing Compensation Register */
#define R_TIMINGS (0x94 / 4)
/* SPI controller registers and bits (AST2400) */
@@ -256,6 +256,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
+ .nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 5,
.segments = aspeed_segments_legacy,
@@ -271,6 +272,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
+ .nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 5,
.segments = aspeed_segments_fmc,
@@ -288,6 +290,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = 0xff,
.r_ctrl0 = R_SPI_CTRL0,
.r_timings = R_SPI_TIMINGS,
+ .nregs_timings = 1,
.conf_enable_w0 = SPI_CONF_ENABLE_W0,
.max_slaves = 1,
.segments = aspeed_segments_spi,
@@ -303,6 +306,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
+ .nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 3,
.segments = aspeed_segments_ast2500_fmc,
@@ -320,6 +324,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
+ .nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 2,
.segments = aspeed_segments_ast2500_spi1,
@@ -335,6 +340,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
+ .nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 2,
.segments = aspeed_segments_ast2500_spi2,
@@ -350,6 +356,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
+ .nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 3,
.segments = aspeed_segments_ast2600_fmc,
@@ -365,6 +372,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
+ .nregs_timings = 2,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 2,
.segments = aspeed_segments_ast2600_spi1,
@@ -380,6 +388,7 @@ static const AspeedSMCController controllers[] = {
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
+ .nregs_timings = 3,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 3,
.segments = aspeed_segments_ast2600_spi2,
@@ -951,7 +960,8 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size)
addr >>= 2;
if (addr == s->r_conf ||
- addr == s->r_timings ||
+ (addr >= s->r_timings &&
+ addr < s->r_timings + s->ctrl->nregs_timings) ||
addr == s->r_ce_ctrl ||
addr == R_INTR_CTRL ||
addr == R_DUMMY_DATA ||
@@ -1216,7 +1226,8 @@ static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data,
addr >>= 2;
if (addr == s->r_conf ||
- addr == s->r_timings ||
+ (addr >= s->r_timings &&
+ addr < s->r_timings + s->ctrl->nregs_timings) ||
addr == s->r_ce_ctrl) {
s->regs[addr] = value;
} else if (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs) {
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/5] aspeed/smc: Add AST2600 timings registers
2019-11-14 9:45 ` [PATCH 3/5] aspeed/smc: Add AST2600 timings registers Cédric Le Goater
@ 2019-11-18 7:15 ` Joel Stanley
0 siblings, 0 replies; 12+ messages in thread
From: Joel Stanley @ 2019-11-18 7:15 UTC (permalink / raw)
To: Cédric Le Goater
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, QEMU Developers
On Thu, 14 Nov 2019 at 09:46, Cédric Le Goater <clg@kaod.org> wrote:
>
> Each CS has its own Read Timing Compensation Register on newer SoCs.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> include/hw/ssi/aspeed_smc.h | 1 +
> hw/ssi/aspeed_smc.c | 17 ++++++++++++++---
> 2 files changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
> index 684d16e33613..6fbbb238f158 100644
> --- a/include/hw/ssi/aspeed_smc.h
> +++ b/include/hw/ssi/aspeed_smc.h
> @@ -40,6 +40,7 @@ typedef struct AspeedSMCController {
> uint8_t r_ce_ctrl;
> uint8_t r_ctrl0;
> uint8_t r_timings;
> + uint8_t nregs_timings;
> uint8_t conf_enable_w0;
> uint8_t max_slaves;
> const AspeedSegments *segments;
> diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> index 86cadbe4cc00..7755eca34976 100644
> --- a/hw/ssi/aspeed_smc.c
> +++ b/hw/ssi/aspeed_smc.c
> @@ -137,7 +137,7 @@
> /* Checksum Calculation Result */
> #define R_DMA_CHECKSUM (0x90 / 4)
>
> -/* Misc Control Register #2 */
> +/* Read Timing Compensation Register */
> #define R_TIMINGS (0x94 / 4)
>
> /* SPI controller registers and bits (AST2400) */
> @@ -256,6 +256,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = R_CE_CTRL,
> .r_ctrl0 = R_CTRL0,
> .r_timings = R_TIMINGS,
> + .nregs_timings = 1,
> .conf_enable_w0 = CONF_ENABLE_W0,
> .max_slaves = 5,
> .segments = aspeed_segments_legacy,
> @@ -271,6 +272,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = R_CE_CTRL,
> .r_ctrl0 = R_CTRL0,
> .r_timings = R_TIMINGS,
> + .nregs_timings = 1,
> .conf_enable_w0 = CONF_ENABLE_W0,
> .max_slaves = 5,
> .segments = aspeed_segments_fmc,
> @@ -288,6 +290,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = 0xff,
> .r_ctrl0 = R_SPI_CTRL0,
> .r_timings = R_SPI_TIMINGS,
> + .nregs_timings = 1,
> .conf_enable_w0 = SPI_CONF_ENABLE_W0,
> .max_slaves = 1,
> .segments = aspeed_segments_spi,
> @@ -303,6 +306,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = R_CE_CTRL,
> .r_ctrl0 = R_CTRL0,
> .r_timings = R_TIMINGS,
> + .nregs_timings = 1,
> .conf_enable_w0 = CONF_ENABLE_W0,
> .max_slaves = 3,
> .segments = aspeed_segments_ast2500_fmc,
> @@ -320,6 +324,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = R_CE_CTRL,
> .r_ctrl0 = R_CTRL0,
> .r_timings = R_TIMINGS,
> + .nregs_timings = 1,
> .conf_enable_w0 = CONF_ENABLE_W0,
> .max_slaves = 2,
> .segments = aspeed_segments_ast2500_spi1,
> @@ -335,6 +340,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = R_CE_CTRL,
> .r_ctrl0 = R_CTRL0,
> .r_timings = R_TIMINGS,
> + .nregs_timings = 1,
> .conf_enable_w0 = CONF_ENABLE_W0,
> .max_slaves = 2,
> .segments = aspeed_segments_ast2500_spi2,
> @@ -350,6 +356,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = R_CE_CTRL,
> .r_ctrl0 = R_CTRL0,
> .r_timings = R_TIMINGS,
> + .nregs_timings = 1,
> .conf_enable_w0 = CONF_ENABLE_W0,
> .max_slaves = 3,
> .segments = aspeed_segments_ast2600_fmc,
> @@ -365,6 +372,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = R_CE_CTRL,
> .r_ctrl0 = R_CTRL0,
> .r_timings = R_TIMINGS,
> + .nregs_timings = 2,
> .conf_enable_w0 = CONF_ENABLE_W0,
> .max_slaves = 2,
> .segments = aspeed_segments_ast2600_spi1,
> @@ -380,6 +388,7 @@ static const AspeedSMCController controllers[] = {
> .r_ce_ctrl = R_CE_CTRL,
> .r_ctrl0 = R_CTRL0,
> .r_timings = R_TIMINGS,
> + .nregs_timings = 3,
> .conf_enable_w0 = CONF_ENABLE_W0,
> .max_slaves = 3,
> .segments = aspeed_segments_ast2600_spi2,
> @@ -951,7 +960,8 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size)
> addr >>= 2;
>
> if (addr == s->r_conf ||
> - addr == s->r_timings ||
> + (addr >= s->r_timings &&
> + addr < s->r_timings + s->ctrl->nregs_timings) ||
> addr == s->r_ce_ctrl ||
> addr == R_INTR_CTRL ||
> addr == R_DUMMY_DATA ||
> @@ -1216,7 +1226,8 @@ static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data,
> addr >>= 2;
>
> if (addr == s->r_conf ||
> - addr == s->r_timings ||
> + (addr >= s->r_timings &&
> + addr < s->r_timings + s->ctrl->nregs_timings) ||
> addr == s->r_ce_ctrl) {
> s->regs[addr] = value;
> } else if (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs) {
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/5] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass
2019-11-14 9:45 [PATCH 0/5] aspeed: AST2600 SMC fixes and tacoma-bmc machine Cédric Le Goater
` (2 preceding siblings ...)
2019-11-14 9:45 ` [PATCH 3/5] aspeed/smc: Add AST2600 timings registers Cédric Le Goater
@ 2019-11-14 9:45 ` Cédric Le Goater
2019-11-18 7:16 ` Joel Stanley
2019-11-14 9:45 ` [PATCH 5/5] aspeed: Add support for the tacoma-bmc board Cédric Le Goater
4 siblings, 1 reply; 12+ messages in thread
From: Cédric Le Goater @ 2019-11-14 9:45 UTC (permalink / raw)
To: Peter Maydell
Cc: Andrew Jeffery, Cédric Le Goater, qemu-arm, Joel Stanley,
qemu-devel
AspeedBoardConfig is a redundant way to define class attributes and it
complexifies the machine definition and initialization.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/arm/aspeed.h | 24 ++---
hw/arm/aspeed.c | 231 ++++++++++++++++++++++------------------
2 files changed, 137 insertions(+), 118 deletions(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index f49bc7081e4d..4423cd0cda71 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -13,19 +13,6 @@
typedef struct AspeedBoardState AspeedBoardState;
-typedef struct AspeedBoardConfig {
- const char *name;
- const char *desc;
- const char *soc_name;
- uint32_t hw_strap1;
- uint32_t hw_strap2;
- const char *fmc_model;
- const char *spi_model;
- uint32_t num_cs;
- void (*i2c_init)(AspeedBoardState *bmc);
- uint32_t ram;
-} AspeedBoardConfig;
-
#define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed")
#define ASPEED_MACHINE(obj) \
OBJECT_CHECK(AspeedMachine, (obj), TYPE_ASPEED_MACHINE)
@@ -41,7 +28,16 @@ typedef struct AspeedMachine {
typedef struct AspeedMachineClass {
MachineClass parent_obj;
- const AspeedBoardConfig *board;
+
+ const char *name;
+ const char *desc;
+ const char *soc_name;
+ uint32_t hw_strap1;
+ uint32_t hw_strap2;
+ const char *fmc_model;
+ const char *spi_model;
+ uint32_t num_cs;
+ void (*i2c_init)(AspeedBoardState *bmc);
} AspeedMachineClass;
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 028191ff36fc..e34e6787430b 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -167,10 +167,10 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
}
}
-static void aspeed_board_init(MachineState *machine,
- const AspeedBoardConfig *cfg)
+static void aspeed_machine_init(MachineState *machine)
{
AspeedBoardState *bmc;
+ AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
AspeedSoCClass *sc;
DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
ram_addr_t max_ram_size;
@@ -182,18 +182,18 @@ static void aspeed_board_init(MachineState *machine,
UINT32_MAX);
object_initialize_child(OBJECT(machine), "soc", &bmc->soc,
- (sizeof(bmc->soc)), cfg->soc_name, &error_abort,
+ (sizeof(bmc->soc)), amc->soc_name, &error_abort,
NULL);
sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
&error_abort);
- object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
+ object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1",
&error_abort);
- object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap2, "hw-strap2",
+ object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2",
&error_abort);
- object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
+ object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs",
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus",
&error_abort);
@@ -230,8 +230,8 @@ static void aspeed_board_init(MachineState *machine,
"max_ram", max_ram_size - ram_size);
memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram);
- aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
- aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);
+ aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model, &error_abort);
+ aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model, &error_abort);
/* Install first FMC flash content as a boot rom. */
if (drive0) {
@@ -255,8 +255,8 @@ static void aspeed_board_init(MachineState *machine,
aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM];
aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus;
- if (cfg->i2c_init) {
- cfg->i2c_init(bmc);
+ if (amc->i2c_init) {
+ amc->i2c_init(bmc);
}
for (i = 0; i < ARRAY_SIZE(bmc->soc.sdhci.slots); i++) {
@@ -383,118 +383,141 @@ static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
0x60);
}
-static void aspeed_machine_init(MachineState *machine)
-{
- AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
-
- aspeed_board_init(machine, amc->board);
-}
-
static void aspeed_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
- const AspeedBoardConfig *board = data;
- mc->desc = board->desc;
mc->init = aspeed_machine_init;
mc->max_cpus = ASPEED_CPUS_NUM;
mc->no_floppy = 1;
mc->no_cdrom = 1;
mc->no_parallel = 1;
- if (board->ram) {
- mc->default_ram_size = board->ram;
- }
- amc->board = board;
}
-static const TypeInfo aspeed_machine_type = {
- .name = TYPE_ASPEED_MACHINE,
- .parent = TYPE_MACHINE,
- .instance_size = sizeof(AspeedMachine),
- .class_size = sizeof(AspeedMachineClass),
- .abstract = true,
+static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
+ amc->soc_name = "ast2400-a1";
+ amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
+ amc->fmc_model = "n25q256a";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 1;
+ amc->i2c_init = palmetto_bmc_i2c_init;
+ mc->default_ram_size = 256 * MiB;
+};
+
+static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST2500 EVB (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
+ amc->fmc_model = "w25q256";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 1;
+ amc->i2c_init = ast2500_evb_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+};
+
+static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
+ amc->fmc_model = "n25q256a";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->i2c_init = romulus_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
};
-static const AspeedBoardConfig aspeed_boards[] = {
+static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "OpenPOWER Swift BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = SWIFT_BMC_HW_STRAP1;
+ amc->fmc_model = "mx66l1g45g";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->i2c_init = swift_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+};
+
+static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
+ amc->fmc_model = "mx25l25635e";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->i2c_init = witherspoon_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+};
+
+static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
+ amc->soc_name = "ast2600-a0";
+ amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
+ amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
+ amc->fmc_model = "w25q512jv";
+ amc->spi_model = "mx66u51235f";
+ amc->num_cs = 1;
+ amc->i2c_init = ast2600_evb_i2c_init;
+ mc->default_ram_size = 1 * GiB;
+};
+
+static const TypeInfo aspeed_machine_types[] = {
{
- .name = MACHINE_TYPE_NAME("palmetto-bmc"),
- .desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)",
- .soc_name = "ast2400-a1",
- .hw_strap1 = PALMETTO_BMC_HW_STRAP1,
- .fmc_model = "n25q256a",
- .spi_model = "mx25l25635e",
- .num_cs = 1,
- .i2c_init = palmetto_bmc_i2c_init,
- .ram = 256 * MiB,
+ .name = MACHINE_TYPE_NAME("palmetto-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_palmetto_class_init,
}, {
- .name = MACHINE_TYPE_NAME("ast2500-evb"),
- .desc = "Aspeed AST2500 EVB (ARM1176)",
- .soc_name = "ast2500-a1",
- .hw_strap1 = AST2500_EVB_HW_STRAP1,
- .fmc_model = "w25q256",
- .spi_model = "mx25l25635e",
- .num_cs = 1,
- .i2c_init = ast2500_evb_i2c_init,
- .ram = 512 * MiB,
+ .name = MACHINE_TYPE_NAME("ast2500-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_ast2500_evb_class_init,
}, {
- .name = MACHINE_TYPE_NAME("romulus-bmc"),
- .desc = "OpenPOWER Romulus BMC (ARM1176)",
- .soc_name = "ast2500-a1",
- .hw_strap1 = ROMULUS_BMC_HW_STRAP1,
- .fmc_model = "n25q256a",
- .spi_model = "mx66l1g45g",
- .num_cs = 2,
- .i2c_init = romulus_bmc_i2c_init,
- .ram = 512 * MiB,
+ .name = MACHINE_TYPE_NAME("romulus-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_romulus_class_init,
}, {
- .name = MACHINE_TYPE_NAME("swift-bmc"),
- .desc = "OpenPOWER Swift BMC (ARM1176)",
- .soc_name = "ast2500-a1",
- .hw_strap1 = SWIFT_BMC_HW_STRAP1,
- .fmc_model = "mx66l1g45g",
- .spi_model = "mx66l1g45g",
- .num_cs = 2,
- .i2c_init = swift_bmc_i2c_init,
- .ram = 512 * MiB,
+ .name = MACHINE_TYPE_NAME("swift-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_swift_class_init,
}, {
- .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
- .desc = "OpenPOWER Witherspoon BMC (ARM1176)",
- .soc_name = "ast2500-a1",
- .hw_strap1 = WITHERSPOON_BMC_HW_STRAP1,
- .fmc_model = "mx25l25635e",
- .spi_model = "mx66l1g45g",
- .num_cs = 2,
- .i2c_init = witherspoon_bmc_i2c_init,
- .ram = 512 * MiB,
+ .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_witherspoon_class_init,
}, {
- .name = MACHINE_TYPE_NAME("ast2600-evb"),
- .desc = "Aspeed AST2600 EVB (Cortex A7)",
- .soc_name = "ast2600-a0",
- .hw_strap1 = AST2600_EVB_HW_STRAP1,
- .hw_strap2 = AST2600_EVB_HW_STRAP2,
- .fmc_model = "w25q512jv",
- .spi_model = "mx66u51235f",
- .num_cs = 1,
- .i2c_init = ast2600_evb_i2c_init,
- .ram = 1 * GiB,
- },
-};
-
-static void aspeed_machine_types(void)
-{
- int i;
-
- type_register_static(&aspeed_machine_type);
- for (i = 0; i < ARRAY_SIZE(aspeed_boards); ++i) {
- TypeInfo ti = {
- .name = aspeed_boards[i].name,
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_class_init,
- .class_data = (void *)&aspeed_boards[i],
- };
- type_register(&ti);
+ .name = MACHINE_TYPE_NAME("ast2600-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_ast2600_evb_class_init,
+ }, {
+ .name = TYPE_ASPEED_MACHINE,
+ .parent = TYPE_MACHINE,
+ .instance_size = sizeof(AspeedMachine),
+ .class_size = sizeof(AspeedMachineClass),
+ .class_init = aspeed_machine_class_init,
+ .abstract = true,
}
-}
+};
-type_init(aspeed_machine_types)
+DEFINE_TYPES(aspeed_machine_types)
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/5] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass
2019-11-14 9:45 ` [PATCH 4/5] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass Cédric Le Goater
@ 2019-11-18 7:16 ` Joel Stanley
0 siblings, 0 replies; 12+ messages in thread
From: Joel Stanley @ 2019-11-18 7:16 UTC (permalink / raw)
To: Cédric Le Goater
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, QEMU Developers
On Thu, 14 Nov 2019 at 09:46, Cédric Le Goater <clg@kaod.org> wrote:
>
> AspeedBoardConfig is a redundant way to define class attributes and it
> complexifies the machine definition and initialization.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
A good cleanup.
> ---
> include/hw/arm/aspeed.h | 24 ++---
> hw/arm/aspeed.c | 231 ++++++++++++++++++++++------------------
> 2 files changed, 137 insertions(+), 118 deletions(-)
>
> diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
> index f49bc7081e4d..4423cd0cda71 100644
> --- a/include/hw/arm/aspeed.h
> +++ b/include/hw/arm/aspeed.h
> @@ -13,19 +13,6 @@
>
> typedef struct AspeedBoardState AspeedBoardState;
>
> -typedef struct AspeedBoardConfig {
> - const char *name;
> - const char *desc;
> - const char *soc_name;
> - uint32_t hw_strap1;
> - uint32_t hw_strap2;
> - const char *fmc_model;
> - const char *spi_model;
> - uint32_t num_cs;
> - void (*i2c_init)(AspeedBoardState *bmc);
> - uint32_t ram;
> -} AspeedBoardConfig;
> -
> #define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed")
> #define ASPEED_MACHINE(obj) \
> OBJECT_CHECK(AspeedMachine, (obj), TYPE_ASPEED_MACHINE)
> @@ -41,7 +28,16 @@ typedef struct AspeedMachine {
>
> typedef struct AspeedMachineClass {
> MachineClass parent_obj;
> - const AspeedBoardConfig *board;
> +
> + const char *name;
> + const char *desc;
> + const char *soc_name;
> + uint32_t hw_strap1;
> + uint32_t hw_strap2;
> + const char *fmc_model;
> + const char *spi_model;
> + uint32_t num_cs;
> + void (*i2c_init)(AspeedBoardState *bmc);
> } AspeedMachineClass;
>
>
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index 028191ff36fc..e34e6787430b 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -167,10 +167,10 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
> }
> }
>
> -static void aspeed_board_init(MachineState *machine,
> - const AspeedBoardConfig *cfg)
> +static void aspeed_machine_init(MachineState *machine)
> {
> AspeedBoardState *bmc;
> + AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
> AspeedSoCClass *sc;
> DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
> ram_addr_t max_ram_size;
> @@ -182,18 +182,18 @@ static void aspeed_board_init(MachineState *machine,
> UINT32_MAX);
>
> object_initialize_child(OBJECT(machine), "soc", &bmc->soc,
> - (sizeof(bmc->soc)), cfg->soc_name, &error_abort,
> + (sizeof(bmc->soc)), amc->soc_name, &error_abort,
> NULL);
>
> sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
>
> object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
> &error_abort);
> - object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
> + object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1",
> &error_abort);
> - object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap2, "hw-strap2",
> + object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2",
> &error_abort);
> - object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
> + object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs",
> &error_abort);
> object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus",
> &error_abort);
> @@ -230,8 +230,8 @@ static void aspeed_board_init(MachineState *machine,
> "max_ram", max_ram_size - ram_size);
> memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram);
>
> - aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
> - aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);
> + aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model, &error_abort);
> + aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model, &error_abort);
>
> /* Install first FMC flash content as a boot rom. */
> if (drive0) {
> @@ -255,8 +255,8 @@ static void aspeed_board_init(MachineState *machine,
> aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM];
> aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus;
>
> - if (cfg->i2c_init) {
> - cfg->i2c_init(bmc);
> + if (amc->i2c_init) {
> + amc->i2c_init(bmc);
> }
>
> for (i = 0; i < ARRAY_SIZE(bmc->soc.sdhci.slots); i++) {
> @@ -383,118 +383,141 @@ static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
> 0x60);
> }
>
> -static void aspeed_machine_init(MachineState *machine)
> -{
> - AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
> -
> - aspeed_board_init(machine, amc->board);
> -}
> -
> static void aspeed_machine_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
> - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> - const AspeedBoardConfig *board = data;
>
> - mc->desc = board->desc;
> mc->init = aspeed_machine_init;
> mc->max_cpus = ASPEED_CPUS_NUM;
> mc->no_floppy = 1;
> mc->no_cdrom = 1;
> mc->no_parallel = 1;
> - if (board->ram) {
> - mc->default_ram_size = board->ram;
> - }
> - amc->board = board;
> }
>
> -static const TypeInfo aspeed_machine_type = {
> - .name = TYPE_ASPEED_MACHINE,
> - .parent = TYPE_MACHINE,
> - .instance_size = sizeof(AspeedMachine),
> - .class_size = sizeof(AspeedMachineClass),
> - .abstract = true,
> +static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
> +{
> + MachineClass *mc = MACHINE_CLASS(oc);
> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> + mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
> + amc->soc_name = "ast2400-a1";
> + amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
> + amc->fmc_model = "n25q256a";
> + amc->spi_model = "mx25l25635e";
> + amc->num_cs = 1;
> + amc->i2c_init = palmetto_bmc_i2c_init;
> + mc->default_ram_size = 256 * MiB;
> +};
> +
> +static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
> +{
> + MachineClass *mc = MACHINE_CLASS(oc);
> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> + mc->desc = "Aspeed AST2500 EVB (ARM1176)";
> + amc->soc_name = "ast2500-a1";
> + amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
> + amc->fmc_model = "w25q256";
> + amc->spi_model = "mx25l25635e";
> + amc->num_cs = 1;
> + amc->i2c_init = ast2500_evb_i2c_init;
> + mc->default_ram_size = 512 * MiB;
> +};
> +
> +static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data)
> +{
> + MachineClass *mc = MACHINE_CLASS(oc);
> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> + mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
> + amc->soc_name = "ast2500-a1";
> + amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
> + amc->fmc_model = "n25q256a";
> + amc->spi_model = "mx66l1g45g";
> + amc->num_cs = 2;
> + amc->i2c_init = romulus_bmc_i2c_init;
> + mc->default_ram_size = 512 * MiB;
> };
>
> -static const AspeedBoardConfig aspeed_boards[] = {
> +static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data)
> +{
> + MachineClass *mc = MACHINE_CLASS(oc);
> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> + mc->desc = "OpenPOWER Swift BMC (ARM1176)";
> + amc->soc_name = "ast2500-a1";
> + amc->hw_strap1 = SWIFT_BMC_HW_STRAP1;
> + amc->fmc_model = "mx66l1g45g";
> + amc->spi_model = "mx66l1g45g";
> + amc->num_cs = 2;
> + amc->i2c_init = swift_bmc_i2c_init;
> + mc->default_ram_size = 512 * MiB;
> +};
> +
> +static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
> +{
> + MachineClass *mc = MACHINE_CLASS(oc);
> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> + mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
> + amc->soc_name = "ast2500-a1";
> + amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
> + amc->fmc_model = "mx25l25635e";
> + amc->spi_model = "mx66l1g45g";
> + amc->num_cs = 2;
> + amc->i2c_init = witherspoon_bmc_i2c_init;
> + mc->default_ram_size = 512 * MiB;
> +};
> +
> +static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
> +{
> + MachineClass *mc = MACHINE_CLASS(oc);
> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> + mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
> + amc->soc_name = "ast2600-a0";
> + amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
> + amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
> + amc->fmc_model = "w25q512jv";
> + amc->spi_model = "mx66u51235f";
> + amc->num_cs = 1;
> + amc->i2c_init = ast2600_evb_i2c_init;
> + mc->default_ram_size = 1 * GiB;
> +};
> +
> +static const TypeInfo aspeed_machine_types[] = {
> {
> - .name = MACHINE_TYPE_NAME("palmetto-bmc"),
> - .desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)",
> - .soc_name = "ast2400-a1",
> - .hw_strap1 = PALMETTO_BMC_HW_STRAP1,
> - .fmc_model = "n25q256a",
> - .spi_model = "mx25l25635e",
> - .num_cs = 1,
> - .i2c_init = palmetto_bmc_i2c_init,
> - .ram = 256 * MiB,
> + .name = MACHINE_TYPE_NAME("palmetto-bmc"),
> + .parent = TYPE_ASPEED_MACHINE,
> + .class_init = aspeed_machine_palmetto_class_init,
> }, {
> - .name = MACHINE_TYPE_NAME("ast2500-evb"),
> - .desc = "Aspeed AST2500 EVB (ARM1176)",
> - .soc_name = "ast2500-a1",
> - .hw_strap1 = AST2500_EVB_HW_STRAP1,
> - .fmc_model = "w25q256",
> - .spi_model = "mx25l25635e",
> - .num_cs = 1,
> - .i2c_init = ast2500_evb_i2c_init,
> - .ram = 512 * MiB,
> + .name = MACHINE_TYPE_NAME("ast2500-evb"),
> + .parent = TYPE_ASPEED_MACHINE,
> + .class_init = aspeed_machine_ast2500_evb_class_init,
> }, {
> - .name = MACHINE_TYPE_NAME("romulus-bmc"),
> - .desc = "OpenPOWER Romulus BMC (ARM1176)",
> - .soc_name = "ast2500-a1",
> - .hw_strap1 = ROMULUS_BMC_HW_STRAP1,
> - .fmc_model = "n25q256a",
> - .spi_model = "mx66l1g45g",
> - .num_cs = 2,
> - .i2c_init = romulus_bmc_i2c_init,
> - .ram = 512 * MiB,
> + .name = MACHINE_TYPE_NAME("romulus-bmc"),
> + .parent = TYPE_ASPEED_MACHINE,
> + .class_init = aspeed_machine_romulus_class_init,
> }, {
> - .name = MACHINE_TYPE_NAME("swift-bmc"),
> - .desc = "OpenPOWER Swift BMC (ARM1176)",
> - .soc_name = "ast2500-a1",
> - .hw_strap1 = SWIFT_BMC_HW_STRAP1,
> - .fmc_model = "mx66l1g45g",
> - .spi_model = "mx66l1g45g",
> - .num_cs = 2,
> - .i2c_init = swift_bmc_i2c_init,
> - .ram = 512 * MiB,
> + .name = MACHINE_TYPE_NAME("swift-bmc"),
> + .parent = TYPE_ASPEED_MACHINE,
> + .class_init = aspeed_machine_swift_class_init,
> }, {
> - .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
> - .desc = "OpenPOWER Witherspoon BMC (ARM1176)",
> - .soc_name = "ast2500-a1",
> - .hw_strap1 = WITHERSPOON_BMC_HW_STRAP1,
> - .fmc_model = "mx25l25635e",
> - .spi_model = "mx66l1g45g",
> - .num_cs = 2,
> - .i2c_init = witherspoon_bmc_i2c_init,
> - .ram = 512 * MiB,
> + .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
> + .parent = TYPE_ASPEED_MACHINE,
> + .class_init = aspeed_machine_witherspoon_class_init,
> }, {
> - .name = MACHINE_TYPE_NAME("ast2600-evb"),
> - .desc = "Aspeed AST2600 EVB (Cortex A7)",
> - .soc_name = "ast2600-a0",
> - .hw_strap1 = AST2600_EVB_HW_STRAP1,
> - .hw_strap2 = AST2600_EVB_HW_STRAP2,
> - .fmc_model = "w25q512jv",
> - .spi_model = "mx66u51235f",
> - .num_cs = 1,
> - .i2c_init = ast2600_evb_i2c_init,
> - .ram = 1 * GiB,
> - },
> -};
> -
> -static void aspeed_machine_types(void)
> -{
> - int i;
> -
> - type_register_static(&aspeed_machine_type);
> - for (i = 0; i < ARRAY_SIZE(aspeed_boards); ++i) {
> - TypeInfo ti = {
> - .name = aspeed_boards[i].name,
> - .parent = TYPE_ASPEED_MACHINE,
> - .class_init = aspeed_machine_class_init,
> - .class_data = (void *)&aspeed_boards[i],
> - };
> - type_register(&ti);
> + .name = MACHINE_TYPE_NAME("ast2600-evb"),
> + .parent = TYPE_ASPEED_MACHINE,
> + .class_init = aspeed_machine_ast2600_evb_class_init,
> + }, {
> + .name = TYPE_ASPEED_MACHINE,
> + .parent = TYPE_MACHINE,
> + .instance_size = sizeof(AspeedMachine),
> + .class_size = sizeof(AspeedMachineClass),
> + .class_init = aspeed_machine_class_init,
> + .abstract = true,
> }
> -}
> +};
>
> -type_init(aspeed_machine_types)
> +DEFINE_TYPES(aspeed_machine_types)
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 5/5] aspeed: Add support for the tacoma-bmc board
2019-11-14 9:45 [PATCH 0/5] aspeed: AST2600 SMC fixes and tacoma-bmc machine Cédric Le Goater
` (3 preceding siblings ...)
2019-11-14 9:45 ` [PATCH 4/5] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass Cédric Le Goater
@ 2019-11-14 9:45 ` Cédric Le Goater
2019-11-18 7:18 ` Joel Stanley
4 siblings, 1 reply; 12+ messages in thread
From: Cédric Le Goater @ 2019-11-14 9:45 UTC (permalink / raw)
To: Peter Maydell
Cc: Andrew Jeffery, Cédric Le Goater, qemu-arm, Joel Stanley,
qemu-devel
The Tacoma BMC board is replacement board for the BMC of the OpenPOWER
Witherspoon system. It uses a AST2600 SoC instead of a AST2500 and is
used for HW bringup.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/arm/aspeed.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index e34e6787430b..729f2e79cd79 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -92,6 +92,10 @@ struct AspeedBoardState {
#define AST2600_EVB_HW_STRAP1 0x000000C0
#define AST2600_EVB_HW_STRAP2 0x00000003
+/* Tacoma hardware value */
+#define TACOMA_BMC_HW_STRAP1 0x00000000
+#define TACOMA_BMC_HW_STRAP2 0x00000000
+
/*
* The max ram region is for firmwares that scan the address space
* with load/store to guess how much RAM the SoC has.
@@ -167,6 +171,34 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
}
}
+static void tacoma_bmc_i2c_init(AspeedBoardState *bmc)
+{
+ AspeedSoCState *soc = &bmc->soc;
+ uint8_t *eeprom_buf = g_malloc0(8 * 1024);
+
+ /* Bus 3: TODO bmp280@77 */
+ /* Bus 3: TODO max31785@52 */
+ /* Bus 3: TODO dps310@76 */
+ i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60);
+
+ i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
+
+ i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);
+
+ /* The tacoma expects a TMP275 but a TMP105 is compatible */
+ i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105,
+ 0x4a);
+
+ i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "pca9552",
+ 0x60);
+ /* The tacoma expects Epson RX8900 RTC but a ds1338 is compatible */
+ i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338",
+ 0x32);
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51,
+ eeprom_buf);
+ /* Bus 11: TODO ucd90160@64 */
+}
+
static void aspeed_machine_init(MachineState *machine)
{
AspeedBoardState *bmc;
@@ -485,6 +517,22 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
mc->default_ram_size = 1 * GiB;
};
+static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
+ amc->soc_name = "ast2600-a0";
+ amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
+ amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
+ amc->fmc_model = "mx66l1g45g";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->i2c_init = tacoma_bmc_i2c_init;
+ mc->default_ram_size = 1 * GiB;
+};
+
static const TypeInfo aspeed_machine_types[] = {
{
.name = MACHINE_TYPE_NAME("palmetto-bmc"),
@@ -510,6 +558,10 @@ static const TypeInfo aspeed_machine_types[] = {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
+ }, {
+ .name = MACHINE_TYPE_NAME("tacoma-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_tacoma_class_init,
}, {
.name = TYPE_ASPEED_MACHINE,
.parent = TYPE_MACHINE,
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 5/5] aspeed: Add support for the tacoma-bmc board
2019-11-14 9:45 ` [PATCH 5/5] aspeed: Add support for the tacoma-bmc board Cédric Le Goater
@ 2019-11-18 7:18 ` Joel Stanley
2019-11-18 7:44 ` Cédric Le Goater
0 siblings, 1 reply; 12+ messages in thread
From: Joel Stanley @ 2019-11-18 7:18 UTC (permalink / raw)
To: Cédric Le Goater
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, QEMU Developers
On Thu, 14 Nov 2019 at 09:46, Cédric Le Goater <clg@kaod.org> wrote:
>
> The Tacoma BMC board is replacement board for the BMC of the OpenPOWER
> Witherspoon system. It uses a AST2600 SoC instead of a AST2500 and is
> used for HW bringup.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
> hw/arm/aspeed.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index e34e6787430b..729f2e79cd79 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -92,6 +92,10 @@ struct AspeedBoardState {
> #define AST2600_EVB_HW_STRAP1 0x000000C0
> #define AST2600_EVB_HW_STRAP2 0x00000003
>
> +/* Tacoma hardware value */
> +#define TACOMA_BMC_HW_STRAP1 0x00000000
> +#define TACOMA_BMC_HW_STRAP2 0x00000000
> +
> /*
> * The max ram region is for firmwares that scan the address space
> * with load/store to guess how much RAM the SoC has.
> @@ -167,6 +171,34 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
> }
> }
>
> +static void tacoma_bmc_i2c_init(AspeedBoardState *bmc)
This should be identical to witherspoon. Do you want to use the same callback?
Either way,
Reviewed-by: Joel Stanley <joel@jms.id.au>
> +{
> + AspeedSoCState *soc = &bmc->soc;
> + uint8_t *eeprom_buf = g_malloc0(8 * 1024);
> +
> + /* Bus 3: TODO bmp280@77 */
> + /* Bus 3: TODO max31785@52 */
> + /* Bus 3: TODO dps310@76 */
> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60);
> +
> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
> +
> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);
> +
> + /* The tacoma expects a TMP275 but a TMP105 is compatible */
> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105,
> + 0x4a);
> +
> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "pca9552",
> + 0x60);
> + /* The tacoma expects Epson RX8900 RTC but a ds1338 is compatible */
> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338",
> + 0x32);
> + smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51,
> + eeprom_buf);
> + /* Bus 11: TODO ucd90160@64 */
> +}
> +
> static void aspeed_machine_init(MachineState *machine)
> {
> AspeedBoardState *bmc;
> @@ -485,6 +517,22 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
> mc->default_ram_size = 1 * GiB;
> };
>
> +static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
> +{
> + MachineClass *mc = MACHINE_CLASS(oc);
> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> + mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
> + amc->soc_name = "ast2600-a0";
> + amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
> + amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
> + amc->fmc_model = "mx66l1g45g";
> + amc->spi_model = "mx66l1g45g";
> + amc->num_cs = 2;
> + amc->i2c_init = tacoma_bmc_i2c_init;
> + mc->default_ram_size = 1 * GiB;
> +};
> +
> static const TypeInfo aspeed_machine_types[] = {
> {
> .name = MACHINE_TYPE_NAME("palmetto-bmc"),
> @@ -510,6 +558,10 @@ static const TypeInfo aspeed_machine_types[] = {
> .name = MACHINE_TYPE_NAME("ast2600-evb"),
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_ast2600_evb_class_init,
> + }, {
> + .name = MACHINE_TYPE_NAME("tacoma-bmc"),
> + .parent = TYPE_ASPEED_MACHINE,
> + .class_init = aspeed_machine_tacoma_class_init,
> }, {
> .name = TYPE_ASPEED_MACHINE,
> .parent = TYPE_MACHINE,
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 5/5] aspeed: Add support for the tacoma-bmc board
2019-11-18 7:18 ` Joel Stanley
@ 2019-11-18 7:44 ` Cédric Le Goater
0 siblings, 0 replies; 12+ messages in thread
From: Cédric Le Goater @ 2019-11-18 7:44 UTC (permalink / raw)
To: Joel Stanley; +Cc: Andrew Jeffery, Peter Maydell, qemu-arm, QEMU Developers
On 18/11/2019 08:18, Joel Stanley wrote:
> On Thu, 14 Nov 2019 at 09:46, Cédric Le Goater <clg@kaod.org> wrote:
>>
>> The Tacoma BMC board is replacement board for the BMC of the OpenPOWER
>> Witherspoon system. It uses a AST2600 SoC instead of a AST2500 and is
>> used for HW bringup.
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>> hw/arm/aspeed.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 52 insertions(+)
>>
>> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
>> index e34e6787430b..729f2e79cd79 100644
>> --- a/hw/arm/aspeed.c
>> +++ b/hw/arm/aspeed.c
>> @@ -92,6 +92,10 @@ struct AspeedBoardState {
>> #define AST2600_EVB_HW_STRAP1 0x000000C0
>> #define AST2600_EVB_HW_STRAP2 0x00000003
>>
>> +/* Tacoma hardware value */
>> +#define TACOMA_BMC_HW_STRAP1 0x00000000
>> +#define TACOMA_BMC_HW_STRAP2 0x00000000
>> +
>> /*
>> * The max ram region is for firmwares that scan the address space
>> * with load/store to guess how much RAM the SoC has.
>> @@ -167,6 +171,34 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
>> }
>> }
>>
>> +static void tacoma_bmc_i2c_init(AspeedBoardState *bmc)
>
> This should be identical to witherspoon. Do you want to use the same callback?
You are right. The tacoma board should use the same callback.
Thanks,
C.
> Either way,
>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
>
>
>> +{
>> + AspeedSoCState *soc = &bmc->soc;
>> + uint8_t *eeprom_buf = g_malloc0(8 * 1024);
>> +
>> + /* Bus 3: TODO bmp280@77 */
>> + /* Bus 3: TODO max31785@52 */
>> + /* Bus 3: TODO dps310@76 */
>> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60);
>> +
>> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
>> +
>> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);
>> +
>> + /* The tacoma expects a TMP275 but a TMP105 is compatible */
>> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105,
>> + 0x4a);
>> +
>> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "pca9552",
>> + 0x60);
>> + /* The tacoma expects Epson RX8900 RTC but a ds1338 is compatible */
>> + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338",
>> + 0x32);
>> + smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51,
>> + eeprom_buf);
>> + /* Bus 11: TODO ucd90160@64 */
>> +}
>> +
>> static void aspeed_machine_init(MachineState *machine)
>> {
>> AspeedBoardState *bmc;
>> @@ -485,6 +517,22 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
>> mc->default_ram_size = 1 * GiB;
>> };
>>
>> +static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
>> +{
>> + MachineClass *mc = MACHINE_CLASS(oc);
>> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
>> +
>> + mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
>> + amc->soc_name = "ast2600-a0";
>> + amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
>> + amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
>> + amc->fmc_model = "mx66l1g45g";
>> + amc->spi_model = "mx66l1g45g";
>> + amc->num_cs = 2;
>> + amc->i2c_init = tacoma_bmc_i2c_init;
>> + mc->default_ram_size = 1 * GiB;
>> +};
>> +
>> static const TypeInfo aspeed_machine_types[] = {
>> {
>> .name = MACHINE_TYPE_NAME("palmetto-bmc"),
>> @@ -510,6 +558,10 @@ static const TypeInfo aspeed_machine_types[] = {
>> .name = MACHINE_TYPE_NAME("ast2600-evb"),
>> .parent = TYPE_ASPEED_MACHINE,
>> .class_init = aspeed_machine_ast2600_evb_class_init,
>> + }, {
>> + .name = MACHINE_TYPE_NAME("tacoma-bmc"),
>> + .parent = TYPE_ASPEED_MACHINE,
>> + .class_init = aspeed_machine_tacoma_class_init,
>> }, {
>> .name = TYPE_ASPEED_MACHINE,
>> .parent = TYPE_MACHINE,
>> --
>> 2.21.0
>>
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