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From: Balamuruhan S <bala24@linux.ibm.com>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: david@gibson.dropbear.id.au, qemu-ppc@nongnu.org,
	qemu-devel@nongnu.org, groug@kaod.org
Subject: Re: [PATCH 5/5] hw/ppc/pnv_xscom: add PBA BARs for Power8 slw image
Date: Thu, 21 Nov 2019 14:20:46 +0530	[thread overview]
Message-ID: <20191121085046.GF14854@dhcp-9-120-236-104.in.ibm.com> (raw)
In-Reply-To: <9ad3aae4-1164-74aa-9e35-3a0a4d701d51@kaod.org>

On Wed, Nov 20, 2019 at 08:31:50AM +0100, Cédric Le Goater wrote:
> On 19/11/2019 18:50, Balamuruhan S wrote:
> > slw base and size mask are accessed during boot in homer_init_chip(),
> > so include BAR2 and BARMASK2 for Power8.
> > 
> > Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
> > ---
> >  hw/ppc/pnv_xscom.c   | 10 ++++++++--
> >  include/hw/ppc/pnv.h |  4 ++++
> >  2 files changed, 12 insertions(+), 2 deletions(-)
> > 
> > diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
> > index f797a5ec7d..828a2e2a5a 100644
> > --- a/hw/ppc/pnv_xscom.c
> > +++ b/hw/ppc/pnv_xscom.c
> > @@ -38,8 +38,10 @@
> >  
> >  /* PBA BARs */
> >  #define P8_PBA_BAR0                     0x2013f00
> > +#define P8_PBA_BAR2                     0x2013f02
> >  #define P8_PBA_BAR3                     0x2013f03
> >  #define P8_PBA_BARMASK0                 0x2013f04
> > +#define P8_PBA_BARMASK2                 0x2013f06
> 
> and you add the definitions back ! :)

will make it clean.

> 
> >  #define P8_PBA_BARMASK3                 0x2013f07
> >  #define P9_PBA_BAR0                     0x5012b00
> >  #define P9_PBA_BAR2                     0x5012b02
> > @@ -49,6 +51,7 @@
> >  /* Mask to calculate Homer/Occ size */
> >  #define HOMER_SIZE_MASK                 0x0000000000300000ull
> >  #define OCC_SIZE_MASK                   0x0000000000700000ull
> > +#define SLW_SIZE_MASK                   0x0
> >  
> >  static void xscom_complete(CPUState *cs, uint64_t hmer_bits)
> >  {
> > @@ -115,6 +118,11 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
> >          }
> >          return 0;
> >  
> > +    case P8_PBA_BAR2: /* P8 slw image */
> > +        return PNV_SLW_IMAGE_BASE(chip);
> > +    case P8_PBA_BARMASK2: /* P8 slw image size is 1MB and mask is zero*/
> > +        return SLW_SIZE_MASK;
> 
> We need a HOMER XSCOM region.

okay.

> 
> > +
> >      case 0x1010c00:     /* PIBAM FIR */
> >      case 0x1010c03:     /* PIBAM FIR MASK */
> >  
> > @@ -135,9 +143,7 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
> >      case 0x202000f:     /* ADU stuff, receive status register*/
> >          return 0;
> >      case 0x2013f01:     /* PBA stuff */
> > -    case 0x2013f02:     /* PBA stuff */
> >      case 0x2013f05:     /* PBA stuff */
> > -    case 0x2013f06:     /* PBA stuff */
> >          return 0;
> >      case 0x2013028:     /* CAPP stuff */
> >      case 0x201302a:     /* CAPP stuff */
> > diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> > index e9ed8b928a..bd22dbf8a9 100644
> > --- a/include/hw/ppc/pnv.h
> > +++ b/include/hw/ppc/pnv.h
> > @@ -212,6 +212,10 @@ void pnv_bmc_powerdown(IPMIBmc *bmc);
> >  #define PNV_HOMER_BASE(chip)                                            \
> >      (0x7ffd800000ull + ((uint64_t)PNV_CHIP_INDEX(chip)) * PNV_HOMER_SIZE)
> >  
> > +#define PNV_SLW_SIZE                0x0000000000100000ull
> > +#define PNV_SLW_IMAGE_BASE(chip)                                        \
> > +    (0x2ffda00000ull + ((uint64_t)PNV_CHIP_INDEX(chip)) * PNV_SLW_SIZE)
> > +
> >  
> >  /*
> >   * XSCOM 0x20109CA defines the ICP BAR:
> > 
> 



  reply	other threads:[~2019-11-21  8:52 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-19 17:50 [PATCH 0/5] ppc/pnv: fix Homer/Occ mappings on multichip systems Balamuruhan S
2019-11-19 17:50 ` [PATCH 1/5] hw/ppc/pnv: incorrect homer and occ common area size Balamuruhan S
2019-11-20  7:13   ` Cédric Le Goater
2019-11-21  8:32     ` Balamuruhan S
2019-11-19 17:50 ` [PATCH 2/5] hw/ppc/pnv_xscom: PBA bar mask values are incorrect with homer/occ sizes Balamuruhan S
2019-11-19 21:56   ` David Gibson
2019-11-19 22:00     ` David Gibson
2019-11-19 22:02       ` David Gibson
2019-11-20  3:01         ` Balamuruhan S
2019-11-20  3:16           ` Balamuruhan S
2019-11-20  7:59             ` Greg Kurz
2019-11-21  8:34               ` Balamuruhan S
2019-11-20  7:18   ` Cédric Le Goater
2019-11-21  8:37     ` Balamuruhan S
2019-11-19 17:50 ` [PATCH 3/5] hw/ppc/pnv_xscom: Power8 occ common area is in PBA BAR 3 Balamuruhan S
2019-11-20  7:20   ` Cédric Le Goater
2019-11-21  8:39     ` Balamuruhan S
2019-11-19 17:50 ` [PATCH 4/5] hw/ppc/pnv_xscom: occ common area to be mapped only once Balamuruhan S
2019-11-20  7:30   ` Cédric Le Goater
2019-11-21  8:49     ` Balamuruhan S
2019-11-19 17:50 ` [PATCH 5/5] hw/ppc/pnv_xscom: add PBA BARs for Power8 slw image Balamuruhan S
2019-11-20  7:31   ` Cédric Le Goater
2019-11-21  8:50     ` Balamuruhan S [this message]
2019-11-20  7:46 ` [PATCH 0/5] ppc/pnv: fix Homer/Occ mappings on multichip systems Cédric Le Goater
2019-11-21  9:11   ` Balamuruhan S
2019-11-21 10:00     ` Cédric Le Goater
2019-11-22 16:41       ` Balamuruhan S

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