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From: Palmer Dabbelt <palmerdabbelt@google.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org,       qemu-riscv@nongnu.org,
	ShihPo Hung <shihpo.hung@sifive.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	 Alistair Francis <alistair.francis@wdc.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>
Subject: [PULL 5/5] target/riscv: update mstatus.SD when FS is set dirty
Date: Tue, 21 Jan 2020 14:57:02 -0800	[thread overview]
Message-ID: <20200121225703.148465-6-palmerdabbelt@google.com> (raw)
In-Reply-To: <20200121225703.148465-1-palmerdabbelt@google.com>

From: ShihPo Hung <shihpo.hung@sifive.com>

remove the check becuase SD bit should summarize FS and XS fields
unconditionally.

Signed-off-by: ShihPo Hung <shihpo.hung@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
 target/riscv/csr.c       | 3 +--
 target/riscv/translate.c | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index da02f9f0b1..0e34c292c5 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -341,8 +341,7 @@ static int write_mstatus(CPURISCVState *env, int csrno, target_ulong val)
 
     mstatus = (mstatus & ~mask) | (val & mask);
 
-    dirty = (riscv_cpu_fp_enabled(env) &&
-             ((mstatus & MSTATUS_FS) == MSTATUS_FS)) |
+    dirty = ((mstatus & MSTATUS_FS) == MSTATUS_FS) |
             ((mstatus & MSTATUS_XS) == MSTATUS_XS);
     mstatus = set_field(mstatus, MSTATUS_SD, dirty);
     env->mstatus = mstatus;
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index ab6a891dc3..8e40ed3ac4 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -394,7 +394,7 @@ static void mark_fs_dirty(DisasContext *ctx)
 
     tmp = tcg_temp_new();
     tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
-    tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS);
+    tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | MSTATUS_SD);
     tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
     tcg_temp_free(tmp);
 }
-- 
2.25.0.341.g760bfbb309-goog



  parent reply	other threads:[~2020-01-21 23:43 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-21 22:56 [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 1 Palmer Dabbelt
2020-01-21 22:56 ` [PULL 1/5] riscv/sifive_u: fix a memory leak in soc_realize() Palmer Dabbelt
2020-01-21 22:56 ` [PULL 2/5] riscv: Set xPIE to 1 after xRET Palmer Dabbelt
2020-01-21 22:57 ` [PULL 3/5] target/riscv: Fix tb->flags FS status Palmer Dabbelt
2020-01-21 22:57 ` [PULL 4/5] target/riscv: fsd/fsw doesn't dirty FP state Palmer Dabbelt
2020-01-21 22:57 ` Palmer Dabbelt [this message]
2020-01-23 14:38 ` [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 1 Peter Maydell
2020-01-23 18:43 ` Palmer Dabbelt
2020-01-24 12:35   ` Peter Maydell
2020-01-27 19:23   ` Palmer Dabbelt
2020-01-24 13:22 ` Peter Maydell

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