[PATCH v2 00/13] hw/arm: Add raspi0 and raspi1 machines

[PATCH v2 00/13] hw/arm: Add raspi0 and raspi1 machines

[Philippe Mathieu-Daudé]

This series addresses suggestions from Igor and Peter on the
raspi machines, then add the raspi0 and raspi1.

Since v1:
- Use more specific machine names

Philippe Mathieu-Daudé (13):
  hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
  hw/arm/raspi: Avoid using TypeInfo::class_data pointer
  hw/arm/raspi: Use more specific machine names
  hw/arm/raspi: Introduce RaspiProcessorId enum
  hw/arm/raspi: Remove use of the 'version' value in the board code
  hw/arm/bcm2836: Restrict BCM283XClass declaration to C source
  hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type
  hw/arm/bcm2836: Introduce BCM283XClass::core_count
  hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs
  hw/arm/bcm2836: Split out common realize() code
  hw/arm/bcm2836: Introduce the BCM2835 SoC
  hw/arm/raspi: Add the Raspberry Pi B+ machine
  hw/arm/raspi: Add the Raspberry Pi Zero machine

 include/hw/arm/bcm2836.h |  13 +--
 hw/arm/bcm2836.c         | 192 ++++++++++++++++++++++++++-------------
 hw/arm/raspi.c           | 153 +++++++++++++++++++------------
 3 files changed, 226 insertions(+), 132 deletions(-)

-- 
2.21.1

[PATCH v2 01/13] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2

[Philippe Mathieu-Daudé]

Commit 1c3db49d39 added the raspi3, which uses the same peripherals
than the raspi2 (but with different ARM cores). The raspi3 was
introduced without the ignore_memory_transaction_failures flag.
Almost 2 years later, the machine is usable running U-Boot and
Linux.
In commit 00cbd5bd74 we mapped a lot of unimplemented devices,
commit d442d95f added thermal block and commit 0e5bbd7406 the
system timer.
As we are happy with the raspi3, let's remove this flag on the
raspi2.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/raspi.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 90ad9b8115..221356933e 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -324,9 +324,6 @@ static void raspi_machine_class_init(ObjectClass *oc, void *data)
     mc->no_cdrom = 1;
     mc->default_cpus = mc->min_cpus = mc->max_cpus = cores_count(board_rev);
     mc->default_ram_size = board_ram_size(board_rev);
-    if (board_version(board_rev) == 2) {
-        mc->ignore_memory_transaction_failures = true;
-    }
 };
 
 static const TypeInfo raspi_machine_types[] = {
-- 
2.21.1

Re: [PATCH v2 01/13] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> Commit 1c3db49d39 added the raspi3, which uses the same peripherals
> than the raspi2 (but with different ARM cores). The raspi3 was
> introduced without the ignore_memory_transaction_failures flag.
> Almost 2 years later, the machine is usable running U-Boot and
> Linux.
> In commit 00cbd5bd74 we mapped a lot of unimplemented devices,
> commit d442d95f added thermal block and commit 0e5bbd7406 the
> system timer.
> As we are happy with the raspi3, let's remove this flag on the
> raspi2.
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>  hw/arm/raspi.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 90ad9b8115..221356933e 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -324,9 +324,6 @@ static void raspi_machine_class_init(ObjectClass *oc, void *data)
>      mc->no_cdrom = 1;
>      mc->default_cpus = mc->min_cpus = mc->max_cpus = cores_count(board_rev);
>      mc->default_ram_size = board_ram_size(board_rev);
> -    if (board_version(board_rev) == 2) {
> -        mc->ignore_memory_transaction_failures = true;
> -    }
>  };
>  
>  static const TypeInfo raspi_machine_types[] = {
> 

[PATCH v2 02/13] hw/arm/raspi: Avoid using TypeInfo::class_data pointer

[Philippe Mathieu-Daudé]

Using class_data pointer to create a MachineClass is not
the recommended way anymore. The correct way is to open-code
the MachineClass::fields in the class_init() method.

We can not use TYPE_RASPI_MACHINE::class_base_init() because
it is called *before* each machine class_init(), therefore the
board_rev field is not populated. We have to manually call
raspi_machine_class_common_init() for each machine.

This partly reverts commit a03bde3674e.

Suggested-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/raspi.c | 34 ++++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 221356933e..1a8c135dc6 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -309,13 +309,9 @@ static void raspi_machine_init(MachineState *machine)
     setup_boot(machine, version, machine->ram_size - vcram_size);
 }
 
-static void raspi_machine_class_init(ObjectClass *oc, void *data)
+static void raspi_machine_class_common_init(MachineClass *mc,
+                                            uint32_t board_rev)
 {
-    MachineClass *mc = MACHINE_CLASS(oc);
-    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
-    uint32_t board_rev = (uint32_t)(uintptr_t)data;
-
-    rmc->board_rev = board_rev;
     mc->desc = g_strdup_printf("Raspberry Pi %s", board_type(board_rev));
     mc->init = raspi_machine_init;
     mc->block_default_type = IF_SD;
@@ -326,18 +322,36 @@ static void raspi_machine_class_init(ObjectClass *oc, void *data)
     mc->default_ram_size = board_ram_size(board_rev);
 };
 
+static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
+
+    rmc->board_rev = 0xa21041;
+    raspi_machine_class_common_init(mc, rmc->board_rev);
+};
+
+#ifdef TARGET_AARCH64
+static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
+
+    rmc->board_rev = 0xa02082;
+    raspi_machine_class_common_init(mc, rmc->board_rev);
+};
+#endif /* TARGET_AARCH64 */
+
 static const TypeInfo raspi_machine_types[] = {
     {
         .name           = MACHINE_TYPE_NAME("raspi2"),
         .parent         = TYPE_RASPI_MACHINE,
-        .class_init     = raspi_machine_class_init,
-        .class_data     = (void *)0xa21041,
+        .class_init     = raspi2b_machine_class_init,
 #ifdef TARGET_AARCH64
     }, {
         .name           = MACHINE_TYPE_NAME("raspi3"),
         .parent         = TYPE_RASPI_MACHINE,
-        .class_init     = raspi_machine_class_init,
-        .class_data     = (void *)0xa02082,
+        .class_init     = raspi3b_machine_class_init,
 #endif
     }, {
         .name           = TYPE_RASPI_MACHINE,
-- 
2.21.1

Re: [PATCH v2 02/13] hw/arm/raspi: Avoid using TypeInfo::class_data pointer

[Igor Mammedov]

On Mon, 17 Feb 2020 12:45:22 +0100
Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:

> Using class_data pointer to create a MachineClass is not
> the recommended way anymore. The correct way is to open-code
> the MachineClass::fields in the class_init() method.
> 
> We can not use TYPE_RASPI_MACHINE::class_base_init() because
> it is called *before* each machine class_init(), therefore the
> board_rev field is not populated. We have to manually call
> raspi_machine_class_common_init() for each machine.
> 
> This partly reverts commit a03bde3674e.
> 
> Suggested-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Igor Mammedov <imammedo@redhat.com>

> ---
>  hw/arm/raspi.c | 34 ++++++++++++++++++++++++----------
>  1 file changed, 24 insertions(+), 10 deletions(-)
> 
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 221356933e..1a8c135dc6 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -309,13 +309,9 @@ static void raspi_machine_init(MachineState *machine)
>      setup_boot(machine, version, machine->ram_size - vcram_size);
>  }
>  
> -static void raspi_machine_class_init(ObjectClass *oc, void *data)
> +static void raspi_machine_class_common_init(MachineClass *mc,
> +                                            uint32_t board_rev)
>  {
> -    MachineClass *mc = MACHINE_CLASS(oc);
> -    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
> -    uint32_t board_rev = (uint32_t)(uintptr_t)data;
> -
> -    rmc->board_rev = board_rev;
>      mc->desc = g_strdup_printf("Raspberry Pi %s", board_type(board_rev));
>      mc->init = raspi_machine_init;
>      mc->block_default_type = IF_SD;
> @@ -326,18 +322,36 @@ static void raspi_machine_class_init(ObjectClass *oc, void *data)
>      mc->default_ram_size = board_ram_size(board_rev);
>  };
>  
> +static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
> +{
> +    MachineClass *mc = MACHINE_CLASS(oc);
> +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
> +
> +    rmc->board_rev = 0xa21041;
> +    raspi_machine_class_common_init(mc, rmc->board_rev);
> +};
> +
> +#ifdef TARGET_AARCH64
> +static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
> +{
> +    MachineClass *mc = MACHINE_CLASS(oc);
> +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
> +
> +    rmc->board_rev = 0xa02082;
> +    raspi_machine_class_common_init(mc, rmc->board_rev);
> +};
> +#endif /* TARGET_AARCH64 */
> +
>  static const TypeInfo raspi_machine_types[] = {
>      {
>          .name           = MACHINE_TYPE_NAME("raspi2"),
>          .parent         = TYPE_RASPI_MACHINE,
> -        .class_init     = raspi_machine_class_init,
> -        .class_data     = (void *)0xa21041,
> +        .class_init     = raspi2b_machine_class_init,
>  #ifdef TARGET_AARCH64
>      }, {
>          .name           = MACHINE_TYPE_NAME("raspi3"),
>          .parent         = TYPE_RASPI_MACHINE,
> -        .class_init     = raspi_machine_class_init,
> -        .class_data     = (void *)0xa02082,
> +        .class_init     = raspi3b_machine_class_init,
>  #endif
>      }, {
>          .name           = TYPE_RASPI_MACHINE,

[PATCH v2 03/13] hw/arm/raspi: Use more specific machine names

[Philippe Mathieu-Daudé]

Now that we can instantiate different machines based on their
board_rev register value, we can have various raspi2 and raspi3.

In commit fc78a990ec103 we corrected the machine description.
Correct the machine names too. For backward compatibility, add
an alias to the previous generic name.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/raspi.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 1a8c135dc6..d9e8acfe3b 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -327,6 +327,7 @@ static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
     MachineClass *mc = MACHINE_CLASS(oc);
     RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
 
+    mc->alias = "raspi2";
     rmc->board_rev = 0xa21041;
     raspi_machine_class_common_init(mc, rmc->board_rev);
 };
@@ -337,6 +338,7 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
     MachineClass *mc = MACHINE_CLASS(oc);
     RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
 
+    mc->alias = "raspi3";
     rmc->board_rev = 0xa02082;
     raspi_machine_class_common_init(mc, rmc->board_rev);
 };
@@ -344,12 +346,12 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
 
 static const TypeInfo raspi_machine_types[] = {
     {
-        .name           = MACHINE_TYPE_NAME("raspi2"),
+        .name           = MACHINE_TYPE_NAME("raspi2b"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi2b_machine_class_init,
 #ifdef TARGET_AARCH64
     }, {
-        .name           = MACHINE_TYPE_NAME("raspi3"),
+        .name           = MACHINE_TYPE_NAME("raspi3b"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi3b_machine_class_init,
 #endif
-- 
2.21.1

Re: [PATCH v2 03/13] hw/arm/raspi: Use more specific machine names

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> Now that we can instantiate different machines based on their
> board_rev register value, we can have various raspi2 and raspi3.
> 
> In commit fc78a990ec103 we corrected the machine description.
> Correct the machine names too. For backward compatibility, add
> an alias to the previous generic name.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>  hw/arm/raspi.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 1a8c135dc6..d9e8acfe3b 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -327,6 +327,7 @@ static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
>      MachineClass *mc = MACHINE_CLASS(oc);
>      RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
>  
> +    mc->alias = "raspi2";
>      rmc->board_rev = 0xa21041;
>      raspi_machine_class_common_init(mc, rmc->board_rev);
>  };
> @@ -337,6 +338,7 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
>      MachineClass *mc = MACHINE_CLASS(oc);
>      RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
>  
> +    mc->alias = "raspi3";
>      rmc->board_rev = 0xa02082;
>      raspi_machine_class_common_init(mc, rmc->board_rev);
>  };
> @@ -344,12 +346,12 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
>  
>  static const TypeInfo raspi_machine_types[] = {
>      {
> -        .name           = MACHINE_TYPE_NAME("raspi2"),
> +        .name           = MACHINE_TYPE_NAME("raspi2b"),
>          .parent         = TYPE_RASPI_MACHINE,
>          .class_init     = raspi2b_machine_class_init,
>  #ifdef TARGET_AARCH64
>      }, {
> -        .name           = MACHINE_TYPE_NAME("raspi3"),
> +        .name           = MACHINE_TYPE_NAME("raspi3b"),
>          .parent         = TYPE_RASPI_MACHINE,
>          .class_init     = raspi3b_machine_class_init,
>  #endif
> 

[PATCH v2 04/13] hw/arm/raspi: Introduce RaspiProcessorId enum

[Philippe Mathieu-Daudé]

As we only support a reduced set of the REV_CODE_PROCESSOR id
encoded in the board revision, define the PROCESSOR_ID values
as an enum. We can simplify the board_soc_type and cores_count
methods.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/raspi.c | 45 +++++++++++++++++++++------------------------
 1 file changed, 21 insertions(+), 24 deletions(-)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index d9e8acfe3b..b628dadf34 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -69,16 +69,33 @@ FIELD(REV_CODE, MANUFACTURER,      16, 4);
 FIELD(REV_CODE, MEMORY_SIZE,       20, 3);
 FIELD(REV_CODE, STYLE,             23, 1);
 
+typedef enum RaspiProcessorId {
+    PROCESSOR_ID_BCM2836 = 1,
+    PROCESSOR_ID_BCM2837 = 2,
+} RaspiProcessorId;
+
+static const struct {
+    const char *type;
+    int cores_count;
+} soc_property[] = {
+    [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS},
+    [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS},
+};
+
 static uint64_t board_ram_size(uint32_t board_rev)
 {
     assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
     return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE);
 }
 
-static int board_processor_id(uint32_t board_rev)
+static RaspiProcessorId board_processor_id(uint32_t board_rev)
 {
+    int proc_id = FIELD_EX32(board_rev, REV_CODE, PROCESSOR);;
+
     assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
-    return FIELD_EX32(board_rev, REV_CODE, PROCESSOR);
+    assert(proc_id < ARRAY_SIZE(soc_property) && soc_property[proc_id].type);
+
+    return proc_id;
 }
 
 static int board_version(uint32_t board_rev)
@@ -88,32 +105,12 @@ static int board_version(uint32_t board_rev)
 
 static const char *board_soc_type(uint32_t board_rev)
 {
-    static const char *soc_types[] = {
-        NULL, TYPE_BCM2836, TYPE_BCM2837,
-    };
-    int proc_id = board_processor_id(board_rev);
-
-    if (proc_id >= ARRAY_SIZE(soc_types) || !soc_types[proc_id]) {
-        error_report("Unsupported processor id '%d' (board revision: 0x%x)",
-                     proc_id, board_rev);
-        exit(1);
-    }
-    return soc_types[proc_id];
+    return soc_property[board_processor_id(board_rev)].type;
 }
 
 static int cores_count(uint32_t board_rev)
 {
-    static const int soc_cores_count[] = {
-        0, BCM283X_NCPUS, BCM283X_NCPUS,
-    };
-    int proc_id = board_processor_id(board_rev);
-
-    if (proc_id >= ARRAY_SIZE(soc_cores_count) || !soc_cores_count[proc_id]) {
-        error_report("Unsupported processor id '%d' (board revision: 0x%x)",
-                     proc_id, board_rev);
-        exit(1);
-    }
-    return soc_cores_count[proc_id];
+    return soc_property[board_processor_id(board_rev)].cores_count;
 }
 
 static const char *board_type(uint32_t board_rev)
-- 
2.21.1

Re: [PATCH v2 04/13] hw/arm/raspi: Introduce RaspiProcessorId enum

[Luc Michel]

Hi Phil,

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> As we only support a reduced set of the REV_CODE_PROCESSOR id
> encoded in the board revision, define the PROCESSOR_ID values
> as an enum. We can simplify the board_soc_type and cores_count
> methods.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/arm/raspi.c | 45 +++++++++++++++++++++------------------------
>  1 file changed, 21 insertions(+), 24 deletions(-)
> 
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index d9e8acfe3b..b628dadf34 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -69,16 +69,33 @@ FIELD(REV_CODE, MANUFACTURER,      16, 4);
>  FIELD(REV_CODE, MEMORY_SIZE,       20, 3);
>  FIELD(REV_CODE, STYLE,             23, 1);
>  
> +typedef enum RaspiProcessorId {
> +    PROCESSOR_ID_BCM2836 = 1,
> +    PROCESSOR_ID_BCM2837 = 2,
> +} RaspiProcessorId;
> +
> +static const struct {
> +    const char *type;
> +    int cores_count;
> +} soc_property[] = {
> +    [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS},
> +    [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS},
> +};
> +
>  static uint64_t board_ram_size(uint32_t board_rev)
>  {
>      assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
>      return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE);
>  }
>  
> -static int board_processor_id(uint32_t board_rev)
> +static RaspiProcessorId board_processor_id(uint32_t board_rev)
>  {
> +    int proc_id = FIELD_EX32(board_rev, REV_CODE, PROCESSOR);;
You have a superfluous semicolon here.

Apart from that:

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> +
>      assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
> -    return FIELD_EX32(board_rev, REV_CODE, PROCESSOR);
> +    assert(proc_id < ARRAY_SIZE(soc_property) && soc_property[proc_id].type);
> +
> +    return proc_id;
>  }
>  
>  static int board_version(uint32_t board_rev)
> @@ -88,32 +105,12 @@ static int board_version(uint32_t board_rev)
>  
>  static const char *board_soc_type(uint32_t board_rev)
>  {
> -    static const char *soc_types[] = {
> -        NULL, TYPE_BCM2836, TYPE_BCM2837,
> -    };
> -    int proc_id = board_processor_id(board_rev);
> -
> -    if (proc_id >= ARRAY_SIZE(soc_types) || !soc_types[proc_id]) {
> -        error_report("Unsupported processor id '%d' (board revision: 0x%x)",
> -                     proc_id, board_rev);
> -        exit(1);
> -    }
> -    return soc_types[proc_id];
> +    return soc_property[board_processor_id(board_rev)].type;
>  }
>  
>  static int cores_count(uint32_t board_rev)
>  {
> -    static const int soc_cores_count[] = {
> -        0, BCM283X_NCPUS, BCM283X_NCPUS,
> -    };
> -    int proc_id = board_processor_id(board_rev);
> -
> -    if (proc_id >= ARRAY_SIZE(soc_cores_count) || !soc_cores_count[proc_id]) {
> -        error_report("Unsupported processor id '%d' (board revision: 0x%x)",
> -                     proc_id, board_rev);
> -        exit(1);
> -    }
> -    return soc_cores_count[proc_id];
> +    return soc_property[board_processor_id(board_rev)].cores_count;
>  }
>  
>  static const char *board_type(uint32_t board_rev)
> 

[PATCH v2 05/13] hw/arm/raspi: Remove use of the 'version' value in the board code

[Philippe Mathieu-Daudé]

We expected the 'version' ID to match the board processor ID,
but this is not always true (for example boards with revision
id 0xa02042/0xa22042 are Raspberry Pi 2 with a BCM2837 SoC).
This was not important because we were not modelling them, but
since the recent refactor now allow to model these boards, it
is safer to check the processor id directly. Remove the version
check.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/raspi.c | 37 ++++++++++++++++++++-----------------
 1 file changed, 20 insertions(+), 17 deletions(-)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index b628dadf34..fff501affb 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -98,11 +98,6 @@ static RaspiProcessorId board_processor_id(uint32_t board_rev)
     return proc_id;
 }
 
-static int board_version(uint32_t board_rev)
-{
-    return board_processor_id(board_rev) + 1;
-}
-
 static const char *board_soc_type(uint32_t board_rev)
 {
     return soc_property[board_processor_id(board_rev)].type;
@@ -201,7 +196,8 @@ static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
     cpu_set_pc(cs, info->smp_loader_start);
 }
 
-static void setup_boot(MachineState *machine, int version, size_t ram_size)
+static void setup_boot(MachineState *machine, RaspiProcessorId processor_id,
+                       size_t ram_size)
 {
     static struct arm_boot_info binfo;
     int r;
@@ -210,12 +206,13 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
     binfo.ram_size = ram_size;
     binfo.nb_cpus = machine->smp.cpus;
 
-    if (version <= 2) {
-        /* The rpi1 and 2 require some custom setup code to run in Secure
-         * mode before booting a kernel (to set up the SMC vectors so
-         * that we get a no-op SMC; this is used by Linux to call the
+    if (processor_id <= PROCESSOR_ID_BCM2836) {
+        /*
+         * The BCM2835 and BCM2836 require some custom setup code to run
+         * in Secure mode before booting a kernel (to set up the SMC vectors
+         * so that we get a no-op SMC; this is used by Linux to call the
          * firmware for some cache maintenance operations.
-         * The rpi3 doesn't need this.
+         * The BCM2837 doesn't need this.
          */
         binfo.board_setup_addr = BOARDSETUP_ADDR;
         binfo.write_board_setup = write_board_setup;
@@ -223,10 +220,10 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
         binfo.secure_boot = true;
     }
 
-    /* Pi2 and Pi3 requires SMP setup */
-    if (version >= 2) {
+    /* BCM2836 and BCM2837 requires SMP setup */
+    if (processor_id >= PROCESSOR_ID_BCM2836) {
         binfo.smp_loader_start = SMPBOOT_ADDR;
-        if (version == 2) {
+        if (processor_id == PROCESSOR_ID_BCM2836) {
             binfo.write_secondary_boot = write_smpboot;
         } else {
             binfo.write_secondary_boot = write_smpboot64;
@@ -238,7 +235,13 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
      * the normal Linux boot process
      */
     if (machine->firmware) {
-        hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : FIRMWARE_ADDR_2;
+        hwaddr firmware_addr;
+
+        if (processor_id == PROCESSOR_ID_BCM2837) {
+            firmware_addr = FIRMWARE_ADDR_3;
+        } else {
+            firmware_addr = FIRMWARE_ADDR_2;
+        }
         /* load the firmware image (typically kernel.img) */
         r = load_image_targphys(machine->firmware, firmware_addr,
                                 ram_size - firmware_addr);
@@ -259,7 +262,6 @@ static void raspi_machine_init(MachineState *machine)
     RaspiMachineClass *mc = RASPI_MACHINE_GET_CLASS(machine);
     RaspiMachineState *s = RASPI_MACHINE(machine);
     uint32_t board_rev = mc->board_rev;
-    int version = board_version(board_rev);
     uint64_t ram_size = board_ram_size(board_rev);
     uint32_t vcram_size;
     DriveInfo *di;
@@ -303,7 +305,8 @@ static void raspi_machine_init(MachineState *machine)
 
     vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size",
                                           &error_abort);
-    setup_boot(machine, version, machine->ram_size - vcram_size);
+    setup_boot(machine, board_processor_id(mc->board_rev),
+               machine->ram_size - vcram_size);
 }
 
 static void raspi_machine_class_common_init(MachineClass *mc,
-- 
2.21.1

Re: [PATCH v2 05/13] hw/arm/raspi: Remove use of the 'version' value in the board code

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> We expected the 'version' ID to match the board processor ID,
> but this is not always true (for example boards with revision
> id 0xa02042/0xa22042 are Raspberry Pi 2 with a BCM2837 SoC).
> This was not important because we were not modelling them, but
> since the recent refactor now allow to model these boards, it
> is safer to check the processor id directly. Remove the version
> check.
> 
> Suggested-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/arm/raspi.c | 37 ++++++++++++++++++++-----------------
>  1 file changed, 20 insertions(+), 17 deletions(-)
> 
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index b628dadf34..fff501affb 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -98,11 +98,6 @@ static RaspiProcessorId board_processor_id(uint32_t board_rev)
>      return proc_id;
>  }
>  
> -static int board_version(uint32_t board_rev)
> -{
> -    return board_processor_id(board_rev) + 1;
> -}
> -
>  static const char *board_soc_type(uint32_t board_rev)
>  {
>      return soc_property[board_processor_id(board_rev)].type;
> @@ -201,7 +196,8 @@ static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
>      cpu_set_pc(cs, info->smp_loader_start);
>  }
>  
> -static void setup_boot(MachineState *machine, int version, size_t ram_size)
> +static void setup_boot(MachineState *machine, RaspiProcessorId processor_id,
> +                       size_t ram_size)
>  {
>      static struct arm_boot_info binfo;
>      int r;
> @@ -210,12 +206,13 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
>      binfo.ram_size = ram_size;
>      binfo.nb_cpus = machine->smp.cpus;
>  
> -    if (version <= 2) {
> -        /* The rpi1 and 2 require some custom setup code to run in Secure
> -         * mode before booting a kernel (to set up the SMC vectors so
> -         * that we get a no-op SMC; this is used by Linux to call the
> +    if (processor_id <= PROCESSOR_ID_BCM2836) {
> +        /*
> +         * The BCM2835 and BCM2836 require some custom setup code to run
> +         * in Secure mode before booting a kernel (to set up the SMC vectors
> +         * so that we get a no-op SMC; this is used by Linux to call the
>           * firmware for some cache maintenance operations.
> -         * The rpi3 doesn't need this.
> +         * The BCM2837 doesn't need this.
>           */
>          binfo.board_setup_addr = BOARDSETUP_ADDR;
>          binfo.write_board_setup = write_board_setup;
> @@ -223,10 +220,10 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
>          binfo.secure_boot = true;
>      }
>  
> -    /* Pi2 and Pi3 requires SMP setup */
> -    if (version >= 2) {
> +    /* BCM2836 and BCM2837 requires SMP setup */
> +    if (processor_id >= PROCESSOR_ID_BCM2836) {
>          binfo.smp_loader_start = SMPBOOT_ADDR;
> -        if (version == 2) {
> +        if (processor_id == PROCESSOR_ID_BCM2836) {
>              binfo.write_secondary_boot = write_smpboot;
>          } else {
>              binfo.write_secondary_boot = write_smpboot64;
> @@ -238,7 +235,13 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
>       * the normal Linux boot process
>       */
>      if (machine->firmware) {
> -        hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : FIRMWARE_ADDR_2;
> +        hwaddr firmware_addr;
> +
> +        if (processor_id == PROCESSOR_ID_BCM2837) {
> +            firmware_addr = FIRMWARE_ADDR_3;
> +        } else {
> +            firmware_addr = FIRMWARE_ADDR_2;
Maybe rename those constants too, because now that the version is gone,
we can wonder what those 2 and 3 mean. By the way since this firmware
address seems processor ID specific, maybe you can put them in your
soc_property structure?

Anyway with or without those modifications:

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> +        }
>          /* load the firmware image (typically kernel.img) */
>          r = load_image_targphys(machine->firmware, firmware_addr,
>                                  ram_size - firmware_addr);
> @@ -259,7 +262,6 @@ static void raspi_machine_init(MachineState *machine)
>      RaspiMachineClass *mc = RASPI_MACHINE_GET_CLASS(machine);
>      RaspiMachineState *s = RASPI_MACHINE(machine);
>      uint32_t board_rev = mc->board_rev;
> -    int version = board_version(board_rev);
>      uint64_t ram_size = board_ram_size(board_rev);
>      uint32_t vcram_size;
>      DriveInfo *di;
> @@ -303,7 +305,8 @@ static void raspi_machine_init(MachineState *machine)
>  
>      vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size",
>                                            &error_abort);
> -    setup_boot(machine, version, machine->ram_size - vcram_size);
> +    setup_boot(machine, board_processor_id(mc->board_rev),
> +               machine->ram_size - vcram_size);
>  }
>  
>  static void raspi_machine_class_common_init(MachineClass *mc,
> 

[PATCH v2 06/13] hw/arm/bcm2836: Restrict BCM283XClass declaration to C source

[Philippe Mathieu-Daudé]

No code out of bcm2836.c uses (or requires) this declarations.
Move it locally to the C source file.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/arm/bcm2836.h | 12 ------------
 hw/arm/bcm2836.c         | 14 ++++++++++++++
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
index 92a6544816..acc75bf553 100644
--- a/include/hw/arm/bcm2836.h
+++ b/include/hw/arm/bcm2836.h
@@ -42,16 +42,4 @@ typedef struct BCM283XState {
     BCM2835PeripheralState peripherals;
 } BCM283XState;
 
-typedef struct BCM283XInfo BCM283XInfo;
-
-typedef struct BCM283XClass {
-    DeviceClass parent_class;
-    const BCM283XInfo *info;
-} BCM283XClass;
-
-#define BCM283X_CLASS(klass) \
-    OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
-#define BCM283X_GET_CLASS(obj) \
-    OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
-
 #endif /* BCM2836_H */
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 38e2941bab..24109fef1d 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -16,6 +16,15 @@
 #include "hw/arm/raspi_platform.h"
 #include "hw/sysbus.h"
 
+typedef struct BCM283XInfo BCM283XInfo;
+
+typedef struct BCM283XClass {
+    /*< private >*/
+    DeviceClass parent_class;
+    /*< public >*/
+    const BCM283XInfo *info;
+} BCM283XClass;
+
 struct BCM283XInfo {
     const char *name;
     const char *cpu_type;
@@ -24,6 +33,11 @@ struct BCM283XInfo {
     int clusterid;
 };
 
+#define BCM283X_CLASS(klass) \
+    OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
+#define BCM283X_GET_CLASS(obj) \
+    OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
+
 static const BCM283XInfo bcm283x_socs[] = {
     {
         .name = TYPE_BCM2836,
-- 
2.21.1

Re: [PATCH v2 06/13] hw/arm/bcm2836: Restrict BCM283XClass declaration to C source

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> No code out of bcm2836.c uses (or requires) this declarations.
> Move it locally to the C source file.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>  include/hw/arm/bcm2836.h | 12 ------------
>  hw/arm/bcm2836.c         | 14 ++++++++++++++
>  2 files changed, 14 insertions(+), 12 deletions(-)
> 
> diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
> index 92a6544816..acc75bf553 100644
> --- a/include/hw/arm/bcm2836.h
> +++ b/include/hw/arm/bcm2836.h
> @@ -42,16 +42,4 @@ typedef struct BCM283XState {
>      BCM2835PeripheralState peripherals;
>  } BCM283XState;
>  
> -typedef struct BCM283XInfo BCM283XInfo;
> -
> -typedef struct BCM283XClass {
> -    DeviceClass parent_class;
> -    const BCM283XInfo *info;
> -} BCM283XClass;
> -
> -#define BCM283X_CLASS(klass) \
> -    OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
> -#define BCM283X_GET_CLASS(obj) \
> -    OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
> -
>  #endif /* BCM2836_H */
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 38e2941bab..24109fef1d 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -16,6 +16,15 @@
>  #include "hw/arm/raspi_platform.h"
>  #include "hw/sysbus.h"
>  
> +typedef struct BCM283XInfo BCM283XInfo;
> +
> +typedef struct BCM283XClass {
> +    /*< private >*/
> +    DeviceClass parent_class;
> +    /*< public >*/
> +    const BCM283XInfo *info;
> +} BCM283XClass;
> +
>  struct BCM283XInfo {
>      const char *name;
>      const char *cpu_type;
> @@ -24,6 +33,11 @@ struct BCM283XInfo {
>      int clusterid;
>  };
>  
> +#define BCM283X_CLASS(klass) \
> +    OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
> +#define BCM283X_GET_CLASS(obj) \
> +    OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
> +
>  static const BCM283XInfo bcm283x_socs[] = {
>      {
>          .name = TYPE_BCM2836,
> 

[PATCH v2 07/13] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type

[Philippe Mathieu-Daudé]

Remove usage of TypeInfo::class_data. Instead fill the fields in
the corresponding class_init().

Cc: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/bcm2836.c | 109 ++++++++++++++++++++++-------------------------
 1 file changed, 51 insertions(+), 58 deletions(-)

diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 24109fef1d..683d04d6ea 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -16,57 +16,30 @@
 #include "hw/arm/raspi_platform.h"
 #include "hw/sysbus.h"
 
-typedef struct BCM283XInfo BCM283XInfo;
-
 typedef struct BCM283XClass {
     /*< private >*/
     DeviceClass parent_class;
     /*< public >*/
-    const BCM283XInfo *info;
-} BCM283XClass;
-
-struct BCM283XInfo {
-    const char *name;
     const char *cpu_type;
     hwaddr peri_base; /* Peripheral base address seen by the CPU */
     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
     int clusterid;
-};
+} BCM283XClass;
 
 #define BCM283X_CLASS(klass) \
     OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
 #define BCM283X_GET_CLASS(obj) \
     OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
 
-static const BCM283XInfo bcm283x_socs[] = {
-    {
-        .name = TYPE_BCM2836,
-        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
-        .peri_base = 0x3f000000,
-        .ctrl_base = 0x40000000,
-        .clusterid = 0xf,
-    },
-#ifdef TARGET_AARCH64
-    {
-        .name = TYPE_BCM2837,
-        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
-        .peri_base = 0x3f000000,
-        .ctrl_base = 0x40000000,
-        .clusterid = 0x0,
-    },
-#endif
-};
-
 static void bcm2836_init(Object *obj)
 {
     BCM283XState *s = BCM283X(obj);
     BCM283XClass *bc = BCM283X_GET_CLASS(obj);
-    const BCM283XInfo *info = bc->info;
     int n;
 
     for (n = 0; n < BCM283X_NCPUS; n++) {
         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
-                                sizeof(s->cpu[n].core), info->cpu_type,
+                                sizeof(s->cpu[n].core), bc->cpu_type,
                                 &error_abort, NULL);
     }
 
@@ -85,7 +58,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
 {
     BCM283XState *s = BCM283X(dev);
     BCM283XClass *bc = BCM283X_GET_CLASS(dev);
-    const BCM283XInfo *info = bc->info;
     Object *obj;
     Error *err = NULL;
     int n;
@@ -119,7 +91,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
     }
 
     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
-                            info->peri_base, 1);
+                            bc->peri_base, 1);
 
     /* bcm2836 interrupt controller (and mailboxes, etc.) */
     object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
@@ -128,7 +100,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
         return;
     }
 
-    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base);
 
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
@@ -137,11 +109,11 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
 
     for (n = 0; n < BCM283X_NCPUS; n++) {
         /* TODO: this should be converted to a property of ARM_CPU */
-        s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
+        s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
 
         /* set periphbase/CBAR value for CPU-local registers */
         object_property_set_int(OBJECT(&s->cpu[n].core),
-                                info->peri_base,
+                                bc->peri_base,
                                 "reset-cbar", &err);
         if (err) {
             error_propagate(errp, err);
@@ -190,38 +162,59 @@ static Property bcm2836_props[] = {
 static void bcm283x_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
-    BCM283XClass *bc = BCM283X_CLASS(oc);
 
-    bc->info = data;
-    dc->realize = bcm2836_realize;
-    device_class_set_props(dc, bcm2836_props);
     /* Reason: Must be wired up in code (see raspi_init() function) */
     dc->user_creatable = false;
 }
 
-static const TypeInfo bcm283x_type_info = {
-    .name = TYPE_BCM283X,
-    .parent = TYPE_DEVICE,
-    .instance_size = sizeof(BCM283XState),
-    .instance_init = bcm2836_init,
-    .class_size = sizeof(BCM283XClass),
-    .abstract = true,
+static void bcm2836_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(oc);
+    BCM283XClass *bc = BCM283X_CLASS(oc);
+
+    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
+    bc->peri_base = 0x3f000000;
+    bc->ctrl_base = 0x40000000;
+    bc->clusterid = 0xf;
+    dc->realize = bcm2836_realize;
+    device_class_set_props(dc, bcm2836_props);
 };
 
-static void bcm2836_register_types(void)
+#ifdef TARGET_AARCH64
+static void bcm2837_class_init(ObjectClass *oc, void *data)
 {
-    int i;
+    DeviceClass *dc = DEVICE_CLASS(oc);
+    BCM283XClass *bc = BCM283X_CLASS(oc);
 
-    type_register_static(&bcm283x_type_info);
-    for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
-        TypeInfo ti = {
-            .name = bcm283x_socs[i].name,
-            .parent = TYPE_BCM283X,
-            .class_init = bcm283x_class_init,
-            .class_data = (void *) &bcm283x_socs[i],
-        };
-        type_register(&ti);
+    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
+    bc->peri_base = 0x3f000000;
+    bc->ctrl_base = 0x40000000;
+    bc->clusterid = 0x0;
+    dc->realize = bcm2836_realize;
+    device_class_set_props(dc, bcm2836_props);
+};
+#endif
+
+static const TypeInfo bcm283x_types[] = {
+    {
+        .name           = TYPE_BCM2836,
+        .parent         = TYPE_BCM283X,
+        .class_init     = bcm2836_class_init,
+#ifdef TARGET_AARCH64
+    }, {
+        .name           = TYPE_BCM2837,
+        .parent         = TYPE_BCM283X,
+        .class_init     = bcm2837_class_init,
+#endif
+    }, {
+        .name           = TYPE_BCM283X,
+        .parent         = TYPE_DEVICE,
+        .instance_size  = sizeof(BCM283XState),
+        .instance_init  = bcm2836_init,
+        .class_size     = sizeof(BCM283XClass),
+        .class_init     = bcm283x_class_init,
+        .abstract       = true,
     }
-}
+};
 
-type_init(bcm2836_register_types)
+DEFINE_TYPES(bcm283x_types)
-- 
2.21.1

Re: [PATCH v2 07/13] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type

[Igor Mammedov]

On Mon, 17 Feb 2020 12:45:27 +0100
Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:

> Remove usage of TypeInfo::class_data. Instead fill the fields in
> the corresponding class_init().
> 
> Cc: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/arm/bcm2836.c | 109 ++++++++++++++++++++++-------------------------
>  1 file changed, 51 insertions(+), 58 deletions(-)
> 
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 24109fef1d..683d04d6ea 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -16,57 +16,30 @@
>  #include "hw/arm/raspi_platform.h"
>  #include "hw/sysbus.h"
>  
> -typedef struct BCM283XInfo BCM283XInfo;
> -
>  typedef struct BCM283XClass {
>      /*< private >*/
>      DeviceClass parent_class;
>      /*< public >*/
> -    const BCM283XInfo *info;
> -} BCM283XClass;
> -
> -struct BCM283XInfo {
> -    const char *name;

>      const char *cpu_type;

probably could be cleaned up by using machine->cpu_type/machine_class->default_cpu_type
(no need to change this patch as it's separate issue)


>      hwaddr peri_base; /* Peripheral base address seen by the CPU */
>      hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
>      int clusterid;
> -};
> +} BCM283XClass;
>  
>  #define BCM283X_CLASS(klass) \
>      OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
>  #define BCM283X_GET_CLASS(obj) \
>      OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
>  
> -static const BCM283XInfo bcm283x_socs[] = {
> -    {
> -        .name = TYPE_BCM2836,
> -        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
> -        .peri_base = 0x3f000000,
> -        .ctrl_base = 0x40000000,
> -        .clusterid = 0xf,
> -    },
> -#ifdef TARGET_AARCH64
> -    {
> -        .name = TYPE_BCM2837,
> -        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
> -        .peri_base = 0x3f000000,
> -        .ctrl_base = 0x40000000,
> -        .clusterid = 0x0,
> -    },
> -#endif
> -};
> -
>  static void bcm2836_init(Object *obj)
>  {
>      BCM283XState *s = BCM283X(obj);
>      BCM283XClass *bc = BCM283X_GET_CLASS(obj);
> -    const BCM283XInfo *info = bc->info;
>      int n;
>  
>      for (n = 0; n < BCM283X_NCPUS; n++) {
>          object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
> -                                sizeof(s->cpu[n].core), info->cpu_type,
> +                                sizeof(s->cpu[n].core), bc->cpu_type,
>                                  &error_abort, NULL);
>      }
>  
> @@ -85,7 +58,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>  {
>      BCM283XState *s = BCM283X(dev);
>      BCM283XClass *bc = BCM283X_GET_CLASS(dev);
> -    const BCM283XInfo *info = bc->info;
>      Object *obj;
>      Error *err = NULL;
>      int n;
> @@ -119,7 +91,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>      }
>  
>      sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
> -                            info->peri_base, 1);
> +                            bc->peri_base, 1);
>  
>      /* bcm2836 interrupt controller (and mailboxes, etc.) */
>      object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
> @@ -128,7 +100,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>          return;
>      }
>  
> -    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base);
>  
>      sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
>          qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
> @@ -137,11 +109,11 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>  
>      for (n = 0; n < BCM283X_NCPUS; n++) {
>          /* TODO: this should be converted to a property of ARM_CPU */
> -        s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
> +        s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
>  
>          /* set periphbase/CBAR value for CPU-local registers */
>          object_property_set_int(OBJECT(&s->cpu[n].core),
> -                                info->peri_base,
> +                                bc->peri_base,
>                                  "reset-cbar", &err);
>          if (err) {
>              error_propagate(errp, err);
> @@ -190,38 +162,59 @@ static Property bcm2836_props[] = {
>  static void bcm283x_class_init(ObjectClass *oc, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
> -    BCM283XClass *bc = BCM283X_CLASS(oc);
>  
> -    bc->info = data;
> -    dc->realize = bcm2836_realize;
> -    device_class_set_props(dc, bcm2836_props);
>      /* Reason: Must be wired up in code (see raspi_init() function) */
>      dc->user_creatable = false;
>  }
>  
> -static const TypeInfo bcm283x_type_info = {
> -    .name = TYPE_BCM283X,
> -    .parent = TYPE_DEVICE,
> -    .instance_size = sizeof(BCM283XState),
> -    .instance_init = bcm2836_init,
> -    .class_size = sizeof(BCM283XClass),
> -    .abstract = true,
> +static void bcm2836_class_init(ObjectClass *oc, void *data)
> +{
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +    BCM283XClass *bc = BCM283X_CLASS(oc);
> +
> +    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
> +    bc->peri_base = 0x3f000000;
> +    bc->ctrl_base = 0x40000000;
> +    bc->clusterid = 0xf;
> +    dc->realize = bcm2836_realize;
> +    device_class_set_props(dc, bcm2836_props);
>  };
>  
> -static void bcm2836_register_types(void)
> +#ifdef TARGET_AARCH64
> +static void bcm2837_class_init(ObjectClass *oc, void *data)
>  {
> -    int i;
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +    BCM283XClass *bc = BCM283X_CLASS(oc);
>  
> -    type_register_static(&bcm283x_type_info);
> -    for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
> -        TypeInfo ti = {
> -            .name = bcm283x_socs[i].name,
> -            .parent = TYPE_BCM283X,
> -            .class_init = bcm283x_class_init,
> -            .class_data = (void *) &bcm283x_socs[i],
> -        };
> -        type_register(&ti);
> +    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> +    bc->peri_base = 0x3f000000;
> +    bc->ctrl_base = 0x40000000;
> +    bc->clusterid = 0x0;
> +    dc->realize = bcm2836_realize;
> +    device_class_set_props(dc, bcm2836_props);
both children do use the same values for almost all fields.
I'd set in children class_init()s only cpu_type/clusterid
and keep common bits in base class.


> +};
> +#endif
> +
> +static const TypeInfo bcm283x_types[] = {
> +    {
> +        .name           = TYPE_BCM2836,
> +        .parent         = TYPE_BCM283X,
> +        .class_init     = bcm2836_class_init,
> +#ifdef TARGET_AARCH64
> +    }, {
> +        .name           = TYPE_BCM2837,
> +        .parent         = TYPE_BCM283X,
> +        .class_init     = bcm2837_class_init,
> +#endif
> +    }, {
> +        .name           = TYPE_BCM283X,
> +        .parent         = TYPE_DEVICE,
> +        .instance_size  = sizeof(BCM283XState),
> +        .instance_init  = bcm2836_init,
> +        .class_size     = sizeof(BCM283XClass),
> +        .class_init     = bcm283x_class_init,
> +        .abstract       = true,
>      }
> -}
> +};
>  
> -type_init(bcm2836_register_types)
> +DEFINE_TYPES(bcm283x_types)

Re: [PATCH v2 07/13] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type

[Philippe Mathieu-Daudé]

On 2/18/20 6:04 PM, Igor Mammedov wrote:
> On Mon, 17 Feb 2020 12:45:27 +0100
> Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> 
>> Remove usage of TypeInfo::class_data. Instead fill the fields in
>> the corresponding class_init().
>>
>> Cc: Igor Mammedov <imammedo@redhat.com>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>   hw/arm/bcm2836.c | 109 ++++++++++++++++++++++-------------------------
>>   1 file changed, 51 insertions(+), 58 deletions(-)
>>
>> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
>> index 24109fef1d..683d04d6ea 100644
>> --- a/hw/arm/bcm2836.c
>> +++ b/hw/arm/bcm2836.c
>> @@ -16,57 +16,30 @@
>>   #include "hw/arm/raspi_platform.h"
>>   #include "hw/sysbus.h"
>>   
>> -typedef struct BCM283XInfo BCM283XInfo;
>> -
>>   typedef struct BCM283XClass {
>>       /*< private >*/
>>       DeviceClass parent_class;
>>       /*< public >*/
>> -    const BCM283XInfo *info;
>> -} BCM283XClass;
>> -
>> -struct BCM283XInfo {
>> -    const char *name;
> 
>>       const char *cpu_type;
> 
> probably could be cleaned up by using machine->cpu_type/machine_class->default_cpu_type
> (no need to change this patch as it's separate issue)

Hmm the core_type is tied to the SoC, not to the machine. The machine 
only selects a SoC and gets the cpu cores that come with it. The problem 
is QEMU does not provide interface to select SoC from cmdline, only CPU.

> 
> 
>>       hwaddr peri_base; /* Peripheral base address seen by the CPU */
>>       hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
>>       int clusterid;
>> -};
>> +} BCM283XClass;
>>   
>>   #define BCM283X_CLASS(klass) \
>>       OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
>>   #define BCM283X_GET_CLASS(obj) \
>>       OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
>>   
>> -static const BCM283XInfo bcm283x_socs[] = {
>> -    {
>> -        .name = TYPE_BCM2836,
>> -        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
>> -        .peri_base = 0x3f000000,
>> -        .ctrl_base = 0x40000000,
>> -        .clusterid = 0xf,
>> -    },
>> -#ifdef TARGET_AARCH64
>> -    {
>> -        .name = TYPE_BCM2837,
>> -        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
>> -        .peri_base = 0x3f000000,
>> -        .ctrl_base = 0x40000000,
>> -        .clusterid = 0x0,
>> -    },
>> -#endif
>> -};
>> -
>>   static void bcm2836_init(Object *obj)
>>   {
>>       BCM283XState *s = BCM283X(obj);
>>       BCM283XClass *bc = BCM283X_GET_CLASS(obj);
>> -    const BCM283XInfo *info = bc->info;
>>       int n;
>>   
>>       for (n = 0; n < BCM283X_NCPUS; n++) {
>>           object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
>> -                                sizeof(s->cpu[n].core), info->cpu_type,
>> +                                sizeof(s->cpu[n].core), bc->cpu_type,
>>                                   &error_abort, NULL);
>>       }
>>   
>> @@ -85,7 +58,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>>   {
>>       BCM283XState *s = BCM283X(dev);
>>       BCM283XClass *bc = BCM283X_GET_CLASS(dev);
>> -    const BCM283XInfo *info = bc->info;
>>       Object *obj;
>>       Error *err = NULL;
>>       int n;
>> @@ -119,7 +91,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>>       }
>>   
>>       sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
>> -                            info->peri_base, 1);
>> +                            bc->peri_base, 1);
>>   
>>       /* bcm2836 interrupt controller (and mailboxes, etc.) */
>>       object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
>> @@ -128,7 +100,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>>           return;
>>       }
>>   
>> -    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
>> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base);
>>   
>>       sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
>>           qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
>> @@ -137,11 +109,11 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>>   
>>       for (n = 0; n < BCM283X_NCPUS; n++) {
>>           /* TODO: this should be converted to a property of ARM_CPU */
>> -        s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
>> +        s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
>>   
>>           /* set periphbase/CBAR value for CPU-local registers */
>>           object_property_set_int(OBJECT(&s->cpu[n].core),
>> -                                info->peri_base,
>> +                                bc->peri_base,
>>                                   "reset-cbar", &err);
>>           if (err) {
>>               error_propagate(errp, err);
>> @@ -190,38 +162,59 @@ static Property bcm2836_props[] = {
>>   static void bcm283x_class_init(ObjectClass *oc, void *data)
>>   {
>>       DeviceClass *dc = DEVICE_CLASS(oc);
>> -    BCM283XClass *bc = BCM283X_CLASS(oc);
>>   
>> -    bc->info = data;
>> -    dc->realize = bcm2836_realize;
>> -    device_class_set_props(dc, bcm2836_props);
>>       /* Reason: Must be wired up in code (see raspi_init() function) */
>>       dc->user_creatable = false;
>>   }
>>   
>> -static const TypeInfo bcm283x_type_info = {
>> -    .name = TYPE_BCM283X,
>> -    .parent = TYPE_DEVICE,
>> -    .instance_size = sizeof(BCM283XState),
>> -    .instance_init = bcm2836_init,
>> -    .class_size = sizeof(BCM283XClass),
>> -    .abstract = true,
>> +static void bcm2836_class_init(ObjectClass *oc, void *data)
>> +{
>> +    DeviceClass *dc = DEVICE_CLASS(oc);
>> +    BCM283XClass *bc = BCM283X_CLASS(oc);
>> +
>> +    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
>> +    bc->peri_base = 0x3f000000;
>> +    bc->ctrl_base = 0x40000000;
>> +    bc->clusterid = 0xf;
>> +    dc->realize = bcm2836_realize;
>> +    device_class_set_props(dc, bcm2836_props);
>>   };
>>   
>> -static void bcm2836_register_types(void)
>> +#ifdef TARGET_AARCH64
>> +static void bcm2837_class_init(ObjectClass *oc, void *data)
>>   {
>> -    int i;
>> +    DeviceClass *dc = DEVICE_CLASS(oc);
>> +    BCM283XClass *bc = BCM283X_CLASS(oc);
>>   
>> -    type_register_static(&bcm283x_type_info);
>> -    for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
>> -        TypeInfo ti = {
>> -            .name = bcm283x_socs[i].name,
>> -            .parent = TYPE_BCM283X,
>> -            .class_init = bcm283x_class_init,
>> -            .class_data = (void *) &bcm283x_socs[i],
>> -        };
>> -        type_register(&ti);
>> +    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
>> +    bc->peri_base = 0x3f000000;
>> +    bc->ctrl_base = 0x40000000;
>> +    bc->clusterid = 0x0;
>> +    dc->realize = bcm2836_realize;
>> +    device_class_set_props(dc, bcm2836_props);
> both children do use the same values for almost all fields.
> I'd set in children class_init()s only cpu_type/clusterid
> and keep common bits in base class.

Yes so far, but then the BCM2711/BCM2838 for raspi4 changes all fields.

> 
>> +};
>> +#endif
>> +
>> +static const TypeInfo bcm283x_types[] = {
>> +    {
>> +        .name           = TYPE_BCM2836,
>> +        .parent         = TYPE_BCM283X,
>> +        .class_init     = bcm2836_class_init,
>> +#ifdef TARGET_AARCH64
>> +    }, {
>> +        .name           = TYPE_BCM2837,
>> +        .parent         = TYPE_BCM283X,
>> +        .class_init     = bcm2837_class_init,
>> +#endif
>> +    }, {
>> +        .name           = TYPE_BCM283X,
>> +        .parent         = TYPE_DEVICE,
>> +        .instance_size  = sizeof(BCM283XState),
>> +        .instance_init  = bcm2836_init,
>> +        .class_size     = sizeof(BCM283XClass),
>> +        .class_init     = bcm283x_class_init,
>> +        .abstract       = true,
>>       }
>> -}
>> +};
>>   
>> -type_init(bcm2836_register_types)
>> +DEFINE_TYPES(bcm283x_types)
> 

Re: [PATCH v2 07/13] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type

[Igor Mammedov]

On Tue, 18 Feb 2020 18:39:49 +0100
Philippe Mathieu-Daudé <philmd@redhat.com> wrote:

> On 2/18/20 6:04 PM, Igor Mammedov wrote:
> > On Mon, 17 Feb 2020 12:45:27 +0100
> > Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> >   
> >> Remove usage of TypeInfo::class_data. Instead fill the fields in
> >> the corresponding class_init().
> >>
> >> Cc: Igor Mammedov <imammedo@redhat.com>
> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >> ---
> >>   hw/arm/bcm2836.c | 109 ++++++++++++++++++++++-------------------------
> >>   1 file changed, 51 insertions(+), 58 deletions(-)
> >>
> >> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> >> index 24109fef1d..683d04d6ea 100644
> >> --- a/hw/arm/bcm2836.c
> >> +++ b/hw/arm/bcm2836.c
> >> @@ -16,57 +16,30 @@
> >>   #include "hw/arm/raspi_platform.h"
> >>   #include "hw/sysbus.h"
> >>   
> >> -typedef struct BCM283XInfo BCM283XInfo;
> >> -
> >>   typedef struct BCM283XClass {
> >>       /*< private >*/
> >>       DeviceClass parent_class;
> >>       /*< public >*/
> >> -    const BCM283XInfo *info;
> >> -} BCM283XClass;
> >> -
> >> -struct BCM283XInfo {
> >> -    const char *name;  
> >   
> >>       const char *cpu_type;  
> > 
> > probably could be cleaned up by using machine->cpu_type/machine_class->default_cpu_type
> > (no need to change this patch as it's separate issue)  
> 
> Hmm the core_type is tied to the SoC, not to the machine. The machine 
> only selects a SoC and gets the cpu cores that come with it. The problem 
> is QEMU does not provide interface to select SoC from cmdline, only CPU.
> 
> > 
> >   
> >>       hwaddr peri_base; /* Peripheral base address seen by the CPU */
> >>       hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
> >>       int clusterid;
> >> -};
> >> +} BCM283XClass;
> >>   
> >>   #define BCM283X_CLASS(klass) \
> >>       OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
> >>   #define BCM283X_GET_CLASS(obj) \
> >>       OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
> >>   
> >> -static const BCM283XInfo bcm283x_socs[] = {
> >> -    {
> >> -        .name = TYPE_BCM2836,
> >> -        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
> >> -        .peri_base = 0x3f000000,
> >> -        .ctrl_base = 0x40000000,
> >> -        .clusterid = 0xf,
> >> -    },
> >> -#ifdef TARGET_AARCH64
> >> -    {
> >> -        .name = TYPE_BCM2837,
> >> -        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
> >> -        .peri_base = 0x3f000000,
> >> -        .ctrl_base = 0x40000000,
> >> -        .clusterid = 0x0,
> >> -    },
> >> -#endif
> >> -};
> >> -
> >>   static void bcm2836_init(Object *obj)
> >>   {
> >>       BCM283XState *s = BCM283X(obj);
> >>       BCM283XClass *bc = BCM283X_GET_CLASS(obj);
> >> -    const BCM283XInfo *info = bc->info;
> >>       int n;
> >>   
> >>       for (n = 0; n < BCM283X_NCPUS; n++) {
> >>           object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
> >> -                                sizeof(s->cpu[n].core), info->cpu_type,
> >> +                                sizeof(s->cpu[n].core), bc->cpu_type,
> >>                                   &error_abort, NULL);
> >>       }
> >>   
> >> @@ -85,7 +58,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
> >>   {
> >>       BCM283XState *s = BCM283X(dev);
> >>       BCM283XClass *bc = BCM283X_GET_CLASS(dev);
> >> -    const BCM283XInfo *info = bc->info;
> >>       Object *obj;
> >>       Error *err = NULL;
> >>       int n;
> >> @@ -119,7 +91,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
> >>       }
> >>   
> >>       sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
> >> -                            info->peri_base, 1);
> >> +                            bc->peri_base, 1);
> >>   
> >>       /* bcm2836 interrupt controller (and mailboxes, etc.) */
> >>       object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
> >> @@ -128,7 +100,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
> >>           return;
> >>       }
> >>   
> >> -    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
> >> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base);
> >>   
> >>       sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
> >>           qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
> >> @@ -137,11 +109,11 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
> >>   
> >>       for (n = 0; n < BCM283X_NCPUS; n++) {
> >>           /* TODO: this should be converted to a property of ARM_CPU */
> >> -        s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
> >> +        s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
> >>   
> >>           /* set periphbase/CBAR value for CPU-local registers */
> >>           object_property_set_int(OBJECT(&s->cpu[n].core),
> >> -                                info->peri_base,
> >> +                                bc->peri_base,
> >>                                   "reset-cbar", &err);
> >>           if (err) {
> >>               error_propagate(errp, err);
> >> @@ -190,38 +162,59 @@ static Property bcm2836_props[] = {
> >>   static void bcm283x_class_init(ObjectClass *oc, void *data)
> >>   {
> >>       DeviceClass *dc = DEVICE_CLASS(oc);
> >> -    BCM283XClass *bc = BCM283X_CLASS(oc);
> >>   
> >> -    bc->info = data;
> >> -    dc->realize = bcm2836_realize;
> >> -    device_class_set_props(dc, bcm2836_props);
> >>       /* Reason: Must be wired up in code (see raspi_init() function) */
> >>       dc->user_creatable = false;
> >>   }
> >>   
> >> -static const TypeInfo bcm283x_type_info = {
> >> -    .name = TYPE_BCM283X,
> >> -    .parent = TYPE_DEVICE,
> >> -    .instance_size = sizeof(BCM283XState),
> >> -    .instance_init = bcm2836_init,
> >> -    .class_size = sizeof(BCM283XClass),
> >> -    .abstract = true,
> >> +static void bcm2836_class_init(ObjectClass *oc, void *data)
> >> +{
> >> +    DeviceClass *dc = DEVICE_CLASS(oc);
> >> +    BCM283XClass *bc = BCM283X_CLASS(oc);
> >> +
> >> +    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
> >> +    bc->peri_base = 0x3f000000;
> >> +    bc->ctrl_base = 0x40000000;
> >> +    bc->clusterid = 0xf;
> >> +    dc->realize = bcm2836_realize;
> >> +    device_class_set_props(dc, bcm2836_props);
> >>   };
> >>   
> >> -static void bcm2836_register_types(void)
> >> +#ifdef TARGET_AARCH64
> >> +static void bcm2837_class_init(ObjectClass *oc, void *data)
> >>   {
> >> -    int i;
> >> +    DeviceClass *dc = DEVICE_CLASS(oc);
> >> +    BCM283XClass *bc = BCM283X_CLASS(oc);
> >>   
> >> -    type_register_static(&bcm283x_type_info);
> >> -    for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
> >> -        TypeInfo ti = {
> >> -            .name = bcm283x_socs[i].name,
> >> -            .parent = TYPE_BCM283X,
> >> -            .class_init = bcm283x_class_init,
> >> -            .class_data = (void *) &bcm283x_socs[i],
> >> -        };
> >> -        type_register(&ti);
> >> +    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> >> +    bc->peri_base = 0x3f000000;
> >> +    bc->ctrl_base = 0x40000000;
> >> +    bc->clusterid = 0x0;
> >> +    dc->realize = bcm2836_realize;
> >> +    device_class_set_props(dc, bcm2836_props);  
> > both children do use the same values for almost all fields.
> > I'd set in children class_init()s only cpu_type/clusterid
> > and keep common bits in base class.  
> 
> Yes so far, but then the BCM2711/BCM2838 for raspi4 changes all fields.

I this case, maybe add this as justification to commit message.

With that change
  Reviewed-by: Igor Mammedov <imammedo@redhat.com>

> 
> >   
> >> +};
> >> +#endif
> >> +
> >> +static const TypeInfo bcm283x_types[] = {
> >> +    {
> >> +        .name           = TYPE_BCM2836,
> >> +        .parent         = TYPE_BCM283X,
> >> +        .class_init     = bcm2836_class_init,
> >> +#ifdef TARGET_AARCH64
> >> +    }, {
> >> +        .name           = TYPE_BCM2837,
> >> +        .parent         = TYPE_BCM283X,
> >> +        .class_init     = bcm2837_class_init,
> >> +#endif
> >> +    }, {
> >> +        .name           = TYPE_BCM283X,
> >> +        .parent         = TYPE_DEVICE,
> >> +        .instance_size  = sizeof(BCM283XState),
> >> +        .instance_init  = bcm2836_init,
> >> +        .class_size     = sizeof(BCM283XClass),
> >> +        .class_init     = bcm283x_class_init,
> >> +        .abstract       = true,
> >>       }
> >> -}
> >> +};
> >>   
> >> -type_init(bcm2836_register_types)
> >> +DEFINE_TYPES(bcm283x_types)  
> >   
> 

[PATCH v2 08/13] hw/arm/bcm2836: Introduce BCM283XClass::core_count

[Philippe Mathieu-Daudé]

The BCM2835 has only one core. Introduce the core_count field to
be able to use values different than BCM283X_NCPUS (4).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/bcm2836.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 683d04d6ea..3b95ad11e9 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -21,6 +21,7 @@ typedef struct BCM283XClass {
     DeviceClass parent_class;
     /*< public >*/
     const char *cpu_type;
+    int core_count;
     hwaddr peri_base; /* Peripheral base address seen by the CPU */
     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
     int clusterid;
@@ -37,7 +38,7 @@ static void bcm2836_init(Object *obj)
     BCM283XClass *bc = BCM283X_GET_CLASS(obj);
     int n;
 
-    for (n = 0; n < BCM283X_NCPUS; n++) {
+    for (n = 0; n < bc->core_count; n++) {
         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
                                 sizeof(s->cpu[n].core), bc->cpu_type,
                                 &error_abort, NULL);
@@ -107,7 +108,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
 
-    for (n = 0; n < BCM283X_NCPUS; n++) {
+    for (n = 0; n < bc->core_count; n++) {
         /* TODO: this should be converted to a property of ARM_CPU */
         s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
 
@@ -173,6 +174,7 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
     BCM283XClass *bc = BCM283X_CLASS(oc);
 
     bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
+    bc->core_count = BCM283X_NCPUS;
     bc->peri_base = 0x3f000000;
     bc->ctrl_base = 0x40000000;
     bc->clusterid = 0xf;
@@ -187,6 +189,7 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
     BCM283XClass *bc = BCM283X_CLASS(oc);
 
     bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
+    bc->core_count = BCM283X_NCPUS;
     bc->peri_base = 0x3f000000;
     bc->ctrl_base = 0x40000000;
     bc->clusterid = 0x0;
-- 
2.21.1

Re: [PATCH v2 08/13] hw/arm/bcm2836: Introduce BCM283XClass::core_count

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> The BCM2835 has only one core. Introduce the core_count field to
> be able to use values different than BCM283X_NCPUS (4).
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>  hw/arm/bcm2836.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 683d04d6ea..3b95ad11e9 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -21,6 +21,7 @@ typedef struct BCM283XClass {
>      DeviceClass parent_class;
>      /*< public >*/
>      const char *cpu_type;
> +    int core_count;
>      hwaddr peri_base; /* Peripheral base address seen by the CPU */
>      hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
>      int clusterid;
> @@ -37,7 +38,7 @@ static void bcm2836_init(Object *obj)
>      BCM283XClass *bc = BCM283X_GET_CLASS(obj);
>      int n;
>  
> -    for (n = 0; n < BCM283X_NCPUS; n++) {
> +    for (n = 0; n < bc->core_count; n++) {
>          object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
>                                  sizeof(s->cpu[n].core), bc->cpu_type,
>                                  &error_abort, NULL);
> @@ -107,7 +108,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>      sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
>          qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
>  
> -    for (n = 0; n < BCM283X_NCPUS; n++) {
> +    for (n = 0; n < bc->core_count; n++) {
>          /* TODO: this should be converted to a property of ARM_CPU */
>          s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
>  
> @@ -173,6 +174,7 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
>      BCM283XClass *bc = BCM283X_CLASS(oc);
>  
>      bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
> +    bc->core_count = BCM283X_NCPUS;
>      bc->peri_base = 0x3f000000;
>      bc->ctrl_base = 0x40000000;
>      bc->clusterid = 0xf;
> @@ -187,6 +189,7 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
>      BCM283XClass *bc = BCM283X_CLASS(oc);
>  
>      bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> +    bc->core_count = BCM283X_NCPUS;
>      bc->peri_base = 0x3f000000;
>      bc->ctrl_base = 0x40000000;
>      bc->clusterid = 0x0;
> 

[PATCH v2 09/13] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs

[Philippe Mathieu-Daudé]

It makes no sense to set enabled-cpus=0 on single core SoCs.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/bcm2836.c | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 3b95ad11e9..caaa4b625e 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -32,6 +32,9 @@ typedef struct BCM283XClass {
 #define BCM283X_GET_CLASS(obj) \
     OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
 
+static Property bcm2836_enabled_cores_property =
+    DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, 0);
+
 static void bcm2836_init(Object *obj)
 {
     BCM283XState *s = BCM283X(obj);
@@ -43,6 +46,10 @@ static void bcm2836_init(Object *obj)
                                 sizeof(s->cpu[n].core), bc->cpu_type,
                                 &error_abort, NULL);
     }
+    if (bc->core_count) {
+        qdev_property_add_static(DEVICE(obj), &bcm2836_enabled_cores_property);
+        qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count);
+    }
 
     sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
                           TYPE_BCM2836_CONTROL);
@@ -154,12 +161,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static Property bcm2836_props[] = {
-    DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
-                       BCM283X_NCPUS),
-    DEFINE_PROP_END_OF_LIST()
-};
-
 static void bcm283x_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
@@ -179,7 +180,6 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
     bc->ctrl_base = 0x40000000;
     bc->clusterid = 0xf;
     dc->realize = bcm2836_realize;
-    device_class_set_props(dc, bcm2836_props);
 };
 
 #ifdef TARGET_AARCH64
@@ -194,7 +194,6 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
     bc->ctrl_base = 0x40000000;
     bc->clusterid = 0x0;
     dc->realize = bcm2836_realize;
-    device_class_set_props(dc, bcm2836_props);
 };
 #endif
 
-- 
2.21.1

Re: [PATCH v2 09/13] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> It makes no sense to set enabled-cpus=0 on single core SoCs.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>  hw/arm/bcm2836.c | 15 +++++++--------
>  1 file changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 3b95ad11e9..caaa4b625e 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -32,6 +32,9 @@ typedef struct BCM283XClass {
>  #define BCM283X_GET_CLASS(obj) \
>      OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
>  
> +static Property bcm2836_enabled_cores_property =
> +    DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, 0);
> +
>  static void bcm2836_init(Object *obj)
>  {
>      BCM283XState *s = BCM283X(obj);
> @@ -43,6 +46,10 @@ static void bcm2836_init(Object *obj)
>                                  sizeof(s->cpu[n].core), bc->cpu_type,
>                                  &error_abort, NULL);
>      }
> +    if (bc->core_count) {
> +        qdev_property_add_static(DEVICE(obj), &bcm2836_enabled_cores_property);
> +        qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count);
> +    }
>  
>      sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
>                            TYPE_BCM2836_CONTROL);
> @@ -154,12 +161,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>      }
>  }
>  
> -static Property bcm2836_props[] = {
> -    DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
> -                       BCM283X_NCPUS),
> -    DEFINE_PROP_END_OF_LIST()
> -};
> -
>  static void bcm283x_class_init(ObjectClass *oc, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -179,7 +180,6 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
>      bc->ctrl_base = 0x40000000;
>      bc->clusterid = 0xf;
>      dc->realize = bcm2836_realize;
> -    device_class_set_props(dc, bcm2836_props);
>  };
>  
>  #ifdef TARGET_AARCH64
> @@ -194,7 +194,6 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
>      bc->ctrl_base = 0x40000000;
>      bc->clusterid = 0x0;
>      dc->realize = bcm2836_realize;
> -    device_class_set_props(dc, bcm2836_props);
>  };
>  #endif
>  
> 

[PATCH v2 10/13] hw/arm/bcm2836: Split out common realize() code

[Philippe Mathieu-Daudé]

The realize() function is clearly composed of two parts,
each described by a comment:

  void realize()
  {
     /* common peripherals from bcm2835 */
     ...
     /* bcm2836 interrupt controller (and mailboxes, etc.) */
     ...
   }

Split the two part, so we can reuse the common part with other
SoCs from this family.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/bcm2836.c | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index caaa4b625e..2b6fe31139 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -51,8 +51,10 @@ static void bcm2836_init(Object *obj)
         qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count);
     }
 
-    sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
-                          TYPE_BCM2836_CONTROL);
+    if (bc->ctrl_base) {
+        sysbus_init_child_obj(obj, "control", &s->control,
+                              sizeof(s->control), TYPE_BCM2836_CONTROL);
+    }
 
     sysbus_init_child_obj(obj, "peripherals", &s->peripherals,
                           sizeof(s->peripherals), TYPE_BCM2835_PERIPHERALS);
@@ -62,13 +64,12 @@ static void bcm2836_init(Object *obj)
                               "vcram-size", &error_abort);
 }
 
-static void bcm2836_realize(DeviceState *dev, Error **errp)
+static void bcm283x_common_realize(DeviceState *dev, Error **errp)
 {
     BCM283XState *s = BCM283X(dev);
     BCM283XClass *bc = BCM283X_GET_CLASS(dev);
     Object *obj;
     Error *err = NULL;
-    int n;
 
     /* common peripherals from bcm2835 */
 
@@ -100,6 +101,20 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
 
     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
                             bc->peri_base, 1);
+}
+
+static void bcm2836_realize(DeviceState *dev, Error **errp)
+{
+    BCM283XState *s = BCM283X(dev);
+    BCM283XClass *bc = BCM283X_GET_CLASS(dev);
+    Error *err = NULL;
+    int n;
+
+    bcm283x_common_realize(dev, &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
 
     /* bcm2836 interrupt controller (and mailboxes, etc.) */
     object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
-- 
2.21.1

Re: [PATCH v2 10/13] hw/arm/bcm2836: Split out common realize() code

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> The realize() function is clearly composed of two parts,
> each described by a comment:
> 
>   void realize()
>   {
>      /* common peripherals from bcm2835 */
>      ...
>      /* bcm2836 interrupt controller (and mailboxes, etc.) */
>      ...
>    }
> 
> Split the two part, so we can reuse the common part with other
> SoCs from this family.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>  hw/arm/bcm2836.c | 23 +++++++++++++++++++----
>  1 file changed, 19 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index caaa4b625e..2b6fe31139 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -51,8 +51,10 @@ static void bcm2836_init(Object *obj)
>          qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count);
>      }
>  
> -    sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
> -                          TYPE_BCM2836_CONTROL);
> +    if (bc->ctrl_base) {
> +        sysbus_init_child_obj(obj, "control", &s->control,
> +                              sizeof(s->control), TYPE_BCM2836_CONTROL);
> +    }
>  
>      sysbus_init_child_obj(obj, "peripherals", &s->peripherals,
>                            sizeof(s->peripherals), TYPE_BCM2835_PERIPHERALS);
> @@ -62,13 +64,12 @@ static void bcm2836_init(Object *obj)
>                                "vcram-size", &error_abort);
>  }
>  
> -static void bcm2836_realize(DeviceState *dev, Error **errp)
> +static void bcm283x_common_realize(DeviceState *dev, Error **errp)
>  {
>      BCM283XState *s = BCM283X(dev);
>      BCM283XClass *bc = BCM283X_GET_CLASS(dev);
>      Object *obj;
>      Error *err = NULL;
> -    int n;
>  
>      /* common peripherals from bcm2835 */
>  
> @@ -100,6 +101,20 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>  
>      sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
>                              bc->peri_base, 1);
> +}
> +
> +static void bcm2836_realize(DeviceState *dev, Error **errp)
> +{
> +    BCM283XState *s = BCM283X(dev);
> +    BCM283XClass *bc = BCM283X_GET_CLASS(dev);
> +    Error *err = NULL;
> +    int n;
> +
> +    bcm283x_common_realize(dev, &err);
> +    if (err) {
> +        error_propagate(errp, err);
> +        return;
> +    }
>  
>      /* bcm2836 interrupt controller (and mailboxes, etc.) */
>      object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
> 

[PATCH v2 11/13] hw/arm/bcm2836: Introduce the BCM2835 SoC

[Philippe Mathieu-Daudé]

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/arm/bcm2836.h |  1 +
 hw/arm/bcm2836.c         | 40 ++++++++++++++++++++++++++++++++++++++++
 hw/arm/raspi.c           |  2 ++
 3 files changed, 43 insertions(+)

diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
index acc75bf553..3d46469a73 100644
--- a/include/hw/arm/bcm2836.h
+++ b/include/hw/arm/bcm2836.h
@@ -24,6 +24,7 @@
  * them, code using these devices should always handle them via the
  * BCM283x base class, so they have no BCM2836(obj) etc macros.
  */
+#define TYPE_BCM2835 "bcm2835"
 #define TYPE_BCM2836 "bcm2836"
 #define TYPE_BCM2837 "bcm2837"
 
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 2b6fe31139..bce5f8a866 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -103,6 +103,31 @@ static void bcm283x_common_realize(DeviceState *dev, Error **errp)
                             bc->peri_base, 1);
 }
 
+static void bcm2835_realize(DeviceState *dev, Error **errp)
+{
+    BCM283XState *s = BCM283X(dev);
+    Error *err = NULL;
+
+    bcm283x_common_realize(dev, &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+
+    object_property_set_bool(OBJECT(&s->cpu[0].core), true,
+                             "realized", &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+
+    /* Connect irq/fiq outputs from the interrupt controller. */
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
+            qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_IRQ));
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
+            qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_FIQ));
+}
+
 static void bcm2836_realize(DeviceState *dev, Error **errp)
 {
     BCM283XState *s = BCM283X(dev);
@@ -184,6 +209,17 @@ static void bcm283x_class_init(ObjectClass *oc, void *data)
     dc->user_creatable = false;
 }
 
+static void bcm2835_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(oc);
+    BCM283XClass *bc = BCM283X_CLASS(oc);
+
+    bc->cpu_type = ARM_CPU_TYPE_NAME("arm1176");
+    bc->core_count = 1;
+    bc->peri_base = 0x20000000;
+    dc->realize = bcm2835_realize;
+};
+
 static void bcm2836_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
@@ -214,6 +250,10 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
 
 static const TypeInfo bcm283x_types[] = {
     {
+        .name           = TYPE_BCM2835,
+        .parent         = TYPE_BCM283X,
+        .class_init     = bcm2835_class_init,
+    }, {
         .name           = TYPE_BCM2836,
         .parent         = TYPE_BCM283X,
         .class_init     = bcm2836_class_init,
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index fff501affb..3537a329ac 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -70,6 +70,7 @@ FIELD(REV_CODE, MEMORY_SIZE,       20, 3);
 FIELD(REV_CODE, STYLE,             23, 1);
 
 typedef enum RaspiProcessorId {
+    PROCESSOR_ID_BCM2835 = 0,
     PROCESSOR_ID_BCM2836 = 1,
     PROCESSOR_ID_BCM2837 = 2,
 } RaspiProcessorId;
@@ -78,6 +79,7 @@ static const struct {
     const char *type;
     int cores_count;
 } soc_property[] = {
+    [PROCESSOR_ID_BCM2835] = {TYPE_BCM2835, 1},
     [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS},
     [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS},
 };
-- 
2.21.1

Re: [PATCH v2 11/13] hw/arm/bcm2836: Introduce the BCM2835 SoC

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>  include/hw/arm/bcm2836.h |  1 +
>  hw/arm/bcm2836.c         | 40 ++++++++++++++++++++++++++++++++++++++++
>  hw/arm/raspi.c           |  2 ++
>  3 files changed, 43 insertions(+)
> 
> diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
> index acc75bf553..3d46469a73 100644
> --- a/include/hw/arm/bcm2836.h
> +++ b/include/hw/arm/bcm2836.h
> @@ -24,6 +24,7 @@
>   * them, code using these devices should always handle them via the
>   * BCM283x base class, so they have no BCM2836(obj) etc macros.
>   */
> +#define TYPE_BCM2835 "bcm2835"
>  #define TYPE_BCM2836 "bcm2836"
>  #define TYPE_BCM2837 "bcm2837"
>  
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 2b6fe31139..bce5f8a866 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -103,6 +103,31 @@ static void bcm283x_common_realize(DeviceState *dev, Error **errp)
>                              bc->peri_base, 1);
>  }
>  
> +static void bcm2835_realize(DeviceState *dev, Error **errp)
> +{
> +    BCM283XState *s = BCM283X(dev);
> +    Error *err = NULL;
> +
> +    bcm283x_common_realize(dev, &err);
> +    if (err) {
> +        error_propagate(errp, err);
> +        return;
> +    }
> +
> +    object_property_set_bool(OBJECT(&s->cpu[0].core), true,
> +                             "realized", &err);
> +    if (err) {
> +        error_propagate(errp, err);
> +        return;
> +    }
> +
> +    /* Connect irq/fiq outputs from the interrupt controller. */
> +    sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
> +            qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_IRQ));
> +    sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
> +            qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_FIQ));
> +}
> +
>  static void bcm2836_realize(DeviceState *dev, Error **errp)
>  {
>      BCM283XState *s = BCM283X(dev);
> @@ -184,6 +209,17 @@ static void bcm283x_class_init(ObjectClass *oc, void *data)
>      dc->user_creatable = false;
>  }
>  
> +static void bcm2835_class_init(ObjectClass *oc, void *data)
> +{
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +    BCM283XClass *bc = BCM283X_CLASS(oc);
> +
> +    bc->cpu_type = ARM_CPU_TYPE_NAME("arm1176");
> +    bc->core_count = 1;
> +    bc->peri_base = 0x20000000;
> +    dc->realize = bcm2835_realize;
> +};
> +
>  static void bcm2836_class_init(ObjectClass *oc, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -214,6 +250,10 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
>  
>  static const TypeInfo bcm283x_types[] = {
>      {
> +        .name           = TYPE_BCM2835,
> +        .parent         = TYPE_BCM283X,
> +        .class_init     = bcm2835_class_init,
> +    }, {
>          .name           = TYPE_BCM2836,
>          .parent         = TYPE_BCM283X,
>          .class_init     = bcm2836_class_init,
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index fff501affb..3537a329ac 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -70,6 +70,7 @@ FIELD(REV_CODE, MEMORY_SIZE,       20, 3);
>  FIELD(REV_CODE, STYLE,             23, 1);
>  
>  typedef enum RaspiProcessorId {
> +    PROCESSOR_ID_BCM2835 = 0,
>      PROCESSOR_ID_BCM2836 = 1,
>      PROCESSOR_ID_BCM2837 = 2,
>  } RaspiProcessorId;
> @@ -78,6 +79,7 @@ static const struct {
>      const char *type;
>      int cores_count;
>  } soc_property[] = {
> +    [PROCESSOR_ID_BCM2835] = {TYPE_BCM2835, 1},
>      [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS},
>      [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS},
>  };
> 

[PATCH v2 12/13] hw/arm/raspi: Add the Raspberry Pi B+ machine

[Philippe Mathieu-Daudé]

  $ qemu-system-arm -M raspi1b -serial stdio \
      -kernel raspberrypi/firmware/boot/kernel.img \
      -dtb raspberrypi/firmware/boot/bcm2708-rpi-b.dtb \
      -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
  [    0.000000] Booting Linux on physical CPU 0x0
  [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01 BST 2019
  [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
  [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
  [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B
  [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
  [    0.000000] bootconsole [pl11] enabled
  [    0.000000] Memory policy: Data cache writeback
  [    0.000000] cma: Reserved 8 MiB at 0x1b800000
  [    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c with crng_init=0
  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
  [    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0
  Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
  Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
  Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
  ...

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/raspi.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 3537a329ac..2d9f4e3085 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -324,6 +324,15 @@ static void raspi_machine_class_common_init(MachineClass *mc,
     mc->default_ram_size = board_ram_size(board_rev);
 };
 
+static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
+
+    rmc->board_rev = 0x900032;
+    raspi_machine_class_common_init(mc, rmc->board_rev);
+};
+
 static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
@@ -348,6 +357,10 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
 
 static const TypeInfo raspi_machine_types[] = {
     {
+        .name           = MACHINE_TYPE_NAME("raspi1b"),
+        .parent         = TYPE_RASPI_MACHINE,
+        .class_init     = raspi1b_machine_class_init,
+    }, {
         .name           = MACHINE_TYPE_NAME("raspi2b"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi2b_machine_class_init,
-- 
2.21.1

Re: [PATCH v2 12/13] hw/arm/raspi: Add the Raspberry Pi B+ machine

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
>   $ qemu-system-arm -M raspi1b -serial stdio \
>       -kernel raspberrypi/firmware/boot/kernel.img \
>       -dtb raspberrypi/firmware/boot/bcm2708-rpi-b.dtb \
>       -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
>   [    0.000000] Booting Linux on physical CPU 0x0
>   [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01 BST 2019
>   [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
>   [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
>   [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B
>   [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
>   [    0.000000] bootconsole [pl11] enabled
>   [    0.000000] Memory policy: Data cache writeback
>   [    0.000000] cma: Reserved 8 MiB at 0x1b800000
>   [    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c with crng_init=0
>   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
>   [    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0
>   Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
>   Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
>   Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
>   ...
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/arm/raspi.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 3537a329ac..2d9f4e3085 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -324,6 +324,15 @@ static void raspi_machine_class_common_init(MachineClass *mc,
>      mc->default_ram_size = board_ram_size(board_rev);
>  };
>  
> +static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
> +{
> +    MachineClass *mc = MACHINE_CLASS(oc);
> +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
> +
> +    rmc->board_rev = 0x900032;
> +    raspi_machine_class_common_init(mc, rmc->board_rev);
> +};
> +
>  static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
>  {
>      MachineClass *mc = MACHINE_CLASS(oc);
> @@ -348,6 +357,10 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
>  
>  static const TypeInfo raspi_machine_types[] = {
>      {
> +        .name           = MACHINE_TYPE_NAME("raspi1b"),
If it's the B+ model, why not call it raspi1b+ ?

> +        .parent         = TYPE_RASPI_MACHINE,
> +        .class_init     = raspi1b_machine_class_init,
> +    }, {
>          .name           = MACHINE_TYPE_NAME("raspi2b"),
>          .parent         = TYPE_RASPI_MACHINE,
>          .class_init     = raspi2b_machine_class_init,
> 

Re: [PATCH v2 12/13] hw/arm/raspi: Add the Raspberry Pi B+ machine

[Philippe Mathieu-Daudé]

Cc'ing Eduardo/Igor.

On 2/18/20 9:48 AM, Luc Michel wrote:
> On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
>>    $ qemu-system-arm -M raspi1b -serial stdio \
>>        -kernel raspberrypi/firmware/boot/kernel.img \
>>        -dtb raspberrypi/firmware/boot/bcm2708-rpi-b.dtb \
>>        -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
>>    [    0.000000] Booting Linux on physical CPU 0x0
>>    [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01 BST 2019
>>    [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
>>    [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
>>    [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B
>>    [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
>>    [    0.000000] bootconsole [pl11] enabled
>>    [    0.000000] Memory policy: Data cache writeback
>>    [    0.000000] cma: Reserved 8 MiB at 0x1b800000
>>    [    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c with crng_init=0
>>    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
>>    [    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0
>>    Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
>>    Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
>>    Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
>>    ...
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>   hw/arm/raspi.c | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
>> index 3537a329ac..2d9f4e3085 100644
>> --- a/hw/arm/raspi.c
>> +++ b/hw/arm/raspi.c
>> @@ -324,6 +324,15 @@ static void raspi_machine_class_common_init(MachineClass *mc,
>>       mc->default_ram_size = board_ram_size(board_rev);
>>   };
>>   
>> +static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
>> +{
>> +    MachineClass *mc = MACHINE_CLASS(oc);
>> +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
>> +
>> +    rmc->board_rev = 0x900032;
>> +    raspi_machine_class_common_init(mc, rmc->board_rev);
>> +};
>> +
>>   static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
>>   {
>>       MachineClass *mc = MACHINE_CLASS(oc);
>> @@ -348,6 +357,10 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
>>   
>>   static const TypeInfo raspi_machine_types[] = {
>>       {
>> +        .name           = MACHINE_TYPE_NAME("raspi1b"),
> If it's the B+ model, why not call it raspi1b+ ?

I thought about it (and prefer it), but I'm not sure this can have some 
side-effect.

Eduardo, Igor, is that OK to use a '+' in a machine name?

So far the names used match [a-zA-Z0-9-].

> 
>> +        .parent         = TYPE_RASPI_MACHINE,
>> +        .class_init     = raspi1b_machine_class_init,
>> +    }, {
>>           .name           = MACHINE_TYPE_NAME("raspi2b"),
>>           .parent         = TYPE_RASPI_MACHINE,
>>           .class_init     = raspi2b_machine_class_init,
>>
> 

Re: [PATCH v2 12/13] hw/arm/raspi: Add the Raspberry Pi B+ machine

[Igor Mammedov]

On Tue, 18 Feb 2020 10:35:43 +0100
Philippe Mathieu-Daudé <philmd@redhat.com> wrote:

> Cc'ing Eduardo/Igor.
> 
> On 2/18/20 9:48 AM, Luc Michel wrote:
> > On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:  
> >>    $ qemu-system-arm -M raspi1b -serial stdio \
> >>        -kernel raspberrypi/firmware/boot/kernel.img \
> >>        -dtb raspberrypi/firmware/boot/bcm2708-rpi-b.dtb \
> >>        -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
> >>    [    0.000000] Booting Linux on physical CPU 0x0
> >>    [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01 BST 2019
> >>    [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
> >>    [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
> >>    [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B
> >>    [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
> >>    [    0.000000] bootconsole [pl11] enabled
> >>    [    0.000000] Memory policy: Data cache writeback
> >>    [    0.000000] cma: Reserved 8 MiB at 0x1b800000
> >>    [    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c with crng_init=0
> >>    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
> >>    [    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0
> >>    Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
> >>    Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
> >>    Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
> >>    ...
> >>
> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >> ---
> >>   hw/arm/raspi.c | 13 +++++++++++++
> >>   1 file changed, 13 insertions(+)
> >>
> >> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> >> index 3537a329ac..2d9f4e3085 100644
> >> --- a/hw/arm/raspi.c
> >> +++ b/hw/arm/raspi.c
> >> @@ -324,6 +324,15 @@ static void raspi_machine_class_common_init(MachineClass *mc,
> >>       mc->default_ram_size = board_ram_size(board_rev);
> >>   };
> >>   
> >> +static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
> >> +{
> >> +    MachineClass *mc = MACHINE_CLASS(oc);
> >> +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
> >> +
> >> +    rmc->board_rev = 0x900032;
> >> +    raspi_machine_class_common_init(mc, rmc->board_rev);
> >> +};
> >> +
> >>   static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
> >>   {
> >>       MachineClass *mc = MACHINE_CLASS(oc);
> >> @@ -348,6 +357,10 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
> >>   
> >>   static const TypeInfo raspi_machine_types[] = {
> >>       {
> >> +        .name           = MACHINE_TYPE_NAME("raspi1b"),  
> > If it's the B+ model, why not call it raspi1b+ ?  
> 
> I thought about it (and prefer it), but I'm not sure this can have some 
> side-effect.
> 
> Eduardo, Igor, is that OK to use a '+' in a machine name?
> 
> So far the names used match [a-zA-Z0-9-].
That was my impression as well.
How about "raspi1-plus"

 
> >   
> >> +        .parent         = TYPE_RASPI_MACHINE,
> >> +        .class_init     = raspi1b_machine_class_init,
> >> +    }, {
> >>           .name           = MACHINE_TYPE_NAME("raspi2b"),
> >>           .parent         = TYPE_RASPI_MACHINE,
> >>           .class_init     = raspi2b_machine_class_init,
> >>  
> >   
> 

Re: [PATCH v2 12/13] hw/arm/raspi: Add the Raspberry Pi B+ machine

[Eduardo Habkost]

On Tue, Feb 18, 2020 at 10:35:43AM +0100, Philippe Mathieu-Daudé wrote:
> Cc'ing Eduardo/Igor.
> 
> On 2/18/20 9:48 AM, Luc Michel wrote:
> > On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> > >    $ qemu-system-arm -M raspi1b -serial stdio \
> > >        -kernel raspberrypi/firmware/boot/kernel.img \
> > >        -dtb raspberrypi/firmware/boot/bcm2708-rpi-b.dtb \
> > >        -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
> > >    [    0.000000] Booting Linux on physical CPU 0x0
> > >    [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01 BST 2019
> > >    [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
> > >    [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
> > >    [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B
> > >    [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
> > >    [    0.000000] bootconsole [pl11] enabled
> > >    [    0.000000] Memory policy: Data cache writeback
> > >    [    0.000000] cma: Reserved 8 MiB at 0x1b800000
> > >    [    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c with crng_init=0
> > >    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
> > >    [    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0
> > >    Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
> > >    Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
> > >    Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
> > >    ...
> > > 
> > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > > ---
> > >   hw/arm/raspi.c | 13 +++++++++++++
> > >   1 file changed, 13 insertions(+)
> > > 
> > > diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> > > index 3537a329ac..2d9f4e3085 100644
> > > --- a/hw/arm/raspi.c
> > > +++ b/hw/arm/raspi.c
> > > @@ -324,6 +324,15 @@ static void raspi_machine_class_common_init(MachineClass *mc,
> > >       mc->default_ram_size = board_ram_size(board_rev);
> > >   };
> > > +static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
> > > +{
> > > +    MachineClass *mc = MACHINE_CLASS(oc);
> > > +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
> > > +
> > > +    rmc->board_rev = 0x900032;
> > > +    raspi_machine_class_common_init(mc, rmc->board_rev);
> > > +};
> > > +
> > >   static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
> > >   {
> > >       MachineClass *mc = MACHINE_CLASS(oc);
> > > @@ -348,6 +357,10 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
> > >   static const TypeInfo raspi_machine_types[] = {
> > >       {
> > > +        .name           = MACHINE_TYPE_NAME("raspi1b"),
> > If it's the B+ model, why not call it raspi1b+ ?
> 
> I thought about it (and prefer it), but I'm not sure this can have some
> side-effect.
> 
> Eduardo, Igor, is that OK to use a '+' in a machine name?

It would probably work, but I would prefer to avoid that.

> 
> So far the names used match [a-zA-Z0-9-].
> 
> > 
> > > +        .parent         = TYPE_RASPI_MACHINE,
> > > +        .class_init     = raspi1b_machine_class_init,
> > > +    }, {
> > >           .name           = MACHINE_TYPE_NAME("raspi2b"),
> > >           .parent         = TYPE_RASPI_MACHINE,
> > >           .class_init     = raspi2b_machine_class_init,
> > > 
> > 
> 

-- 
Eduardo

Re: [PATCH v2 12/13] hw/arm/raspi: Add the Raspberry Pi B+ machine

[Niek Linnenbank]

[-- Attachment #1: Type: text/plain, Size: 5948 bytes --]

Hey Philippe,

Very nice to see that the Raspberry 1 will be supported again, thanks for
contributing this!

I tried to bring up the machine using raspbian 2019-09-26. It ran throught
the early kernel initialisation
but for me it gets stuck at this point:

./arm-softmmu/qemu-system-arm -M raspi1b -kernel
$HOME/raspi/boot/kernel.img -append 'printk.time=0
earlycon=pl011,0x20201000 console=ttyAMA0 rootwait root=/dev/mmcblk0p2' \
-dtb $HOME/raspi/boot/bcm2708-rpi-b-plus.dtb -m 512 -sd
$HOME/raspi/2019-09-26-raspbian-buster-lite.img -serial stdio -s

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.19.75+ (dom@buildbot) (gcc version 4.9.3
(crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1270 Tue Sep 24 18:38:54
BST 2019
[    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7
(ARMv7), cr=00c5387d
[    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
[    0.000000] OF: fdt: Machine model: Raspberry Pi Model B+
[    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
[    0.000000] bootconsole [pl11] enabled
[    0.000000] Memory policy: Data cache writeback
[    0.000000] cma: Reserved 8 MiB at 0x1b800000
[    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c
with crng_init=0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
[    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000
console=ttyAMA0 rootwait root=/dev/mmcblk0p2
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 434380K/458752K available (6973K kernel code, 635K rwdata, 2080K
rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    vmalloc : 0xdc800000 - 0xff800000   ( 560 MB)
    lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
    modules : 0xbf000000 - 0xc0000000   (  16 MB)
      .text : 0x(ptrval) - 0x(ptrval)   (6975 kB)
      .init : 0x(ptrval) - 0x(ptrval)   ( 464 kB)
      .data : 0x(ptrval) - 0x(ptrval)   ( 636 kB)
       .bss : 0x(ptrval) - 0x(ptrval)   ( 798 kB)
SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
ftrace: allocating 25197 entries in 74 pages
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every
2147483647500ns
clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns:
1911260446275 ns
bcm2835: system timer (irq = 27)
Console: colour dummy device 80x30

Maybe it should switch to the graphical console here, but I dont see the
boot splash logo either (when using -stdio instead of -nographic).
With -M raspi2 and -dtb bcm2709-rpi-2-b.dtb the same raspbian image can
fully boot to the login console.

Regards,
Niek



On Mon, Feb 17, 2020 at 12:51 PM Philippe Mathieu-Daudé <f4bug@amsat.org>
wrote:

>   $ qemu-system-arm -M raspi1b -serial stdio \
>       -kernel raspberrypi/firmware/boot/kernel.img \
>       -dtb raspberrypi/firmware/boot/bcm2708-rpi-b.dtb \
>       -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
>   [    0.000000] Booting Linux on physical CPU 0x0
>   [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3
> (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01
> BST 2019
>   [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7
> (ARMv7), cr=00c5387d
>   [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
>   [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B
>   [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
>   [    0.000000] bootconsole [pl11] enabled
>   [    0.000000] Memory policy: Data cache writeback
>   [    0.000000] cma: Reserved 8 MiB at 0x1b800000
>   [    0.000000] random: get_random_bytes called from
> start_kernel+0x8c/0x49c with crng_init=0
>   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages:
> 113680
>   [    0.000000] Kernel command line: printk.time=0
> earlycon=pl011,0x20201000 console=ttyAMA0
>   Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
>   Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
>   Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K
> rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
>   ...
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/arm/raspi.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 3537a329ac..2d9f4e3085 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -324,6 +324,15 @@ static void
> raspi_machine_class_common_init(MachineClass *mc,
>      mc->default_ram_size = board_ram_size(board_rev);
>  };
>
> +static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
> +{
> +    MachineClass *mc = MACHINE_CLASS(oc);
> +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
> +
> +    rmc->board_rev = 0x900032;
> +    raspi_machine_class_common_init(mc, rmc->board_rev);
> +};
> +
>  static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
>  {
>      MachineClass *mc = MACHINE_CLASS(oc);
> @@ -348,6 +357,10 @@ static void raspi3b_machine_class_init(ObjectClass
> *oc, void *data)
>
>  static const TypeInfo raspi_machine_types[] = {
>      {
> +        .name           = MACHINE_TYPE_NAME("raspi1b"),
> +        .parent         = TYPE_RASPI_MACHINE,
> +        .class_init     = raspi1b_machine_class_init,
> +    }, {
>          .name           = MACHINE_TYPE_NAME("raspi2b"),
>          .parent         = TYPE_RASPI_MACHINE,
>          .class_init     = raspi2b_machine_class_init,
> --
> 2.21.1
>
>
>

-- 
Niek Linnenbank

[-- Attachment #2: Type: text/html, Size: 6993 bytes --]

Re: [PATCH v2 12/13] hw/arm/raspi: Add the Raspberry Pi B+ machine

[Philippe Mathieu-Daudé]

On 2/22/20 11:19 PM, Niek Linnenbank wrote:
> Hey Philippe,
> 
> Very nice to see that the Raspberry 1 will be supported again, thanks 
> for contributing this!
> 
> I tried to bring up the machine using raspbian 2019-09-26. It ran 
> throught the early kernel initialisation
> but for me it gets stuck at this point:
> 
> ./arm-softmmu/qemu-system-arm -M raspi1b -kernel 
> $HOME/raspi/boot/kernel.img -append 'printk.time=0 
> earlycon=pl011,0x20201000 console=ttyAMA0 rootwait root=/dev/mmcblk0p2' \
> -dtb $HOME/raspi/boot/bcm2708-rpi-b-plus.dtb -m 512 -sd 
> $HOME/raspi/2019-09-26-raspbian-buster-lite.img -serial stdio -s
> 
> [    0.000000] Booting Linux on physical CPU 0x0
> [    0.000000] Linux version 4.19.75+ (dom@buildbot) (gcc version 4.9.3 
> (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1270 Tue Sep 24 
> 18:38:54 BST 2019
> [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 
> (ARMv7), cr=00c5387d
> [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
> [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B+
> [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
> [    0.000000] bootconsole [pl11] enabled
> [    0.000000] Memory policy: Data cache writeback
> [    0.000000] cma: Reserved 8 MiB at 0x1b800000
> [    0.000000] random: get_random_bytes called from 
> start_kernel+0x8c/0x49c with crng_init=0
> [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
> [    0.000000] Kernel command line: printk.time=0 
> earlycon=pl011,0x20201000 console=ttyAMA0 rootwait root=/dev/mmcblk0p2
> Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
> Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
> Memory: 434380K/458752K available (6973K kernel code, 635K rwdata, 2080K 
> rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
> Virtual kernel memory layout:
>      vector  : 0xffff0000 - 0xffff1000   (   4 kB)
>      fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
>      vmalloc : 0xdc800000 - 0xff800000   ( 560 MB)
>      lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
>      modules : 0xbf000000 - 0xc0000000   (  16 MB)
>        .text : 0x(ptrval) - 0x(ptrval)   (6975 kB)
>        .init : 0x(ptrval) - 0x(ptrval)   ( 464 kB)
>        .data : 0x(ptrval) - 0x(ptrval)   ( 636 kB)
>         .bss : 0x(ptrval) - 0x(ptrval)   ( 798 kB)
> SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
> ftrace: allocating 25197 entries in 74 pages
> NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
> sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 
> 2147483647500ns
> clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, 
> max_idle_ns: 1911260446275 ns
> bcm2835: system timer (irq = 27)
> Console: colour dummy device 80x30
> 
> Maybe it should switch to the graphical console here, but I dont see the 
> boot splash logo either (when using -stdio instead of -nographic).
> With -M raspi2 and -dtb bcm2709-rpi-2-b.dtb the same raspbian image can 
> fully boot to the login console.

Argh this is because I split this of a bigger series and didn't included 
changes related to the GPU 'properties', sorry.

> 
> Regards,
> Niek
> 
> 
> 
> On Mon, Feb 17, 2020 at 12:51 PM Philippe Mathieu-Daudé <f4bug@amsat.org 
> <mailto:f4bug@amsat.org>> wrote:
> 
>        $ qemu-system-arm -M raspi1b -serial stdio \
>            -kernel raspberrypi/firmware/boot/kernel.img \
>            -dtb raspberrypi/firmware/boot/bcm2708-rpi-b.dtb \
>            -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
>        [    0.000000] Booting Linux on physical CPU 0x0
>        [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version
>     4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep
>     3 20:21:01 BST 2019
>        [    0.000000] CPU: ARMv6-compatible processor [410fb767]
>     revision 7 (ARMv7), cr=00c5387d
>        [    0.000000] CPU: VIPT aliasing data cache, unknown instruction
>     cache
>        [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B
>        [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
>        [    0.000000] bootconsole [pl11] enabled
>        [    0.000000] Memory policy: Data cache writeback
>        [    0.000000] cma: Reserved 8 MiB at 0x1b800000
>        [    0.000000] random: get_random_bytes called from
>     start_kernel+0x8c/0x49c with crng_init=0
>        [    0.000000] Built 1 zonelists, mobility grouping on.  Total
>     pages: 113680
>        [    0.000000] Kernel command line: printk.time=0
>     earlycon=pl011,0x20201000 console=ttyAMA0
>        Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
>        Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
>        Memory: 434380K/458752K available (6971K kernel code, 635K
>     rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K
>     cma-reserved)
>        ...
> 
>     Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org
>     <mailto:f4bug@amsat.org>>
>     ---
>       hw/arm/raspi.c | 13 +++++++++++++
>       1 file changed, 13 insertions(+)
> 
>     diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
>     index 3537a329ac..2d9f4e3085 100644
>     --- a/hw/arm/raspi.c
>     +++ b/hw/arm/raspi.c
>     @@ -324,6 +324,15 @@ static void
>     raspi_machine_class_common_init(MachineClass *mc,
>           mc->default_ram_size = board_ram_size(board_rev);
>       };
> 
>     +static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
>     +{
>     +    MachineClass *mc = MACHINE_CLASS(oc);
>     +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
>     +
>     +    rmc->board_rev = 0x900032;
>     +    raspi_machine_class_common_init(mc, rmc->board_rev);
>     +};
>     +
>       static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
>       {
>           MachineClass *mc = MACHINE_CLASS(oc);
>     @@ -348,6 +357,10 @@ static void
>     raspi3b_machine_class_init(ObjectClass *oc, void *data)
> 
>       static const TypeInfo raspi_machine_types[] = {
>           {
>     +        .name           = MACHINE_TYPE_NAME("raspi1b"),
>     +        .parent         = TYPE_RASPI_MACHINE,
>     +        .class_init     = raspi1b_machine_class_init,
>     +    }, {
>               .name           = MACHINE_TYPE_NAME("raspi2b"),
>               .parent         = TYPE_RASPI_MACHINE,
>               .class_init     = raspi2b_machine_class_init,
>     -- 
>     2.21.1
> 
> 
> 
> 
> -- 
> Niek Linnenbank
> 

Re: [PATCH v2 12/13] hw/arm/raspi: Add the Raspberry Pi B+ machine

[Philippe Mathieu-Daudé]

On 2/24/20 9:55 AM, Philippe Mathieu-Daudé wrote:
> On 2/22/20 11:19 PM, Niek Linnenbank wrote:
>> Hey Philippe,
>>
>> Very nice to see that the Raspberry 1 will be supported again, thanks
>> for contributing this!
>>
>> I tried to bring up the machine using raspbian 2019-09-26. It ran
>> throught the early kernel initialisation
>> but for me it gets stuck at this point:
>>
>> ./arm-softmmu/qemu-system-arm -M raspi1b -kernel
>> $HOME/raspi/boot/kernel.img -append 'printk.time=0
>> earlycon=pl011,0x20201000 console=ttyAMA0 rootwait root=/dev/mmcblk0p2' \
>> -dtb $HOME/raspi/boot/bcm2708-rpi-b-plus.dtb -m 512 -sd
>> $HOME/raspi/2019-09-26-raspbian-buster-lite.img -serial stdio -s
>>
>> [    0.000000] Booting Linux on physical CPU 0x0
>> [    0.000000] Linux version 4.19.75+ (dom@buildbot) (gcc version
>> 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1270 Tue Sep 24
>> 18:38:54 BST 2019
>> [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7
>> (ARMv7), cr=00c5387d
>> [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
>> [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B+
>> [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
>> [    0.000000] bootconsole [pl11] enabled
>> [    0.000000] Memory policy: Data cache writeback
>> [    0.000000] cma: Reserved 8 MiB at 0x1b800000
>> [    0.000000] random: get_random_bytes called from
>> start_kernel+0x8c/0x49c with crng_init=0
>> [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages:
>> 113680
>> [    0.000000] Kernel command line: printk.time=0
>> earlycon=pl011,0x20201000 console=ttyAMA0 rootwait root=/dev/mmcblk0p2
>> Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
>> Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
>> Memory: 434380K/458752K available (6973K kernel code, 635K rwdata,
>> 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
>> Virtual kernel memory layout:
>>      vector  : 0xffff0000 - 0xffff1000   (   4 kB)
>>      fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
>>      vmalloc : 0xdc800000 - 0xff800000   ( 560 MB)
>>      lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
>>      modules : 0xbf000000 - 0xc0000000   (  16 MB)
>>        .text : 0x(ptrval) - 0x(ptrval)   (6975 kB)
>>        .init : 0x(ptrval) - 0x(ptrval)   ( 464 kB)
>>        .data : 0x(ptrval) - 0x(ptrval)   ( 636 kB)
>>         .bss : 0x(ptrval) - 0x(ptrval)   ( 798 kB)
>> SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
>> ftrace: allocating 25197 entries in 74 pages
>> NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
>> sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every
>> 2147483647500ns
>> clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff,
>> max_idle_ns: 1911260446275 ns
>> bcm2835: system timer (irq = 27)
>> Console: colour dummy device 80x30
>>
>> Maybe it should switch to the graphical console here, but I dont see
>> the boot splash logo either (when using -stdio instead of -nographic).
>> With -M raspi2 and -dtb bcm2709-rpi-2-b.dtb the same raspbian image
>> can fully boot to the login console.
> 
> Argh this is because I split this of a bigger series and didn't included
> changes related to the GPU 'properties', sorry.

Actually it was missing SYS_timer changes, now rebased/posted:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg742694.html

> 
>>
>> Regards,
>> Niek
>>
>>
>>
>> On Mon, Feb 17, 2020 at 12:51 PM Philippe Mathieu-Daudé
>> <f4bug@amsat.org <mailto:f4bug@amsat.org>> wrote:
>>
>>        $ qemu-system-arm -M raspi1b -serial stdio \
>>            -kernel raspberrypi/firmware/boot/kernel.img \
>>            -dtb raspberrypi/firmware/boot/bcm2708-rpi-b.dtb \
>>            -append 'printk.time=0 earlycon=pl011,0x20201000
>> console=ttyAMA0'
>>        [    0.000000] Booting Linux on physical CPU 0x0
>>        [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version
>>     4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep
>>     3 20:21:01 BST 2019
>>        [    0.000000] CPU: ARMv6-compatible processor [410fb767]
>>     revision 7 (ARMv7), cr=00c5387d
>>        [    0.000000] CPU: VIPT aliasing data cache, unknown instruction
>>     cache
>>        [    0.000000] OF: fdt: Machine model: Raspberry Pi Model B
>>        [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
>>        [    0.000000] bootconsole [pl11] enabled
>>        [    0.000000] Memory policy: Data cache writeback
>>        [    0.000000] cma: Reserved 8 MiB at 0x1b800000
>>        [    0.000000] random: get_random_bytes called from
>>     start_kernel+0x8c/0x49c with crng_init=0
>>        [    0.000000] Built 1 zonelists, mobility grouping on.  Total
>>     pages: 113680
>>        [    0.000000] Kernel command line: printk.time=0
>>     earlycon=pl011,0x20201000 console=ttyAMA0
>>        Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
>>        Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
>>        Memory: 434380K/458752K available (6971K kernel code, 635K
>>     rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K
>>     cma-reserved)
>>        ...
>>
>>     Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org
>>     <mailto:f4bug@amsat.org>>
>>     ---
>>       hw/arm/raspi.c | 13 +++++++++++++
>>       1 file changed, 13 insertions(+)
>>
>>     diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
>>     index 3537a329ac..2d9f4e3085 100644
>>     --- a/hw/arm/raspi.c
>>     +++ b/hw/arm/raspi.c
>>     @@ -324,6 +324,15 @@ static void
>>     raspi_machine_class_common_init(MachineClass *mc,
>>           mc->default_ram_size = board_ram_size(board_rev);
>>       };
>>
>>     +static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
>>     +{
>>     +    MachineClass *mc = MACHINE_CLASS(oc);
>>     +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
>>     +
>>     +    rmc->board_rev = 0x900032;
>>     +    raspi_machine_class_common_init(mc, rmc->board_rev);
>>     +};
>>     +
>>       static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
>>       {
>>           MachineClass *mc = MACHINE_CLASS(oc);
>>     @@ -348,6 +357,10 @@ static void
>>     raspi3b_machine_class_init(ObjectClass *oc, void *data)
>>
>>       static const TypeInfo raspi_machine_types[] = {
>>           {
>>     +        .name           = MACHINE_TYPE_NAME("raspi1b"),
>>     +        .parent         = TYPE_RASPI_MACHINE,
>>     +        .class_init     = raspi1b_machine_class_init,
>>     +    }, {
>>               .name           = MACHINE_TYPE_NAME("raspi2b"),
>>               .parent         = TYPE_RASPI_MACHINE,
>>               .class_init     = raspi2b_machine_class_init,
>>     --     2.21.1
>>
>>
>>
>>
>> -- 
>> Niek Linnenbank
>>

[PATCH v2 13/13] hw/arm/raspi: Add the Raspberry Pi Zero machine

[Philippe Mathieu-Daudé]

Add a Raspberry Pi Zero machine.

  $ qemu-system-arm -M raspi0w -serial stdio \
      -kernel raspberrypi/firmware/boot/kernel.img \
      -dtb raspberrypi/firmware/boot/bcm2708-rpi-zero-w.dtb \
      -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
  [    0.000000] Booting Linux on physical CPU 0x0
  [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01 BST 2019
  [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
  [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
  [    0.000000] OF: fdt: Machine model: Raspberry Pi Zero W
  [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
  [    0.000000] bootconsole [pl11] enabled
  [    0.000000] Memory policy: Data cache writeback
  [    0.000000] cma: Reserved 8 MiB at 0x1b800000
  [    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c with crng_init=0
  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
  [    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0 root=/dev/mmcblk0 rootwait
  Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
  Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
  Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
  Virtual kernel memory layout:
      vector  : 0xffff0000 - 0xffff1000   (   4 kB)
      fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
      vmalloc : 0xdc800000 - 0xff800000   ( 560 MB)
      lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
      modules : 0xbf000000 - 0xc0000000   (  16 MB)
        .text : 0x(ptrval) - 0x(ptrval)   (6973 kB)
        .init : 0x(ptrval) - 0x(ptrval)   ( 464 kB)
        .data : 0x(ptrval) - 0x(ptrval)   ( 636 kB)
         .bss : 0x(ptrval) - 0x(ptrval)   ( 798 kB)
  SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
  ftrace: allocating 25193 entries in 74 pages
  NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
  sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 2147483647500ns
  clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275 ns
  bcm2835: system timer (irq = 27)
  Console: colour dummy device 80x30
  ...

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/raspi.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 2d9f4e3085..d59d7c4294 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -324,6 +324,15 @@ static void raspi_machine_class_common_init(MachineClass *mc,
     mc->default_ram_size = board_ram_size(board_rev);
 };
 
+static void raspi0w_machine_class_init(ObjectClass *oc, void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
+
+    rmc->board_rev = 0x9000c1;
+    raspi_machine_class_common_init(mc, rmc->board_rev);
+};
+
 static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
@@ -357,6 +366,10 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
 
 static const TypeInfo raspi_machine_types[] = {
     {
+        .name           = MACHINE_TYPE_NAME("raspi0w"),
+        .parent         = TYPE_RASPI_MACHINE,
+        .class_init     = raspi0w_machine_class_init,
+    }, {
         .name           = MACHINE_TYPE_NAME("raspi1b"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi1b_machine_class_init,
-- 
2.21.1

Re: [PATCH v2 13/13] hw/arm/raspi: Add the Raspberry Pi Zero machine

[Luc Michel]

On 2/17/20 12:45 PM, Philippe Mathieu-Daudé wrote:
> Add a Raspberry Pi Zero machine.
> 
>   $ qemu-system-arm -M raspi0w -serial stdio \
>       -kernel raspberrypi/firmware/boot/kernel.img \
>       -dtb raspberrypi/firmware/boot/bcm2708-rpi-zero-w.dtb \
>       -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
>   [    0.000000] Booting Linux on physical CPU 0x0
>   [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01 BST 2019
>   [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
>   [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
>   [    0.000000] OF: fdt: Machine model: Raspberry Pi Zero W
>   [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
>   [    0.000000] bootconsole [pl11] enabled
>   [    0.000000] Memory policy: Data cache writeback
>   [    0.000000] cma: Reserved 8 MiB at 0x1b800000
>   [    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c with crng_init=0
>   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
>   [    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0 root=/dev/mmcblk0 rootwait
>   Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
>   Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
>   Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
>   Virtual kernel memory layout:
>       vector  : 0xffff0000 - 0xffff1000   (   4 kB)
>       fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
>       vmalloc : 0xdc800000 - 0xff800000   ( 560 MB)
>       lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
>       modules : 0xbf000000 - 0xc0000000   (  16 MB)
>         .text : 0x(ptrval) - 0x(ptrval)   (6973 kB)
>         .init : 0x(ptrval) - 0x(ptrval)   ( 464 kB)
>         .data : 0x(ptrval) - 0x(ptrval)   ( 636 kB)
>          .bss : 0x(ptrval) - 0x(ptrval)   ( 798 kB)
>   SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
>   ftrace: allocating 25193 entries in 74 pages
>   NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
>   sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 2147483647500ns
>   clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275 ns
>   bcm2835: system timer (irq = 27)
>   Console: colour dummy device 80x30
>   ...
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>  hw/arm/raspi.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 2d9f4e3085..d59d7c4294 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -324,6 +324,15 @@ static void raspi_machine_class_common_init(MachineClass *mc,
>      mc->default_ram_size = board_ram_size(board_rev);
>  };
>  
> +static void raspi0w_machine_class_init(ObjectClass *oc, void *data)
> +{
> +    MachineClass *mc = MACHINE_CLASS(oc);
> +    RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
> +
> +    rmc->board_rev = 0x9000c1;
> +    raspi_machine_class_common_init(mc, rmc->board_rev);
> +};
> +
>  static void raspi1b_machine_class_init(ObjectClass *oc, void *data)
>  {
>      MachineClass *mc = MACHINE_CLASS(oc);
> @@ -357,6 +366,10 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
>  
>  static const TypeInfo raspi_machine_types[] = {
>      {
> +        .name           = MACHINE_TYPE_NAME("raspi0w"),
> +        .parent         = TYPE_RASPI_MACHINE,
> +        .class_init     = raspi0w_machine_class_init,
> +    }, {
>          .name           = MACHINE_TYPE_NAME("raspi1b"),
>          .parent         = TYPE_RASPI_MACHINE,
>          .class_init     = raspi1b_machine_class_init,
>