From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Alex Bennée" <alex.bennee@linaro.org>,
"LIU Zhiwei" <zhiwei_liu@c-sky.com>,
"David Hildenbrand" <david@redhat.com>
Subject: [PULL 01/10] tcg: Add tcg_gen_gvec_dup_imm
Date: Wed, 6 May 2020 11:29:53 -0700 [thread overview]
Message-ID: <20200506183002.3192-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200506183002.3192-1-richard.henderson@linaro.org>
Add a version of tcg_gen_dup_* that takes both immediate and
a vector element size operand. This will replace the set of
tcg_gen_gvec_dup{8,16,32,64}i functions that encode the element
size within the function name.
Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg-op-gvec.h | 2 ++
tcg/tcg-op-gvec.c | 7 +++++++
2 files changed, 9 insertions(+)
diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h
index 74534e2480..eb0d47a42b 100644
--- a/include/tcg/tcg-op-gvec.h
+++ b/include/tcg/tcg-op-gvec.h
@@ -313,6 +313,8 @@ void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs,
void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t s, uint32_t m);
+void tcg_gen_gvec_dup_imm(unsigned vece, uint32_t dofs, uint32_t s,
+ uint32_t m, uint64_t imm);
void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
uint32_t m, TCGv_i32);
void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
index 327d9588e0..593bb4542e 100644
--- a/tcg/tcg-op-gvec.c
+++ b/tcg/tcg-op-gvec.c
@@ -1569,6 +1569,13 @@ void tcg_gen_gvec_dup8i(uint32_t dofs, uint32_t oprsz,
do_dup(MO_8, dofs, oprsz, maxsz, NULL, NULL, x);
}
+void tcg_gen_gvec_dup_imm(unsigned vece, uint32_t dofs, uint32_t oprsz,
+ uint32_t maxsz, uint64_t x)
+{
+ check_size_align(oprsz, maxsz, dofs);
+ do_dup(vece, dofs, oprsz, maxsz, NULL, NULL, x);
+}
+
void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t oprsz, uint32_t maxsz)
{
--
2.20.1
next prev parent reply other threads:[~2020-05-06 18:36 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-06 18:29 [PULL 00/10] tcg patch queue Richard Henderson
2020-05-06 18:29 ` Richard Henderson [this message]
2020-05-06 18:29 ` [PULL 02/10] target/s390x: Use tcg_gen_gvec_dup_imm Richard Henderson
2020-05-06 18:29 ` [PULL 03/10] target/ppc: " Richard Henderson
2020-05-06 18:29 ` [PULL 04/10] target/arm: " Richard Henderson
2020-05-07 14:39 ` Laurent Desnogues
2020-05-07 17:16 ` Richard Henderson
2020-05-06 18:29 ` [PULL 05/10] tcg: Use tcg_gen_gvec_dup_imm in logical simplifications Richard Henderson
2020-05-06 18:29 ` [PULL 06/10] tcg: Remove tcg_gen_gvec_dup{8,16,32,64}i Richard Henderson
2020-05-06 18:29 ` [PULL 07/10] tcg: Add tcg_gen_gvec_dup_tl Richard Henderson
2020-05-06 18:30 ` [PULL 08/10] tcg: Improve vector tail clearing Richard Henderson
2020-05-06 18:30 ` [PULL 09/10] tcg: Add load_dest parameter to GVecGen2 Richard Henderson
2020-05-06 18:30 ` [PULL 10/10] tcg: Fix integral argument type to tcg_gen_rot[rl]i_i{32, 64} Richard Henderson
2020-05-07 9:54 ` [PULL 00/10] tcg patch queue Peter Maydell
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