From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>, richard.henderson@linaro.org
Subject: [PATCH] risu: don't do a full register compare for OP_SIGILL
Date: Tue, 23 Jun 2020 15:44:46 +0100 [thread overview]
Message-ID: <20200623144446.4243-1-alex.bennee@linaro.org> (raw)
In-Reply-To: <20200522023440.26261-1-richard.henderson@linaro.org>
OP_SIGILL means we have an unexpected invalid operation. If this is a
load or store the register state may be un-rectified pointing at the
memblock so would be invalid. In this case just compare the PC and
make sure the other end also faulted at the same place.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
risu.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/risu.c b/risu.c
index 8d907d9..6d6dcf9 100644
--- a/risu.c
+++ b/risu.c
@@ -124,7 +124,6 @@ static RisuResult send_register_info(void *uc)
switch (op) {
case OP_TESTEND:
case OP_COMPARE:
- case OP_SIGILL:
header.size = reginfo_size(&ri[MASTER]);
extra = &ri[MASTER];
break;
@@ -132,6 +131,7 @@ static RisuResult send_register_info(void *uc)
header.size = MEMBLOCKLEN;
extra = memblock;
break;
+ case OP_SIGILL:
case OP_SETMEMBLOCK:
case OP_GETMEMBLOCK:
header.size = 0;
@@ -203,7 +203,6 @@ static RisuResult recv_register_info(struct reginfo *ri)
switch (header.risu_op) {
case OP_COMPARE:
case OP_TESTEND:
- case OP_SIGILL:
/* If we can't store the data, report invalid size. */
if (header.size > sizeof(*ri)) {
return RES_BAD_SIZE;
@@ -223,6 +222,7 @@ static RisuResult recv_register_info(struct reginfo *ri)
respond(RES_OK);
return read_buffer(other_memblock, MEMBLOCKLEN);
+ case OP_SIGILL:
case OP_SETMEMBLOCK:
case OP_GETMEMBLOCK:
return header.size == 0 ? RES_OK : RES_BAD_SIZE;
@@ -250,7 +250,6 @@ static RisuResult recv_and_compare_register_info(void *uc)
switch (op) {
case OP_COMPARE:
case OP_TESTEND:
- case OP_SIGILL:
/*
* If we have nothing to compare against, report an op mismatch.
* Otherwise allow the compare to continue, and assume that
@@ -270,7 +269,14 @@ static RisuResult recv_and_compare_register_info(void *uc)
res = RES_END;
}
break;
-
+ case OP_SIGILL:
+ /* We can only check the op and PC */
+ if (header.risu_op != OP_SIGILL) {
+ res = RES_MISMATCH_OP;
+ } else if (header.pc != get_pc(&ri[APPRENTICE])) {
+ res = RES_MISMATCH_REG;
+ }
+ break;
case OP_SETMEMBLOCK:
if (op != header.risu_op) {
res = RES_MISMATCH_OP;
--
2.20.1
next prev parent reply other threads:[~2020-06-23 15:07 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-22 2:34 [PATCH v3 00/25] risu cleanups and improvements Richard Henderson
2020-05-22 2:34 ` [PATCH v3 01/25] Use bool for tracing variables Richard Henderson
2020-05-22 2:34 ` [PATCH v3 02/25] Unify master_fd and apprentice_fd to comm_fd Richard Henderson
2020-05-22 2:34 ` [PATCH v3 03/25] Hoist trace file and socket opening Richard Henderson
2020-05-22 2:34 ` [PATCH v3 04/25] Adjust tracefile open for write Richard Henderson
2020-05-22 2:34 ` [PATCH v3 05/25] Use EXIT_FAILURE, EXIT_SUCCESS Richard Henderson
2020-05-22 2:34 ` [PATCH v3 06/25] Make some risu.c symbols static Richard Henderson
2020-05-22 2:34 ` [PATCH v3 07/25] Add enum RisuOp Richard Henderson
2020-05-22 2:34 ` [PATCH v3 08/25] Add enum RisuResult Richard Henderson
2020-05-22 2:34 ` [PATCH v3 09/25] Unify i/o functions and use RisuResult Richard Henderson
2020-05-22 2:34 ` [PATCH v3 10/25] Pass non-OK result back through siglongjmp Richard Henderson
2020-05-22 2:34 ` [PATCH v3 11/25] Always write for --master Richard Henderson
2020-05-22 2:34 ` [PATCH v3 12/25] Simplify syncing with master Richard Henderson
2020-05-22 2:34 ` [PATCH v3 13/25] Split RES_MISMATCH for registers and memory Richard Henderson
2020-05-22 2:34 ` [PATCH v3 14/25] Merge reginfo.c into risu.c Richard Henderson
2020-06-23 8:33 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 15/25] Rearrange reginfo and memblock buffers Richard Henderson
2020-06-23 8:47 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 16/25] Split out recv_register_info Richard Henderson
2020-06-23 10:38 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 17/25] Add magic and size to the trace header Richard Henderson
2020-06-23 14:52 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 18/25] Compute reginfo_size based on the reginfo Richard Henderson
2020-06-23 14:54 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 19/25] aarch64: Reorg sve reginfo to save space Richard Henderson
2020-06-23 16:32 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 20/25] aarch64: Use arch_init to configure sve Richard Henderson
2020-06-23 16:54 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 21/25] ppc64: Use uint64_t to represent double Richard Henderson
2020-06-23 16:58 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 22/25] Standardize reginfo_dump_mismatch printing Richard Henderson
2020-06-23 17:03 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 23/25] Add --fulldump and --diffdup options Richard Henderson
2020-05-22 2:34 ` [PATCH v3 24/25] Remove return value from reginfo_dump Richard Henderson
2020-06-23 17:38 ` Alex Bennée
2020-05-22 2:34 ` [PATCH v3 25/25] ppc64: Clean up reginfo handling Richard Henderson
2020-05-22 4:10 ` Richard Henderson
2020-06-23 17:45 ` Alex Bennée
2020-06-23 18:06 ` Richard Henderson
2020-06-22 19:17 ` [PATCH v3 00/25] risu cleanups and improvements Peter Maydell
2020-06-23 8:23 ` Alex Bennée
2020-06-23 9:00 ` Alex Bennée
2020-06-23 13:30 ` Alex Bennée
2020-06-23 20:26 ` Richard Henderson
2020-06-23 14:44 ` Alex Bennée [this message]
2020-06-23 15:23 ` [PATCH] risu: don't do a full register compare for OP_SIGILL Richard Henderson
2020-06-23 15:54 ` Peter Maydell
2020-06-23 16:17 ` Alex Bennée
2020-06-23 19:55 ` Richard Henderson
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