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* [PATCH] libqos: usb-hcd-ehci: use 32-bit write for config register
@ 2020-06-23 16:18 Paolo Bonzini
  2020-06-23 20:56 ` Michael S. Tsirkin
  2020-06-24  7:47 ` Thomas Huth
  0 siblings, 2 replies; 5+ messages in thread
From: Paolo Bonzini @ 2020-06-23 16:18 UTC (permalink / raw)
  To: qemu-devel; +Cc: thuth, kraxel, mst

The memory region ops have min_access_size == 4 so obey it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 tests/qtest/usb-hcd-ehci-test.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/qtest/usb-hcd-ehci-test.c b/tests/qtest/usb-hcd-ehci-test.c
index 5251d539e9..c51e8bb223 100644
--- a/tests/qtest/usb-hcd-ehci-test.c
+++ b/tests/qtest/usb-hcd-ehci-test.c
@@ -96,7 +96,7 @@ static void pci_ehci_port_1(void)
 static void pci_ehci_config(void)
 {
     /* hands over all ports from companion uhci to ehci */
-    qpci_io_writew(ehci1.dev, ehci1.bar, 0x60, 1);
+    qpci_io_writel(ehci1.dev, ehci1.bar, 0x60, 1);
 }
 
 static void pci_uhci_port_2(void)
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH] libqos: usb-hcd-ehci: use 32-bit write for config register
  2020-06-23 16:18 [PATCH] libqos: usb-hcd-ehci: use 32-bit write for config register Paolo Bonzini
@ 2020-06-23 20:56 ` Michael S. Tsirkin
  2020-06-24  5:59   ` Paolo Bonzini
  2020-06-24  7:47 ` Thomas Huth
  1 sibling, 1 reply; 5+ messages in thread
From: Michael S. Tsirkin @ 2020-06-23 20:56 UTC (permalink / raw)
  To: Paolo Bonzini; +Cc: thuth, qemu-devel, kraxel

On Tue, Jun 23, 2020 at 12:18:52PM -0400, Paolo Bonzini wrote:
> The memory region ops have min_access_size == 4 so obey it.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Makes sense.

Acked-by: Michael S. Tsirkin <mst@redhat.com>

I assume you are queueing this with the memory core change.

> ---
>  tests/qtest/usb-hcd-ehci-test.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/tests/qtest/usb-hcd-ehci-test.c b/tests/qtest/usb-hcd-ehci-test.c
> index 5251d539e9..c51e8bb223 100644
> --- a/tests/qtest/usb-hcd-ehci-test.c
> +++ b/tests/qtest/usb-hcd-ehci-test.c
> @@ -96,7 +96,7 @@ static void pci_ehci_port_1(void)
>  static void pci_ehci_config(void)
>  {
>      /* hands over all ports from companion uhci to ehci */
> -    qpci_io_writew(ehci1.dev, ehci1.bar, 0x60, 1);
> +    qpci_io_writel(ehci1.dev, ehci1.bar, 0x60, 1);
>  }
>  
>  static void pci_uhci_port_2(void)
> -- 
> 2.26.2



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] libqos: usb-hcd-ehci: use 32-bit write for config register
  2020-06-23 20:56 ` Michael S. Tsirkin
@ 2020-06-24  5:59   ` Paolo Bonzini
  0 siblings, 0 replies; 5+ messages in thread
From: Paolo Bonzini @ 2020-06-24  5:59 UTC (permalink / raw)
  To: Michael S. Tsirkin; +Cc: thuth, qemu-devel, kraxel

On 23/06/20 22:56, Michael S. Tsirkin wrote:
> On Tue, Jun 23, 2020 at 12:18:52PM -0400, Paolo Bonzini wrote:
>> The memory region ops have min_access_size == 4 so obey it.
>>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> 
> Makes sense.
> 
> Acked-by: Michael S. Tsirkin <mst@redhat.com>
> 
> I assume you are queueing this with the memory core change.

Yes, I am.

Paolo

>> ---
>>  tests/qtest/usb-hcd-ehci-test.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/tests/qtest/usb-hcd-ehci-test.c b/tests/qtest/usb-hcd-ehci-test.c
>> index 5251d539e9..c51e8bb223 100644
>> --- a/tests/qtest/usb-hcd-ehci-test.c
>> +++ b/tests/qtest/usb-hcd-ehci-test.c
>> @@ -96,7 +96,7 @@ static void pci_ehci_port_1(void)
>>  static void pci_ehci_config(void)
>>  {
>>      /* hands over all ports from companion uhci to ehci */
>> -    qpci_io_writew(ehci1.dev, ehci1.bar, 0x60, 1);
>> +    qpci_io_writel(ehci1.dev, ehci1.bar, 0x60, 1);
>>  }
>>  
>>  static void pci_uhci_port_2(void)
>> -- 
>> 2.26.2
> 



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] libqos: usb-hcd-ehci: use 32-bit write for config register
  2020-06-23 16:18 [PATCH] libqos: usb-hcd-ehci: use 32-bit write for config register Paolo Bonzini
  2020-06-23 20:56 ` Michael S. Tsirkin
@ 2020-06-24  7:47 ` Thomas Huth
  2020-06-24  8:01   ` Paolo Bonzini
  1 sibling, 1 reply; 5+ messages in thread
From: Thomas Huth @ 2020-06-24  7:47 UTC (permalink / raw)
  To: Paolo Bonzini, qemu-devel; +Cc: kraxel, mst

On 23/06/2020 18.18, Paolo Bonzini wrote:
> The memory region ops have min_access_size == 4 so obey it.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   tests/qtest/usb-hcd-ehci-test.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/tests/qtest/usb-hcd-ehci-test.c b/tests/qtest/usb-hcd-ehci-test.c
> index 5251d539e9..c51e8bb223 100644
> --- a/tests/qtest/usb-hcd-ehci-test.c
> +++ b/tests/qtest/usb-hcd-ehci-test.c
> @@ -96,7 +96,7 @@ static void pci_ehci_port_1(void)
>   static void pci_ehci_config(void)
>   {
>       /* hands over all ports from companion uhci to ehci */
> -    qpci_io_writew(ehci1.dev, ehci1.bar, 0x60, 1);
> +    qpci_io_writel(ehci1.dev, ehci1.bar, 0x60, 1);
>   }
>   
>   static void pci_uhci_port_2(void)

Passes "make check-qtest-x86_64" on a s390x host, too:

Tested-by: Thomas Huth <thuth@redhat.com>



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] libqos: usb-hcd-ehci: use 32-bit write for config register
  2020-06-24  7:47 ` Thomas Huth
@ 2020-06-24  8:01   ` Paolo Bonzini
  0 siblings, 0 replies; 5+ messages in thread
From: Paolo Bonzini @ 2020-06-24  8:01 UTC (permalink / raw)
  To: Thomas Huth, qemu-devel; +Cc: kraxel, mst

On 24/06/20 09:47, Thomas Huth wrote:
>>
>>   {
>>       /* hands over all ports from companion uhci to ehci */
>> -    qpci_io_writew(ehci1.dev, ehci1.bar, 0x60, 1);
>> +    qpci_io_writel(ehci1.dev, ehci1.bar, 0x60, 1);
>>   }
>>     static void pci_uhci_port_2(void)
> 
> Passes "make check-qtest-x86_64" on a s390x host, too:
> 
> Tested-by: Thomas Huth <thuth@redhat.com>

Ah, I see what you mean now, so I'll clarify.  Endianness is handled by
the memory core and libqos so for little-endian devices (such as PCI
devices) it's okay.  For big-endian using the wrong size would not work,
but it should fail the same on LE and BE hosts.  endianness-test checks
that.

Paolo



^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-06-24  8:03 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-23 16:18 [PATCH] libqos: usb-hcd-ehci: use 32-bit write for config register Paolo Bonzini
2020-06-23 20:56 ` Michael S. Tsirkin
2020-06-24  5:59   ` Paolo Bonzini
2020-06-24  7:47 ` Thomas Huth
2020-06-24  8:01   ` Paolo Bonzini

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