* [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult
@ 2020-09-04 15:44 Philippe Mathieu-Daudé
2020-09-04 15:44 ` [PATCH 01/13] pci: pass along the return value of dma_memory_rw Philippe Mathieu-Daudé
` (16 more replies)
0 siblings, 17 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
Salvaging cleanups patches from the RFC series "Forbid DMA write
accesses to MMIO regions" [*], propagating MemTxResult and
adding documentation.
[*] https://www.mail-archive.com/qemu-block@nongnu.org/msg72924.html
Klaus Jensen (1):
pci: pass along the return value of dma_memory_rw
Philippe Mathieu-Daudé (12):
docs/devel/loads-stores: Add regexp for DMA functions
dma: Document address_space_map/address_space_unmap() prototypes
dma: Let dma_memory_set() propagate MemTxResult
dma: Let dma_memory_rw() propagate MemTxResult
dma: Let dma_memory_read() propagate MemTxResult
dma: Let dma_memory_write() propagate MemTxResult
dma: Let dma_memory_valid() take MemTxAttrs argument
dma: Let dma_memory_set() take MemTxAttrs argument
dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument
dma: Let dma_memory_rw() take MemTxAttrs argument
dma: Let dma_memory_read/write() take MemTxAttrs argument
dma: Let dma_memory_map() take MemTxAttrs argument
docs/devel/loads-stores.rst | 2 +
include/hw/pci/pci.h | 7 +-
include/hw/ppc/spapr_vio.h | 11 ++-
include/sysemu/dma.h | 156 +++++++++++++++++++++++++++-------
dma-helpers.c | 16 ++--
hw/arm/musicpal.c | 13 +--
hw/arm/smmu-common.c | 3 +-
hw/arm/smmuv3.c | 14 +--
hw/core/generic-loader.c | 3 +-
hw/display/virtio-gpu.c | 8 +-
hw/dma/pl330.c | 12 ++-
hw/dma/sparc32_dma.c | 16 ++--
hw/dma/xlnx-zynq-devcfg.c | 6 +-
hw/dma/xlnx_dpdma.c | 10 ++-
hw/hyperv/vmbus.c | 8 +-
hw/i386/amd_iommu.c | 16 ++--
hw/i386/intel_iommu.c | 28 +++---
hw/ide/ahci.c | 9 +-
hw/ide/macio.c | 2 +-
hw/intc/spapr_xive.c | 3 +-
hw/intc/xive.c | 7 +-
hw/misc/bcm2835_property.c | 3 +-
hw/misc/macio/mac_dbdma.c | 10 ++-
hw/net/allwinner-sun8i-emac.c | 21 +++--
hw/net/ftgmac100.c | 25 ++++--
hw/net/imx_fec.c | 32 ++++---
hw/nvram/fw_cfg.c | 12 ++-
hw/pci-host/pnv_phb3.c | 5 +-
hw/pci-host/pnv_phb3_msi.c | 9 +-
hw/pci-host/pnv_phb4.c | 7 +-
hw/sd/allwinner-sdhost.c | 14 +--
hw/sd/sdhci.c | 35 +++++---
hw/usb/hcd-dwc2.c | 8 +-
hw/usb/hcd-ehci.c | 6 +-
hw/usb/hcd-ohci.c | 28 +++---
hw/usb/libhw.c | 3 +-
hw/virtio/virtio.c | 6 +-
37 files changed, 385 insertions(+), 189 deletions(-)
--
2.26.2
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 01/13] pci: pass along the return value of dma_memory_rw
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 3:45 ` Richard Henderson
2020-09-07 1:00 ` Li Qiang
2020-09-04 15:44 ` [PATCH 02/13] docs/devel/loads-stores: Add regexp for DMA functions Philippe Mathieu-Daudé
` (15 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, Keith Busch,
John Snow, Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Klaus Jensen, Peter Chubb
From: Klaus Jensen <k.jensen@samsung.com>
Some might actually care about the return value of dma_memory_rw. So
let us pass it along instead of ignoring it.
There are no existing users of the return value, so this patch should be
safe.
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Keith Busch <kbusch@kernel.org>
Message-Id: <20191011070141.188713-2-its@irrelevant.dk>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/pci/pci.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 4ca7258b5b7..896cef9ad47 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -788,8 +788,7 @@ static inline AddressSpace *pci_get_address_space(PCIDevice *dev)
static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
void *buf, dma_addr_t len, DMADirection dir)
{
- dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
- return 0;
+ return dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
}
static inline int pci_dma_read(PCIDevice *dev, dma_addr_t addr,
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 02/13] docs/devel/loads-stores: Add regexp for DMA functions
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
2020-09-04 15:44 ` [PATCH 01/13] pci: pass along the return value of dma_memory_rw Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 3:45 ` Richard Henderson
2020-09-04 15:44 ` [PATCH 03/13] dma: Document address_space_map/address_space_unmap() prototypes Philippe Mathieu-Daudé
` (14 subsequent siblings)
16 siblings, 1 reply; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
docs/devel/loads-stores.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst
index 9a944ef1af6..5b20f907e4d 100644
--- a/docs/devel/loads-stores.rst
+++ b/docs/devel/loads-stores.rst
@@ -477,6 +477,8 @@ make sure our existing code is doing things correctly.
Regexes for git grep
- ``\<dma_memory_\(read\|write\|rw\)\>``
+ - ``\<ldu\?[bwlq]\(_[bl]e\)\?_dma\>``
+ - ``\<st[bwlq]\(_[bl]e\)\?_dma\>``
``pci_dma_*`` and ``{ld,st}*_pci_dma``
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 03/13] dma: Document address_space_map/address_space_unmap() prototypes
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
2020-09-04 15:44 ` [PATCH 01/13] pci: pass along the return value of dma_memory_rw Philippe Mathieu-Daudé
2020-09-04 15:44 ` [PATCH 02/13] docs/devel/loads-stores: Add regexp for DMA functions Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 3:47 ` Richard Henderson
2020-09-07 6:55 ` Edgar E. Iglesias
2020-09-04 15:44 ` [PATCH 04/13] dma: Let dma_memory_set() propagate MemTxResult Philippe Mathieu-Daudé
` (13 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
Add documentation based on address_space_map / address_space_unmap.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/sysemu/dma.h | 30 +++++++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 80c5bc3e02d..19bc9ad1b69 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -1,7 +1,7 @@
/*
* DMA helper functions
*
- * Copyright (c) 2009 Red Hat
+ * Copyright (c) 2009, 2020 Red Hat
*
* This work is licensed under the terms of the GNU General Public License
* (GNU GPL), version 2 or later.
@@ -125,6 +125,20 @@ static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
+/**
+ * address_space_map: Map a physical memory region into a DMA controller
+ * virtual address
+ *
+ * May map a subset of the requested range, given by and returned in @plen.
+ * May return %NULL and set *@plen to zero(0), if resources needed to perform
+ * the mapping are exhausted.
+ * Use only for reads OR writes - not for read-modify-write operations.
+ *
+ * @as: #AddressSpace to be accessed
+ * @addr: address within that address space
+ * @len: pointer to length of buffer; updated on return
+ * @dir: indicates the transfer direction
+ */
static inline void *dma_memory_map(AddressSpace *as,
dma_addr_t addr, dma_addr_t *len,
DMADirection dir)
@@ -138,6 +152,20 @@ static inline void *dma_memory_map(AddressSpace *as,
return p;
}
+/**
+ * address_space_unmap: Unmaps a memory region previously mapped
+ * by dma_memory_map()
+ *
+ * Will also mark the memory as dirty if @dir == %DMA_DIRECTION_FROM_DEVICE.
+ * @access_len gives the amount of memory that was actually read or written
+ * by the caller.
+ *
+ * @as: #AddressSpace used
+ * @buffer: host pointer as returned by address_space_map()
+ * @len: buffer length as returned by address_space_map()
+ * @dir: indicates the transfer direction
+ * @access_len: amount of data actually transferred
+ */
static inline void dma_memory_unmap(AddressSpace *as,
void *buffer, dma_addr_t len,
DMADirection dir, dma_addr_t access_len)
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 04/13] dma: Let dma_memory_set() propagate MemTxResult
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 03/13] dma: Document address_space_map/address_space_unmap() prototypes Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 3:55 ` Richard Henderson
2020-09-07 1:05 ` Li Qiang
2020-09-04 15:44 ` [PATCH 05/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
` (12 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
address_space_write() returns a MemTxResult type.
Do not discard it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/sysemu/dma.h | 15 ++++++++++++++-
dma-helpers.c | 7 ++++---
2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 19bc9ad1b69..ad8a3f82f47 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -123,7 +123,20 @@ static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
DMA_DIRECTION_FROM_DEVICE);
}
-int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
+/**
+ * dma_memory_set: Fill memory with a constant byte from DMA controller.
+ *
+ * Return a MemTxResult indicating whether the operation succeeded
+ * or failed (eg unassigned memory, device rejected the transaction,
+ * IOMMU fault).
+ *
+ * @as: #AddressSpace to be accessed
+ * @addr: address within that address space
+ * @c: constant byte to fill the memory
+ * @len: the number of bytes to fill with the constant byte
+ */
+MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
+ uint8_t c, dma_addr_t len);
/**
* address_space_map: Map a physical memory region into a DMA controller
diff --git a/dma-helpers.c b/dma-helpers.c
index 41ef24a63b6..4a9e37d6d06 100644
--- a/dma-helpers.c
+++ b/dma-helpers.c
@@ -1,7 +1,7 @@
/*
* DMA helper functions
*
- * Copyright (c) 2009 Red Hat
+ * Copyright (c) 2009,2020 Red Hat
*
* This work is licensed under the terms of the GNU General Public License
* (GNU GPL), version 2 or later.
@@ -18,14 +18,15 @@
/* #define DEBUG_IOMMU */
-int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
+MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
+ uint8_t c, dma_addr_t len)
{
dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
#define FILLBUF_SIZE 512
uint8_t fillbuf[FILLBUF_SIZE];
int l;
- bool error = false;
+ MemTxResult error = MEMTX_OK;
memset(fillbuf, c, FILLBUF_SIZE);
while (len > 0) {
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 05/13] dma: Let dma_memory_rw() propagate MemTxResult
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 04/13] dma: Let dma_memory_set() propagate MemTxResult Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 3:57 ` Richard Henderson
2020-09-07 1:06 ` Li Qiang
2020-09-04 15:44 ` [PATCH 06/13] dma: Let dma_memory_read() " Philippe Mathieu-Daudé
` (11 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
address_space_rw() returns a MemTxResult type.
Do not discard it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/sysemu/dma.h | 30 ++++++++++++++++++++++--------
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index ad8a3f82f47..661d7d0ca88 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -80,12 +80,13 @@ static inline bool dma_memory_valid(AddressSpace *as,
MEMTXATTRS_UNSPECIFIED);
}
-static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr,
- void *buf, dma_addr_t len,
- DMADirection dir)
+static inline MemTxResult dma_memory_rw_relaxed(AddressSpace *as,
+ dma_addr_t addr,
+ void *buf, dma_addr_t len,
+ DMADirection dir)
{
- return (bool)address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
- buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
+ return address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
+ buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
}
static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
@@ -101,9 +102,22 @@ static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
DMA_DIRECTION_FROM_DEVICE);
}
-static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr,
- void *buf, dma_addr_t len,
- DMADirection dir)
+/**
+ * dma_memory_rw: Read from or write to an address space from DMA controller.
+ *
+ * Return a MemTxResult indicating whether the operation succeeded
+ * or failed (eg unassigned memory, device rejected the transaction,
+ * IOMMU fault).
+ *
+ * @as: #AddressSpace to be accessed
+ * @addr: address within that address space
+ * @buf: buffer with the data transferred
+ * @len: the number of bytes to read or write
+ * @dir: indicates the transfer direction
+ */
+static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
+ void *buf, dma_addr_t len,
+ DMADirection dir)
{
dma_barrier(as, dir);
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 06/13] dma: Let dma_memory_read() propagate MemTxResult
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 05/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 3:58 ` Richard Henderson
2020-09-07 1:06 ` Li Qiang
2020-09-04 15:44 ` [PATCH 07/13] dma: Let dma_memory_write() " Philippe Mathieu-Daudé
` (10 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
dma_memory_rw_relaxed() returns a MemTxResult type.
Do not discard it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/sysemu/dma.h | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 661d7d0ca88..2961a96ad67 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -89,8 +89,9 @@ static inline MemTxResult dma_memory_rw_relaxed(AddressSpace *as,
buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
}
-static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
- void *buf, dma_addr_t len)
+static inline MemTxResult dma_memory_read_relaxed(AddressSpace *as,
+ dma_addr_t addr,
+ void *buf, dma_addr_t len)
{
return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
}
@@ -124,8 +125,20 @@ static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
return dma_memory_rw_relaxed(as, addr, buf, len, dir);
}
-static inline int dma_memory_read(AddressSpace *as, dma_addr_t addr,
- void *buf, dma_addr_t len)
+/**
+ * dma_memory_read: Read from an address space from DMA controller.
+ *
+ * Return a MemTxResult indicating whether the operation succeeded
+ * or failed (eg unassigned memory, device rejected the transaction,
+ * IOMMU fault). Called within RCU critical section.
+ *
+ * @as: #AddressSpace to be accessed
+ * @addr: address within that address space
+ * @buf: buffer with the data transferred
+ * @len: length of the data transferred
+ */
+static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
+ void *buf, dma_addr_t len)
{
return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
}
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 07/13] dma: Let dma_memory_write() propagate MemTxResult
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 06/13] dma: Let dma_memory_read() " Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 3:58 ` Richard Henderson
2020-09-07 1:07 ` Li Qiang
2020-09-04 15:44 ` [PATCH 08/13] dma: Let dma_memory_valid() take MemTxAttrs argument Philippe Mathieu-Daudé
` (9 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
dma_memory_rw_relaxed() returns a MemTxResult type.
Do not discard it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/sysemu/dma.h | 22 ++++++++++++++++++----
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 2961a96ad67..f4ade067a46 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -96,8 +96,10 @@ static inline MemTxResult dma_memory_read_relaxed(AddressSpace *as,
return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
}
-static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
- const void *buf, dma_addr_t len)
+static inline MemTxResult dma_memory_write_relaxed(AddressSpace *as,
+ dma_addr_t addr,
+ const void *buf,
+ dma_addr_t len)
{
return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
DMA_DIRECTION_FROM_DEVICE);
@@ -143,8 +145,20 @@ static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
}
-static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
- const void *buf, dma_addr_t len)
+/**
+ * address_space_write: Write to address space from DMA controller.
+ *
+ * Return a MemTxResult indicating whether the operation succeeded
+ * or failed (eg unassigned memory, device rejected the transaction,
+ * IOMMU fault).
+ *
+ * @as: #AddressSpace to be accessed
+ * @addr: address within that address space
+ * @buf: buffer with the data transferred
+ * @len: the number of bytes to write
+ */
+static inline MemTxResult dma_memory_write(AddressSpace *as, dma_addr_t addr,
+ const void *buf, dma_addr_t len)
{
return dma_memory_rw(as, addr, (void *)buf, len,
DMA_DIRECTION_FROM_DEVICE);
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 08/13] dma: Let dma_memory_valid() take MemTxAttrs argument
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 07/13] dma: Let dma_memory_write() " Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 3:59 ` Richard Henderson
2020-09-07 1:11 ` Li Qiang
2020-09-04 15:44 ` [PATCH 09/13] dma: Let dma_memory_set() " Philippe Mathieu-Daudé
` (8 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
Let devices specify transaction attributes when calling
dma_memory_valid().
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/ppc/spapr_vio.h | 2 +-
include/sysemu/dma.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
index bed7df60e35..f134f6cf574 100644
--- a/include/hw/ppc/spapr_vio.h
+++ b/include/hw/ppc/spapr_vio.h
@@ -96,7 +96,7 @@ static inline void spapr_vio_irq_pulse(SpaprVioDevice *dev)
static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr,
uint32_t size, DMADirection dir)
{
- return dma_memory_valid(&dev->as, taddr, size, dir);
+ return dma_memory_valid(&dev->as, taddr, size, dir, MEMTXATTRS_UNSPECIFIED);
}
static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr,
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index f4ade067a46..b322aa5947b 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -73,11 +73,11 @@ static inline void dma_barrier(AddressSpace *as, DMADirection dir)
* dma_memory_{read,write}() and check for errors */
static inline bool dma_memory_valid(AddressSpace *as,
dma_addr_t addr, dma_addr_t len,
- DMADirection dir)
+ DMADirection dir, MemTxAttrs attrs)
{
return address_space_access_valid(as, addr, len,
dir == DMA_DIRECTION_FROM_DEVICE,
- MEMTXATTRS_UNSPECIFIED);
+ attrs);
}
static inline MemTxResult dma_memory_rw_relaxed(AddressSpace *as,
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 09/13] dma: Let dma_memory_set() take MemTxAttrs argument
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 08/13] dma: Let dma_memory_valid() take MemTxAttrs argument Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 4:00 ` Richard Henderson
2020-09-07 1:13 ` Li Qiang
2020-09-04 15:44 ` [PATCH 10/13] dma: Let dma_memory_rw_relaxed() " Philippe Mathieu-Daudé
` (7 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
Let devices specify transaction attributes when calling
dma_memory_set().
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/ppc/spapr_vio.h | 3 ++-
include/sysemu/dma.h | 3 ++-
dma-helpers.c | 5 ++---
hw/nvram/fw_cfg.c | 3 ++-
4 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
index f134f6cf574..6e5c0840248 100644
--- a/include/hw/ppc/spapr_vio.h
+++ b/include/hw/ppc/spapr_vio.h
@@ -116,7 +116,8 @@ static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr,
static inline int spapr_vio_dma_set(SpaprVioDevice *dev, uint64_t taddr,
uint8_t c, uint32_t size)
{
- return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
+ return (dma_memory_set(&dev->as, taddr,
+ c, size, MEMTXATTRS_UNSPECIFIED) != 0) ?
H_DEST_PARM : H_SUCCESS;
}
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index b322aa5947b..d0381f9ae9b 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -175,9 +175,10 @@ static inline MemTxResult dma_memory_write(AddressSpace *as, dma_addr_t addr,
* @addr: address within that address space
* @c: constant byte to fill the memory
* @len: the number of bytes to fill with the constant byte
+ * @attrs: memory transaction attributes
*/
MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
- uint8_t c, dma_addr_t len);
+ uint8_t c, dma_addr_t len, MemTxAttrs attrs);
/**
* address_space_map: Map a physical memory region into a DMA controller
diff --git a/dma-helpers.c b/dma-helpers.c
index 4a9e37d6d06..6a9735386dc 100644
--- a/dma-helpers.c
+++ b/dma-helpers.c
@@ -19,7 +19,7 @@
/* #define DEBUG_IOMMU */
MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
- uint8_t c, dma_addr_t len)
+ uint8_t c, dma_addr_t len, MemTxAttrs attrs)
{
dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
@@ -31,8 +31,7 @@ MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
memset(fillbuf, c, FILLBUF_SIZE);
while (len > 0) {
l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
- error |= address_space_write(as, addr, MEMTXATTRS_UNSPECIFIED,
- fillbuf, l);
+ error |= address_space_write(as, addr, attrs, fillbuf, l);
len -= l;
addr += l;
}
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index f3a4728288e..a15de06a10c 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -397,7 +397,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
* tested before.
*/
if (read) {
- if (dma_memory_set(s->dma_as, dma.address, 0, len)) {
+ if (dma_memory_set(s->dma_as, dma.address, 0, len,
+ MEMTXATTRS_UNSPECIFIED)) {
dma.control |= FW_CFG_DMA_CTL_ERROR;
}
}
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 10/13] dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 09/13] dma: Let dma_memory_set() " Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 4:01 ` Richard Henderson
2020-09-07 1:14 ` Li Qiang
2020-09-04 15:44 ` [PATCH 11/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
` (6 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
We will add the MemTxAttrs argument to dma_memory_rw() in
the next commit. Since dma_memory_rw_relaxed() is only used
by dma_memory_rw(), modify it first in a separate commit to
keep the next commit easier to review.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/sysemu/dma.h | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index d0381f9ae9b..59331ec0bd3 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -83,9 +83,10 @@ static inline bool dma_memory_valid(AddressSpace *as,
static inline MemTxResult dma_memory_rw_relaxed(AddressSpace *as,
dma_addr_t addr,
void *buf, dma_addr_t len,
- DMADirection dir)
+ DMADirection dir,
+ MemTxAttrs attrs)
{
- return address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
+ return address_space_rw(as, addr, attrs,
buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
}
@@ -93,7 +94,9 @@ static inline MemTxResult dma_memory_read_relaxed(AddressSpace *as,
dma_addr_t addr,
void *buf, dma_addr_t len)
{
- return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
+ return dma_memory_rw_relaxed(as, addr, buf, len,
+ DMA_DIRECTION_TO_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
}
static inline MemTxResult dma_memory_write_relaxed(AddressSpace *as,
@@ -102,7 +105,8 @@ static inline MemTxResult dma_memory_write_relaxed(AddressSpace *as,
dma_addr_t len)
{
return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
- DMA_DIRECTION_FROM_DEVICE);
+ DMA_DIRECTION_FROM_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
}
/**
@@ -124,7 +128,8 @@ static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
{
dma_barrier(as, dir);
- return dma_memory_rw_relaxed(as, addr, buf, len, dir);
+ return dma_memory_rw_relaxed(as, addr, buf, len, dir,
+ MEMTXATTRS_UNSPECIFIED);
}
/**
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 11/13] dma: Let dma_memory_rw() take MemTxAttrs argument
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 10/13] dma: Let dma_memory_rw_relaxed() " Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 4:02 ` Richard Henderson
2020-09-07 1:16 ` Li Qiang
2020-09-04 15:44 ` [PATCH 12/13] dma: Let dma_memory_read/write() " Philippe Mathieu-Daudé
` (5 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
Let devices specify transaction attributes when calling
dma_memory_rw().
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/pci/pci.h | 3 ++-
include/sysemu/dma.h | 11 ++++++-----
dma-helpers.c | 3 ++-
hw/intc/spapr_xive.c | 3 ++-
hw/usb/hcd-ohci.c | 10 ++++++----
5 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 896cef9ad47..0c3217e019c 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -788,7 +788,8 @@ static inline AddressSpace *pci_get_address_space(PCIDevice *dev)
static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
void *buf, dma_addr_t len, DMADirection dir)
{
- return dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
+ return dma_memory_rw(pci_get_address_space(dev), addr, buf, len,
+ dir, MEMTXATTRS_UNSPECIFIED);
}
static inline int pci_dma_read(PCIDevice *dev, dma_addr_t addr,
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 59331ec0bd3..0695d430119 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -121,15 +121,15 @@ static inline MemTxResult dma_memory_write_relaxed(AddressSpace *as,
* @buf: buffer with the data transferred
* @len: the number of bytes to read or write
* @dir: indicates the transfer direction
+ * @attrs: memory transaction attributes
*/
static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
void *buf, dma_addr_t len,
- DMADirection dir)
+ DMADirection dir, MemTxAttrs attrs)
{
dma_barrier(as, dir);
- return dma_memory_rw_relaxed(as, addr, buf, len, dir,
- MEMTXATTRS_UNSPECIFIED);
+ return dma_memory_rw_relaxed(as, addr, buf, len, dir, attrs);
}
/**
@@ -147,7 +147,8 @@ static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
void *buf, dma_addr_t len)
{
- return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
+ return dma_memory_rw(as, addr, buf, len,
+ DMA_DIRECTION_TO_DEVICE, MEMTXATTRS_UNSPECIFIED);
}
/**
@@ -166,7 +167,7 @@ static inline MemTxResult dma_memory_write(AddressSpace *as, dma_addr_t addr,
const void *buf, dma_addr_t len)
{
return dma_memory_rw(as, addr, (void *)buf, len,
- DMA_DIRECTION_FROM_DEVICE);
+ DMA_DIRECTION_FROM_DEVICE, MEMTXATTRS_UNSPECIFIED);
}
/**
diff --git a/dma-helpers.c b/dma-helpers.c
index 6a9735386dc..6c3b2200f16 100644
--- a/dma-helpers.c
+++ b/dma-helpers.c
@@ -305,7 +305,8 @@ static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg,
while (len > 0) {
ScatterGatherEntry entry = sg->sg[sg_cur_index++];
int32_t xfer = MIN(len, entry.len);
- dma_memory_rw(sg->as, entry.base, ptr, xfer, dir);
+ dma_memory_rw(sg->as, entry.base, ptr, xfer, dir,
+ MEMTXATTRS_UNSPECIFIED);
ptr += xfer;
len -= xfer;
resid -= xfer;
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 4bd0d606ba1..dbf73a8bf47 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -1666,7 +1666,8 @@ static target_ulong h_int_esb(PowerPCCPU *cpu,
mmio_addr = xive->vc_base + xive_source_esb_mgmt(xsrc, lisn) + offset;
if (dma_memory_rw(&address_space_memory, mmio_addr, &data, 8,
- (flags & SPAPR_XIVE_ESB_STORE))) {
+ (flags & SPAPR_XIVE_ESB_STORE),
+ MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "XIVE: failed to access ESB @0x%"
HWADDR_PRIx "\n", mmio_addr);
return H_HARDWARE;
diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
index 1e6e85e86a8..bac1adf439c 100644
--- a/hw/usb/hcd-ohci.c
+++ b/hw/usb/hcd-ohci.c
@@ -586,7 +586,8 @@ static int ohci_copy_td(OHCIState *ohci, struct ohci_td *td,
if (n > len)
n = len;
- if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir)) {
+ if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
+ n, dir, MEMTXATTRS_UNSPECIFIED)) {
return -1;
}
if (n == len) {
@@ -595,7 +596,7 @@ static int ohci_copy_td(OHCIState *ohci, struct ohci_td *td,
ptr = td->be & ~0xfffu;
buf += n;
if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
- len - n, dir)) {
+ len - n, dir, MEMTXATTRS_UNSPECIFIED)) {
return -1;
}
return 0;
@@ -613,7 +614,8 @@ static int ohci_copy_iso_td(OHCIState *ohci,
if (n > len)
n = len;
- if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir)) {
+ if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
+ n, dir, MEMTXATTRS_UNSPECIFIED)) {
return -1;
}
if (n == len) {
@@ -622,7 +624,7 @@ static int ohci_copy_iso_td(OHCIState *ohci,
ptr = end_addr & ~0xfffu;
buf += n;
if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
- len - n, dir)) {
+ len - n, dir, MEMTXATTRS_UNSPECIFIED)) {
return -1;
}
return 0;
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 12/13] dma: Let dma_memory_read/write() take MemTxAttrs argument
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 11/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 4:04 ` Richard Henderson
2020-09-07 1:17 ` Li Qiang
2020-09-04 15:44 ` [PATCH 13/13] dma: Let dma_memory_map() " Philippe Mathieu-Daudé
` (4 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
Let devices specify transaction attributes when calling
dma_memory_read() or dma_memory_write().
Patch created mechanically using spatch with this script:
@@
expression E1, E2, E3, E4;
@@
(
- dma_memory_read(E1, E2, E3, E4)
+ dma_memory_read(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
|
- dma_memory_write(E1, E2, E3, E4)
+ dma_memory_write(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
)
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/ppc/spapr_vio.h | 6 ++++--
include/sysemu/dma.h | 20 ++++++++++++--------
hw/arm/musicpal.c | 13 +++++++------
hw/arm/smmu-common.c | 3 ++-
hw/arm/smmuv3.c | 14 +++++++++-----
hw/core/generic-loader.c | 3 ++-
hw/dma/pl330.c | 12 ++++++++----
hw/dma/sparc32_dma.c | 16 ++++++++++------
hw/dma/xlnx-zynq-devcfg.c | 6 ++++--
hw/dma/xlnx_dpdma.c | 10 ++++++----
hw/i386/amd_iommu.c | 16 +++++++++-------
hw/i386/intel_iommu.c | 28 +++++++++++++++++-----------
hw/ide/macio.c | 2 +-
hw/intc/xive.c | 7 ++++---
hw/misc/bcm2835_property.c | 3 ++-
hw/misc/macio/mac_dbdma.c | 10 ++++++----
hw/net/allwinner-sun8i-emac.c | 21 ++++++++++++++-------
hw/net/ftgmac100.c | 25 ++++++++++++++++---------
hw/net/imx_fec.c | 32 ++++++++++++++++++++------------
hw/nvram/fw_cfg.c | 9 ++++++---
hw/pci-host/pnv_phb3.c | 5 +++--
hw/pci-host/pnv_phb3_msi.c | 9 ++++++---
hw/pci-host/pnv_phb4.c | 7 ++++---
hw/sd/allwinner-sdhost.c | 14 ++++++++------
hw/sd/sdhci.c | 35 ++++++++++++++++++++++-------------
hw/usb/hcd-dwc2.c | 8 ++++----
hw/usb/hcd-ehci.c | 6 ++++--
hw/usb/hcd-ohci.c | 18 +++++++++++-------
28 files changed, 221 insertions(+), 137 deletions(-)
diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
index 6e5c0840248..8168f4fc5a5 100644
--- a/include/hw/ppc/spapr_vio.h
+++ b/include/hw/ppc/spapr_vio.h
@@ -102,14 +102,16 @@ static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr,
static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr,
void *buf, uint32_t size)
{
- return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
+ return (dma_memory_read(&dev->as, taddr,
+ buf, size, MEMTXATTRS_UNSPECIFIED) != 0) ?
H_DEST_PARM : H_SUCCESS;
}
static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr,
const void *buf, uint32_t size)
{
- return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
+ return (dma_memory_write(&dev->as, taddr,
+ buf, size, MEMTXATTRS_UNSPECIFIED) != 0) ?
H_DEST_PARM : H_SUCCESS;
}
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 0695d430119..b9cb9c8944b 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -143,12 +143,14 @@ static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
* @addr: address within that address space
* @buf: buffer with the data transferred
* @len: length of the data transferred
+ * @attrs: memory transaction attributes
*/
static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
- void *buf, dma_addr_t len)
+ void *buf, dma_addr_t len,
+ MemTxAttrs attrs)
{
return dma_memory_rw(as, addr, buf, len,
- DMA_DIRECTION_TO_DEVICE, MEMTXATTRS_UNSPECIFIED);
+ DMA_DIRECTION_TO_DEVICE, attrs);
}
/**
@@ -162,12 +164,14 @@ static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
* @addr: address within that address space
* @buf: buffer with the data transferred
* @len: the number of bytes to write
+ * @attrs: memory transaction attributes
*/
static inline MemTxResult dma_memory_write(AddressSpace *as, dma_addr_t addr,
- const void *buf, dma_addr_t len)
+ const void *buf, dma_addr_t len,
+ MemTxAttrs attrs)
{
return dma_memory_rw(as, addr, (void *)buf, len,
- DMA_DIRECTION_FROM_DEVICE, MEMTXATTRS_UNSPECIFIED);
+ DMA_DIRECTION_FROM_DEVICE, attrs);
}
/**
@@ -240,7 +244,7 @@ static inline void dma_memory_unmap(AddressSpace *as,
dma_addr_t addr) \
{ \
uint##_bits##_t val; \
- dma_memory_read(as, addr, &val, (_bits) / 8); \
+ dma_memory_read(as, addr, &val, (_bits) / 8, MEMTXATTRS_UNSPECIFIED); \
return _end##_bits##_to_cpu(val); \
} \
static inline void st##_sname##_##_end##_dma(AddressSpace *as, \
@@ -248,20 +252,20 @@ static inline void dma_memory_unmap(AddressSpace *as,
uint##_bits##_t val) \
{ \
val = cpu_to_##_end##_bits(val); \
- dma_memory_write(as, addr, &val, (_bits) / 8); \
+ dma_memory_write(as, addr, &val, (_bits) / 8, MEMTXATTRS_UNSPECIFIED); \
}
static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr)
{
uint8_t val;
- dma_memory_read(as, addr, &val, 1);
+ dma_memory_read(as, addr, &val, 1, MEMTXATTRS_UNSPECIFIED);
return val;
}
static inline void stb_dma(AddressSpace *as, dma_addr_t addr, uint8_t val)
{
- dma_memory_write(as, addr, &val, 1);
+ dma_memory_write(as, addr, &val, 1, MEMTXATTRS_UNSPECIFIED);
}
DEFINE_LDST_DMA(uw, w, 16, le);
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index f2f4fc02649..5d9959e8ddd 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -187,13 +187,13 @@ static void eth_rx_desc_put(AddressSpace *dma_as, uint32_t addr,
cpu_to_le16s(&desc->buffer_size);
cpu_to_le32s(&desc->buffer);
cpu_to_le32s(&desc->next);
- dma_memory_write(dma_as, addr, desc, sizeof(*desc));
+ dma_memory_write(dma_as, addr, desc, sizeof(*desc), MEMTXATTRS_UNSPECIFIED);
}
static void eth_rx_desc_get(AddressSpace *dma_as, uint32_t addr,
mv88w8618_rx_desc *desc)
{
- dma_memory_read(dma_as, addr, desc, sizeof(*desc));
+ dma_memory_read(dma_as, addr, desc, sizeof(*desc), MEMTXATTRS_UNSPECIFIED);
le32_to_cpus(&desc->cmdstat);
le16_to_cpus(&desc->bytes);
le16_to_cpus(&desc->buffer_size);
@@ -217,7 +217,7 @@ static ssize_t eth_receive(NetClientState *nc, const uint8_t *buf, size_t size)
eth_rx_desc_get(&s->dma_as, desc_addr, &desc);
if ((desc.cmdstat & MP_ETH_RX_OWN) && desc.buffer_size >= size) {
dma_memory_write(&s->dma_as, desc.buffer + s->vlan_header,
- buf, size);
+ buf, size, MEMTXATTRS_UNSPECIFIED);
desc.bytes = size + s->vlan_header;
desc.cmdstat &= ~MP_ETH_RX_OWN;
s->cur_rx[i] = desc.next;
@@ -243,13 +243,13 @@ static void eth_tx_desc_put(AddressSpace *dma_as, uint32_t addr,
cpu_to_le16s(&desc->bytes);
cpu_to_le32s(&desc->buffer);
cpu_to_le32s(&desc->next);
- dma_memory_write(dma_as, addr, desc, sizeof(*desc));
+ dma_memory_write(dma_as, addr, desc, sizeof(*desc), MEMTXATTRS_UNSPECIFIED);
}
static void eth_tx_desc_get(AddressSpace *dma_as, uint32_t addr,
mv88w8618_tx_desc *desc)
{
- dma_memory_read(dma_as, addr, desc, sizeof(*desc));
+ dma_memory_read(dma_as, addr, desc, sizeof(*desc), MEMTXATTRS_UNSPECIFIED);
le32_to_cpus(&desc->cmdstat);
le16_to_cpus(&desc->res);
le16_to_cpus(&desc->bytes);
@@ -271,7 +271,8 @@ static void eth_send(mv88w8618_eth_state *s, int queue_index)
if (desc.cmdstat & MP_ETH_TX_OWN) {
len = desc.bytes;
if (len < 2048) {
- dma_memory_read(&s->dma_as, desc.buffer, buf, len);
+ dma_memory_read(&s->dma_as, desc.buffer, buf, len,
+ MEMTXATTRS_UNSPECIFIED);
qemu_send_packet(qemu_get_queue(s->nic), buf, len);
}
desc.cmdstat &= ~MP_ETH_TX_OWN;
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index 3838db13952..f42ee237204 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -188,7 +188,8 @@ static int get_pte(dma_addr_t baseaddr, uint32_t index, uint64_t *pte,
dma_addr_t addr = baseaddr + index * sizeof(*pte);
/* TODO: guarantee 64-bit single-copy atomicity */
- ret = dma_memory_read(&address_space_memory, addr, pte, sizeof(*pte));
+ ret = dma_memory_read(&address_space_memory, addr, pte, sizeof(*pte),
+ MEMTXATTRS_UNSPECIFIED);
if (ret != MEMTX_OK) {
info->type = SMMU_PTW_ERR_WALK_EABT;
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 0122700e725..71d0eea2af1 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -101,7 +101,8 @@ static inline MemTxResult queue_read(SMMUQueue *q, void *data)
{
dma_addr_t addr = Q_CONS_ENTRY(q);
- return dma_memory_read(&address_space_memory, addr, data, q->entry_size);
+ return dma_memory_read(&address_space_memory, addr, data, q->entry_size,
+ MEMTXATTRS_UNSPECIFIED);
}
static MemTxResult queue_write(SMMUQueue *q, void *data)
@@ -109,7 +110,8 @@ static MemTxResult queue_write(SMMUQueue *q, void *data)
dma_addr_t addr = Q_PROD_ENTRY(q);
MemTxResult ret;
- ret = dma_memory_write(&address_space_memory, addr, data, q->entry_size);
+ ret = dma_memory_write(&address_space_memory, addr, data, q->entry_size,
+ MEMTXATTRS_UNSPECIFIED);
if (ret != MEMTX_OK) {
return ret;
}
@@ -283,7 +285,8 @@ static int smmu_get_ste(SMMUv3State *s, dma_addr_t addr, STE *buf,
trace_smmuv3_get_ste(addr);
/* TODO: guarantee 64-bit single-copy atomicity */
- ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf));
+ ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf),
+ MEMTXATTRS_UNSPECIFIED);
if (ret != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR,
"Cannot fetch pte at address=0x%"PRIx64"\n", addr);
@@ -304,7 +307,8 @@ static int smmu_get_cd(SMMUv3State *s, STE *ste, uint32_t ssid,
trace_smmuv3_get_cd(addr);
/* TODO: guarantee 64-bit single-copy atomicity */
- ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf));
+ ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf),
+ MEMTXATTRS_UNSPECIFIED);
if (ret != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR,
"Cannot fetch pte at address=0x%"PRIx64"\n", addr);
@@ -409,7 +413,7 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste,
l1ptr = (dma_addr_t)(strtab_base + l1_ste_offset * sizeof(l1std));
/* TODO: guarantee 64-bit single-copy atomicity */
ret = dma_memory_read(&address_space_memory, l1ptr, &l1std,
- sizeof(l1std));
+ sizeof(l1std), MEMTXATTRS_UNSPECIFIED);
if (ret != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR,
"Could not read L1PTR at 0X%"PRIx64"\n", l1ptr);
diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c
index a242c076f69..ba48ebae993 100644
--- a/hw/core/generic-loader.c
+++ b/hw/core/generic-loader.c
@@ -57,7 +57,8 @@ static void generic_loader_reset(void *opaque)
if (s->data_len) {
assert(s->data_len < sizeof(s->data));
- dma_memory_write(s->cpu->as, s->addr, &s->data, s->data_len);
+ dma_memory_write(s->cpu->as, s->addr, &s->data, s->data_len,
+ MEMTXATTRS_UNSPECIFIED);
}
}
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index 0bd63a43f50..0361524c067 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -1107,7 +1107,8 @@ static inline const PL330InsnDesc *pl330_fetch_insn(PL330Chan *ch)
uint8_t opcode;
int i;
- dma_memory_read(&address_space_memory, ch->pc, &opcode, 1);
+ dma_memory_read(&address_space_memory, ch->pc, &opcode, 1,
+ MEMTXATTRS_UNSPECIFIED);
for (i = 0; insn_desc[i].size; i++) {
if ((opcode & insn_desc[i].opmask) == insn_desc[i].opcode) {
return &insn_desc[i];
@@ -1121,7 +1122,8 @@ static inline void pl330_exec_insn(PL330Chan *ch, const PL330InsnDesc *insn)
uint8_t buf[PL330_INSN_MAXSIZE];
assert(insn->size <= PL330_INSN_MAXSIZE);
- dma_memory_read(&address_space_memory, ch->pc, buf, insn->size);
+ dma_memory_read(&address_space_memory, ch->pc, buf, insn->size,
+ MEMTXATTRS_UNSPECIFIED);
insn->exec(ch, buf[0], &buf[1], insn->size - 1);
}
@@ -1185,7 +1187,8 @@ static int pl330_exec_cycle(PL330Chan *channel)
if (q != NULL && q->len <= pl330_fifo_num_free(&s->fifo)) {
int len = q->len - (q->addr & (q->len - 1));
- dma_memory_read(&address_space_memory, q->addr, buf, len);
+ dma_memory_read(&address_space_memory, q->addr, buf, len,
+ MEMTXATTRS_UNSPECIFIED);
trace_pl330_exec_cycle(q->addr, len);
if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) {
pl330_hexdump(buf, len);
@@ -1216,7 +1219,8 @@ static int pl330_exec_cycle(PL330Chan *channel)
fifo_res = pl330_fifo_get(&s->fifo, buf, len, q->tag);
}
if (fifo_res == PL330_FIFO_OK || q->z) {
- dma_memory_write(&address_space_memory, q->addr, buf, len);
+ dma_memory_write(&address_space_memory, q->addr, buf, len,
+ MEMTXATTRS_UNSPECIFIED);
trace_pl330_exec_cycle(q->addr, len);
if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) {
pl330_hexdump(buf, len);
diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c
index bcd1626fbd5..00c22232ceb 100644
--- a/hw/dma/sparc32_dma.c
+++ b/hw/dma/sparc32_dma.c
@@ -81,11 +81,11 @@ void ledma_memory_read(void *opaque, hwaddr addr,
addr |= s->dmaregs[3];
trace_ledma_memory_read(addr, len);
if (do_bswap) {
- dma_memory_read(&is->iommu_as, addr, buf, len);
+ dma_memory_read(&is->iommu_as, addr, buf, len, MEMTXATTRS_UNSPECIFIED);
} else {
addr &= ~1;
len &= ~1;
- dma_memory_read(&is->iommu_as, addr, buf, len);
+ dma_memory_read(&is->iommu_as, addr, buf, len, MEMTXATTRS_UNSPECIFIED);
for(i = 0; i < len; i += 2) {
bswap16s((uint16_t *)(buf + i));
}
@@ -103,7 +103,8 @@ void ledma_memory_write(void *opaque, hwaddr addr,
addr |= s->dmaregs[3];
trace_ledma_memory_write(addr, len);
if (do_bswap) {
- dma_memory_write(&is->iommu_as, addr, buf, len);
+ dma_memory_write(&is->iommu_as, addr, buf, len,
+ MEMTXATTRS_UNSPECIFIED);
} else {
addr &= ~1;
len &= ~1;
@@ -114,7 +115,8 @@ void ledma_memory_write(void *opaque, hwaddr addr,
for(i = 0; i < l; i += 2) {
tmp_buf[i >> 1] = bswap16(*(uint16_t *)(buf + i));
}
- dma_memory_write(&is->iommu_as, addr, tmp_buf, l);
+ dma_memory_write(&is->iommu_as, addr, tmp_buf, l,
+ MEMTXATTRS_UNSPECIFIED);
len -= l;
buf += l;
addr += l;
@@ -148,7 +150,8 @@ void espdma_memory_read(void *opaque, uint8_t *buf, int len)
IOMMUState *is = (IOMMUState *)s->iommu;
trace_espdma_memory_read(s->dmaregs[1], len);
- dma_memory_read(&is->iommu_as, s->dmaregs[1], buf, len);
+ dma_memory_read(&is->iommu_as, s->dmaregs[1], buf, len,
+ MEMTXATTRS_UNSPECIFIED);
s->dmaregs[1] += len;
}
@@ -158,7 +161,8 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int len)
IOMMUState *is = (IOMMUState *)s->iommu;
trace_espdma_memory_write(s->dmaregs[1], len);
- dma_memory_write(&is->iommu_as, s->dmaregs[1], buf, len);
+ dma_memory_write(&is->iommu_as, s->dmaregs[1], buf, len,
+ MEMTXATTRS_UNSPECIFIED);
s->dmaregs[1] += len;
}
diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
index e33112b6f0e..f5ad1a0d22c 100644
--- a/hw/dma/xlnx-zynq-devcfg.c
+++ b/hw/dma/xlnx-zynq-devcfg.c
@@ -161,12 +161,14 @@ static void xlnx_zynq_devcfg_dma_go(XlnxZynqDevcfg *s)
btt = MIN(btt, dmah->dest_len);
}
DB_PRINT("reading %x bytes from %x\n", btt, dmah->src_addr);
- dma_memory_read(&address_space_memory, dmah->src_addr, buf, btt);
+ dma_memory_read(&address_space_memory, dmah->src_addr, buf, btt,
+ MEMTXATTRS_UNSPECIFIED);
dmah->src_len -= btt;
dmah->src_addr += btt;
if (loopback && (dmah->src_len || dmah->dest_len)) {
DB_PRINT("writing %x bytes from %x\n", btt, dmah->dest_addr);
- dma_memory_write(&address_space_memory, dmah->dest_addr, buf, btt);
+ dma_memory_write(&address_space_memory, dmah->dest_addr, buf, btt,
+ MEMTXATTRS_UNSPECIFIED);
dmah->dest_len -= btt;
dmah->dest_addr += btt;
}
diff --git a/hw/dma/xlnx_dpdma.c b/hw/dma/xlnx_dpdma.c
index b40c897de2c..321f30a6535 100644
--- a/hw/dma/xlnx_dpdma.c
+++ b/hw/dma/xlnx_dpdma.c
@@ -652,7 +652,7 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
}
if (dma_memory_read(&address_space_memory, desc_addr, &desc,
- sizeof(DPDMADescriptor))) {
+ sizeof(DPDMADescriptor), MEMTXATTRS_UNSPECIFIED)) {
s->registers[DPDMA_EISR] |= ((1 << 1) << channel);
xlnx_dpdma_update_irq(s);
s->operation_finished[channel] = true;
@@ -708,7 +708,8 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
if (dma_memory_read(&address_space_memory,
source_addr[0],
&s->data[channel][ptr],
- line_size)) {
+ line_size,
+ MEMTXATTRS_UNSPECIFIED)) {
s->registers[DPDMA_ISR] |= ((1 << 12) << channel);
xlnx_dpdma_update_irq(s);
DPRINTF("Can't get data.\n");
@@ -736,7 +737,8 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
if (dma_memory_read(&address_space_memory,
source_addr[frag],
&(s->data[channel][ptr]),
- fragment_len)) {
+ fragment_len,
+ MEMTXATTRS_UNSPECIFIED)) {
s->registers[DPDMA_ISR] |= ((1 << 12) << channel);
xlnx_dpdma_update_irq(s);
DPRINTF("Can't get data.\n");
@@ -754,7 +756,7 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
DPRINTF("update the descriptor with the done flag set.\n");
xlnx_dpdma_desc_set_done(&desc);
dma_memory_write(&address_space_memory, desc_addr, &desc,
- sizeof(DPDMADescriptor));
+ sizeof(DPDMADescriptor), MEMTXATTRS_UNSPECIFIED);
}
if (xlnx_dpdma_desc_completion_interrupt(&desc)) {
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 74a93a5d93f..3c2a1a61db5 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -181,7 +181,7 @@ static void amdvi_log_event(AMDVIState *s, uint64_t *evt)
}
if (dma_memory_write(&address_space_memory, s->evtlog + s->evtlog_tail,
- evt, AMDVI_EVENT_LEN)) {
+ evt, AMDVI_EVENT_LEN, MEMTXATTRS_UNSPECIFIED)) {
trace_amdvi_evntlog_fail(s->evtlog, s->evtlog_tail);
}
@@ -376,7 +376,8 @@ static void amdvi_completion_wait(AMDVIState *s, uint64_t *cmd)
}
if (extract64(cmd[0], 0, 1)) {
if (dma_memory_write(&address_space_memory, addr, &data,
- AMDVI_COMPLETION_DATA_SIZE)) {
+ AMDVI_COMPLETION_DATA_SIZE,
+ MEMTXATTRS_UNSPECIFIED)) {
trace_amdvi_completion_wait_fail(addr);
}
}
@@ -502,7 +503,7 @@ static void amdvi_cmdbuf_exec(AMDVIState *s)
uint64_t cmd[2];
if (dma_memory_read(&address_space_memory, s->cmdbuf + s->cmdbuf_head,
- cmd, AMDVI_COMMAND_SIZE)) {
+ cmd, AMDVI_COMMAND_SIZE, MEMTXATTRS_UNSPECIFIED)) {
trace_amdvi_command_read_fail(s->cmdbuf, s->cmdbuf_head);
amdvi_log_command_error(s, s->cmdbuf + s->cmdbuf_head);
return;
@@ -836,7 +837,7 @@ static bool amdvi_get_dte(AMDVIState *s, int devid, uint64_t *entry)
uint32_t offset = devid * AMDVI_DEVTAB_ENTRY_SIZE;
if (dma_memory_read(&address_space_memory, s->devtab + offset, entry,
- AMDVI_DEVTAB_ENTRY_SIZE)) {
+ AMDVI_DEVTAB_ENTRY_SIZE, MEMTXATTRS_UNSPECIFIED)) {
trace_amdvi_dte_get_fail(s->devtab, offset);
/* log error accessing dte */
amdvi_log_devtab_error(s, devid, s->devtab + offset, 0);
@@ -881,7 +882,8 @@ static inline uint64_t amdvi_get_pte_entry(AMDVIState *s, uint64_t pte_addr,
{
uint64_t pte;
- if (dma_memory_read(&address_space_memory, pte_addr, &pte, sizeof(pte))) {
+ if (dma_memory_read(&address_space_memory, pte_addr,
+ &pte, sizeof(pte), MEMTXATTRS_UNSPECIFIED)) {
trace_amdvi_get_pte_hwerror(pte_addr);
amdvi_log_pagetab_error(s, devid, pte_addr, 0);
pte = 0;
@@ -1048,7 +1050,7 @@ static int amdvi_get_irte(AMDVIState *s, MSIMessage *origin, uint64_t *dte,
trace_amdvi_ir_irte(irte_root, offset);
if (dma_memory_read(&address_space_memory, irte_root + offset,
- irte, sizeof(*irte))) {
+ irte, sizeof(*irte), MEMTXATTRS_UNSPECIFIED)) {
trace_amdvi_ir_err("failed to get irte");
return -AMDVI_IR_GET_IRTE;
}
@@ -1108,7 +1110,7 @@ static int amdvi_get_irte_ga(AMDVIState *s, MSIMessage *origin, uint64_t *dte,
trace_amdvi_ir_irte(irte_root, offset);
if (dma_memory_read(&address_space_memory, irte_root + offset,
- irte, sizeof(*irte))) {
+ irte, sizeof(*irte), MEMTXATTRS_UNSPECIFIED)) {
trace_amdvi_ir_err("failed to get irte_ga");
return -AMDVI_IR_GET_IRTE;
}
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 749eb6ad632..8de57dd995e 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -570,7 +570,8 @@ static int vtd_get_root_entry(IntelIOMMUState *s, uint8_t index,
dma_addr_t addr;
addr = s->root + index * sizeof(*re);
- if (dma_memory_read(&address_space_memory, addr, re, sizeof(*re))) {
+ if (dma_memory_read(&address_space_memory, addr,
+ re, sizeof(*re), MEMTXATTRS_UNSPECIFIED)) {
re->lo = 0;
return -VTD_FR_ROOT_TABLE_INV;
}
@@ -603,7 +604,8 @@ static int vtd_get_context_entry_from_root(IntelIOMMUState *s,
}
addr = addr + index * ce_size;
- if (dma_memory_read(&address_space_memory, addr, ce, ce_size)) {
+ if (dma_memory_read(&address_space_memory, addr,
+ ce, ce_size, MEMTXATTRS_UNSPECIFIED)) {
return -VTD_FR_CONTEXT_TABLE_INV;
}
@@ -640,8 +642,8 @@ static uint64_t vtd_get_slpte(dma_addr_t base_addr, uint32_t index)
assert(index < VTD_SL_PT_ENTRY_NR);
if (dma_memory_read(&address_space_memory,
- base_addr + index * sizeof(slpte), &slpte,
- sizeof(slpte))) {
+ base_addr + index * sizeof(slpte),
+ &slpte, sizeof(slpte), MEMTXATTRS_UNSPECIFIED)) {
slpte = (uint64_t)-1;
return slpte;
}
@@ -705,7 +707,8 @@ static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base,
index = VTD_PASID_DIR_INDEX(pasid);
entry_size = VTD_PASID_DIR_ENTRY_SIZE;
addr = pasid_dir_base + index * entry_size;
- if (dma_memory_read(&address_space_memory, addr, pdire, entry_size)) {
+ if (dma_memory_read(&address_space_memory, addr,
+ pdire, entry_size, MEMTXATTRS_UNSPECIFIED)) {
return -VTD_FR_PASID_TABLE_INV;
}
@@ -729,7 +732,8 @@ static int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s,
index = VTD_PASID_TABLE_INDEX(pasid);
entry_size = VTD_PASID_ENTRY_SIZE;
addr = addr + index * entry_size;
- if (dma_memory_read(&address_space_memory, addr, pe, entry_size)) {
+ if (dma_memory_read(&address_space_memory, addr,
+ pe, entry_size, MEMTXATTRS_UNSPECIFIED)) {
return -VTD_FR_PASID_TABLE_INV;
}
@@ -2262,7 +2266,8 @@ static bool vtd_get_inv_desc(IntelIOMMUState *s,
uint32_t dw = s->iq_dw ? 32 : 16;
dma_addr_t addr = base_addr + offset * dw;
- if (dma_memory_read(&address_space_memory, addr, inv_desc, dw)) {
+ if (dma_memory_read(&address_space_memory, addr,
+ inv_desc, dw, MEMTXATTRS_UNSPECIFIED)) {
error_report_once("Read INV DESC failed.");
return false;
}
@@ -2295,8 +2300,9 @@ static bool vtd_process_wait_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc)
dma_addr_t status_addr = inv_desc->hi;
trace_vtd_inv_desc_wait_sw(status_addr, status_data);
status_data = cpu_to_le32(status_data);
- if (dma_memory_write(&address_space_memory, status_addr, &status_data,
- sizeof(status_data))) {
+ if (dma_memory_write(&address_space_memory, status_addr,
+ &status_data, sizeof(status_data),
+ MEMTXATTRS_UNSPECIFIED)) {
trace_vtd_inv_desc_wait_write_fail(inv_desc->hi, inv_desc->lo);
return false;
}
@@ -3106,8 +3112,8 @@ static int vtd_irte_get(IntelIOMMUState *iommu, uint16_t index,
}
addr = iommu->intr_root + index * sizeof(*entry);
- if (dma_memory_read(&address_space_memory, addr, entry,
- sizeof(*entry))) {
+ if (dma_memory_read(&address_space_memory, addr,
+ entry, sizeof(*entry), MEMTXATTRS_UNSPECIFIED)) {
error_report_once("%s: read failed: ind=0x%x addr=0x%" PRIx64,
__func__, index, addr);
return -VTD_FR_IR_ROOT_INVAL;
diff --git a/hw/ide/macio.c b/hw/ide/macio.c
index 62a599a0751..a93a2b75a85 100644
--- a/hw/ide/macio.c
+++ b/hw/ide/macio.c
@@ -97,7 +97,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
/* Non-block ATAPI transfer - just copy to RAM */
s->io_buffer_size = MIN(s->io_buffer_size, io->len);
dma_memory_write(&address_space_memory, io->addr, s->io_buffer,
- s->io_buffer_size);
+ s->io_buffer_size, MEMTXATTRS_UNSPECIFIED);
io->len = 0;
ide_atapi_cmd_ok(s);
m->dma_active = false;
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 489e6256ef7..8e8618c1ab4 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1236,8 +1236,8 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon)
uint64_t qaddr = qaddr_base + (qindex << 2);
uint32_t qdata = -1;
- if (dma_memory_read(&address_space_memory, qaddr, &qdata,
- sizeof(qdata))) {
+ if (dma_memory_read(&address_space_memory, qaddr,
+ &qdata, sizeof(qdata), MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "XIVE: failed to read EQ @0x%"
HWADDR_PRIx "\n", qaddr);
return;
@@ -1300,7 +1300,8 @@ static void xive_end_enqueue(XiveEND *end, uint32_t data)
uint32_t qdata = cpu_to_be32((qgen << 31) | (data & 0x7fffffff));
uint32_t qentries = 1 << (qsize + 10);
- if (dma_memory_write(&address_space_memory, qaddr, &qdata, sizeof(qdata))) {
+ if (dma_memory_write(&address_space_memory, qaddr,
+ &qdata, sizeof(qdata), MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "XIVE: failed to write END data @0x%"
HWADDR_PRIx "\n", qaddr);
return;
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index 73941bdae97..76ea511d53d 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -69,7 +69,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
case 0x00010003: /* Get board MAC address */
resplen = sizeof(s->macaddr.a);
- dma_memory_write(&s->dma_as, value + 12, s->macaddr.a, resplen);
+ dma_memory_write(&s->dma_as, value + 12, s->macaddr.a, resplen,
+ MEMTXATTRS_UNSPECIFIED);
break;
case 0x00010004: /* Get board serial */
qemu_log_mask(LOG_UNIMP,
diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc/macio/mac_dbdma.c
index e220f1a9277..efcc02609fd 100644
--- a/hw/misc/macio/mac_dbdma.c
+++ b/hw/misc/macio/mac_dbdma.c
@@ -94,7 +94,7 @@ static void dbdma_cmdptr_load(DBDMA_channel *ch)
DBDMA_DPRINTFCH(ch, "dbdma_cmdptr_load 0x%08x\n",
ch->regs[DBDMA_CMDPTR_LO]);
dma_memory_read(&address_space_memory, ch->regs[DBDMA_CMDPTR_LO],
- &ch->current, sizeof(dbdma_cmd));
+ &ch->current, sizeof(dbdma_cmd), MEMTXATTRS_UNSPECIFIED);
}
static void dbdma_cmdptr_save(DBDMA_channel *ch)
@@ -104,7 +104,7 @@ static void dbdma_cmdptr_save(DBDMA_channel *ch)
le16_to_cpu(ch->current.xfer_status),
le16_to_cpu(ch->current.res_count));
dma_memory_write(&address_space_memory, ch->regs[DBDMA_CMDPTR_LO],
- &ch->current, sizeof(dbdma_cmd));
+ &ch->current, sizeof(dbdma_cmd), MEMTXATTRS_UNSPECIFIED);
}
static void kill_channel(DBDMA_channel *ch)
@@ -371,7 +371,8 @@ static void load_word(DBDMA_channel *ch, int key, uint32_t addr,
return;
}
- dma_memory_read(&address_space_memory, addr, ¤t->cmd_dep, len);
+ dma_memory_read(&address_space_memory, addr, ¤t->cmd_dep, len,
+ MEMTXATTRS_UNSPECIFIED);
if (conditional_wait(ch))
goto wait;
@@ -403,7 +404,8 @@ static void store_word(DBDMA_channel *ch, int key, uint32_t addr,
return;
}
- dma_memory_write(&address_space_memory, addr, ¤t->cmd_dep, len);
+ dma_memory_write(&address_space_memory, addr, ¤t->cmd_dep, len,
+ MEMTXATTRS_UNSPECIFIED);
if (conditional_wait(ch))
goto wait;
diff --git a/hw/net/allwinner-sun8i-emac.c b/hw/net/allwinner-sun8i-emac.c
index 38d328587e3..5189ad77527 100644
--- a/hw/net/allwinner-sun8i-emac.c
+++ b/hw/net/allwinner-sun8i-emac.c
@@ -345,7 +345,8 @@ static uint32_t allwinner_sun8i_emac_next_desc(AwSun8iEmacState *s,
{
uint32_t paddr = desc->next;
- dma_memory_read(&s->dma_as, paddr, desc, sizeof(*desc));
+ dma_memory_read(&s->dma_as, paddr, desc, sizeof(*desc),
+ MEMTXATTRS_UNSPECIFIED);
if ((desc->status & DESC_STATUS_CTL) &&
(desc->status2 & DESC_STATUS2_BUF_SIZE_MASK) >= min_size) {
@@ -364,7 +365,8 @@ static uint32_t allwinner_sun8i_emac_get_desc(AwSun8iEmacState *s,
/* Note that the list is a cycle. Last entry points back to the head. */
while (desc_addr != 0) {
- dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc));
+ dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc),
+ MEMTXATTRS_UNSPECIFIED);
if ((desc->status & DESC_STATUS_CTL) &&
(desc->status2 & DESC_STATUS2_BUF_SIZE_MASK) >= min_size) {
@@ -397,7 +399,8 @@ static void allwinner_sun8i_emac_flush_desc(AwSun8iEmacState *s,
FrameDescriptor *desc,
uint32_t phys_addr)
{
- dma_memory_write(&s->dma_as, phys_addr, desc, sizeof(*desc));
+ dma_memory_write(&s->dma_as, phys_addr, desc, sizeof(*desc),
+ MEMTXATTRS_UNSPECIFIED);
}
static bool allwinner_sun8i_emac_can_receive(NetClientState *nc)
@@ -455,7 +458,8 @@ static ssize_t allwinner_sun8i_emac_receive(NetClientState *nc,
<< RX_DESC_STATUS_FRM_LEN_SHIFT;
}
- dma_memory_write(&s->dma_as, desc.addr, buf, desc_bytes);
+ dma_memory_write(&s->dma_as, desc.addr, buf, desc_bytes,
+ MEMTXATTRS_UNSPECIFIED);
allwinner_sun8i_emac_flush_desc(s, &desc, s->rx_desc_curr);
trace_allwinner_sun8i_emac_receive(s->rx_desc_curr, desc.addr,
desc_bytes);
@@ -506,7 +510,8 @@ static void allwinner_sun8i_emac_transmit(AwSun8iEmacState *s)
desc.status |= TX_DESC_STATUS_LENGTH_ERR;
break;
}
- dma_memory_read(&s->dma_as, desc.addr, packet_buf + packet_bytes, bytes);
+ dma_memory_read(&s->dma_as, desc.addr, packet_buf + packet_bytes,
+ bytes, MEMTXATTRS_UNSPECIFIED);
packet_bytes += bytes;
desc.status &= ~DESC_STATUS_CTL;
allwinner_sun8i_emac_flush_desc(s, &desc, s->tx_desc_curr);
@@ -628,7 +633,8 @@ static uint64_t allwinner_sun8i_emac_read(void *opaque, hwaddr offset,
break;
case REG_TX_CUR_BUF: /* Transmit Current Buffer */
if (s->tx_desc_curr != 0) {
- dma_memory_read(&s->dma_as, s->tx_desc_curr, &desc, sizeof(desc));
+ dma_memory_read(&s->dma_as, s->tx_desc_curr, &desc, sizeof(desc),
+ MEMTXATTRS_UNSPECIFIED);
value = desc.addr;
} else {
value = 0;
@@ -641,7 +647,8 @@ static uint64_t allwinner_sun8i_emac_read(void *opaque, hwaddr offset,
break;
case REG_RX_CUR_BUF: /* Receive Current Buffer */
if (s->rx_desc_curr != 0) {
- dma_memory_read(&s->dma_as, s->rx_desc_curr, &desc, sizeof(desc));
+ dma_memory_read(&s->dma_as, s->rx_desc_curr, &desc, sizeof(desc),
+ MEMTXATTRS_UNSPECIFIED);
value = desc.addr;
} else {
value = 0;
diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
index 782ff192ced..ee2da500948 100644
--- a/hw/net/ftgmac100.c
+++ b/hw/net/ftgmac100.c
@@ -453,7 +453,8 @@ static void do_phy_ctl(FTGMAC100State *s)
static int ftgmac100_read_bd(FTGMAC100Desc *bd, dma_addr_t addr)
{
- if (dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd))) {
+ if (dma_memory_read(&address_space_memory, addr,
+ bd, sizeof(*bd), MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to read descriptor @ 0x%"
HWADDR_PRIx "\n", __func__, addr);
return -1;
@@ -473,7 +474,8 @@ static int ftgmac100_write_bd(FTGMAC100Desc *bd, dma_addr_t addr)
lebd.des1 = cpu_to_le32(bd->des1);
lebd.des2 = cpu_to_le32(bd->des2);
lebd.des3 = cpu_to_le32(bd->des3);
- if (dma_memory_write(&address_space_memory, addr, &lebd, sizeof(lebd))) {
+ if (dma_memory_write(&address_space_memory, addr,
+ &lebd, sizeof(lebd), MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to write descriptor @ 0x%"
HWADDR_PRIx "\n", __func__, addr);
return -1;
@@ -554,7 +556,8 @@ static void ftgmac100_do_tx(FTGMAC100State *s, uint32_t tx_ring,
len = sizeof(s->frame) - frame_size;
}
- if (dma_memory_read(&address_space_memory, bd.des3, ptr, len)) {
+ if (dma_memory_read(&address_space_memory, bd.des3,
+ ptr, len, MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to read packet @ 0x%x\n",
__func__, bd.des3);
s->isr |= FTGMAC100_INT_AHB_ERR;
@@ -1019,20 +1022,24 @@ static ssize_t ftgmac100_receive(NetClientState *nc, const uint8_t *buf,
bd.des1 = lduw_be_p(buf + 14) | FTGMAC100_RXDES1_VLANTAG_AVAIL;
if (s->maccr & FTGMAC100_MACCR_RM_VLAN) {
- dma_memory_write(&address_space_memory, buf_addr, buf, 12);
- dma_memory_write(&address_space_memory, buf_addr + 12, buf + 16,
- buf_len - 16);
+ dma_memory_write(&address_space_memory, buf_addr, buf, 12,
+ MEMTXATTRS_UNSPECIFIED);
+ dma_memory_write(&address_space_memory, buf_addr + 12,
+ buf + 16, buf_len - 16,
+ MEMTXATTRS_UNSPECIFIED);
} else {
- dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
+ dma_memory_write(&address_space_memory, buf_addr, buf,
+ buf_len, MEMTXATTRS_UNSPECIFIED);
}
} else {
bd.des1 = 0;
- dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
+ dma_memory_write(&address_space_memory, buf_addr, buf, buf_len,
+ MEMTXATTRS_UNSPECIFIED);
}
buf += buf_len;
if (size < 4) {
dma_memory_write(&address_space_memory, buf_addr + buf_len,
- crc_ptr, 4 - size);
+ crc_ptr, 4 - size, MEMTXATTRS_UNSPECIFIED);
crc_ptr += 4 - size;
}
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index 2c148040414..ff4c345f09f 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -389,19 +389,22 @@ static void imx_phy_write(IMXFECState *s, int reg, uint32_t val)
static void imx_fec_read_bd(IMXFECBufDesc *bd, dma_addr_t addr)
{
- dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd));
+ dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd),
+ MEMTXATTRS_UNSPECIFIED);
trace_imx_fec_read_bd(addr, bd->flags, bd->length, bd->data);
}
static void imx_fec_write_bd(IMXFECBufDesc *bd, dma_addr_t addr)
{
- dma_memory_write(&address_space_memory, addr, bd, sizeof(*bd));
+ dma_memory_write(&address_space_memory, addr, bd, sizeof(*bd),
+ MEMTXATTRS_UNSPECIFIED);
}
static void imx_enet_read_bd(IMXENETBufDesc *bd, dma_addr_t addr)
{
- dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd));
+ dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd),
+ MEMTXATTRS_UNSPECIFIED);
trace_imx_enet_read_bd(addr, bd->flags, bd->length, bd->data,
bd->option, bd->status);
@@ -409,7 +412,8 @@ static void imx_enet_read_bd(IMXENETBufDesc *bd, dma_addr_t addr)
static void imx_enet_write_bd(IMXENETBufDesc *bd, dma_addr_t addr)
{
- dma_memory_write(&address_space_memory, addr, bd, sizeof(*bd));
+ dma_memory_write(&address_space_memory, addr, bd, sizeof(*bd),
+ MEMTXATTRS_UNSPECIFIED);
}
static void imx_eth_update(IMXFECState *s)
@@ -476,7 +480,8 @@ static void imx_fec_do_tx(IMXFECState *s)
len = ENET_MAX_FRAME_SIZE - frame_size;
s->regs[ENET_EIR] |= ENET_INT_BABT;
}
- dma_memory_read(&address_space_memory, bd.data, ptr, len);
+ dma_memory_read(&address_space_memory, bd.data, ptr, len,
+ MEMTXATTRS_UNSPECIFIED);
ptr += len;
frame_size += len;
if (bd.flags & ENET_BD_L) {
@@ -557,7 +562,8 @@ static void imx_enet_do_tx(IMXFECState *s, uint32_t index)
len = ENET_MAX_FRAME_SIZE - frame_size;
s->regs[ENET_EIR] |= ENET_INT_BABT;
}
- dma_memory_read(&address_space_memory, bd.data, ptr, len);
+ dma_memory_read(&address_space_memory, bd.data, ptr, len,
+ MEMTXATTRS_UNSPECIFIED);
ptr += len;
frame_size += len;
if (bd.flags & ENET_BD_L) {
@@ -1109,11 +1115,12 @@ static ssize_t imx_fec_receive(NetClientState *nc, const uint8_t *buf,
buf_len += size - 4;
}
buf_addr = bd.data;
- dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
+ dma_memory_write(&address_space_memory, buf_addr, buf, buf_len,
+ MEMTXATTRS_UNSPECIFIED);
buf += buf_len;
if (size < 4) {
dma_memory_write(&address_space_memory, buf_addr + buf_len,
- crc_ptr, 4 - size);
+ crc_ptr, 4 - size, MEMTXATTRS_UNSPECIFIED);
crc_ptr += 4 - size;
}
bd.flags &= ~ENET_BD_E;
@@ -1216,8 +1223,8 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
*/
const uint8_t zeros[2] = { 0 };
- dma_memory_write(&address_space_memory, buf_addr,
- zeros, sizeof(zeros));
+ dma_memory_write(&address_space_memory, buf_addr, zeros,
+ sizeof(zeros), MEMTXATTRS_UNSPECIFIED);
buf_addr += sizeof(zeros);
buf_len -= sizeof(zeros);
@@ -1226,11 +1233,12 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
shift16 = false;
}
- dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
+ dma_memory_write(&address_space_memory, buf_addr, buf, buf_len,
+ MEMTXATTRS_UNSPECIFIED);
buf += buf_len;
if (size < 4) {
dma_memory_write(&address_space_memory, buf_addr + buf_len,
- crc_ptr, 4 - size);
+ crc_ptr, 4 - size, MEMTXATTRS_UNSPECIFIED);
crc_ptr += 4 - size;
}
bd.flags &= ~ENET_BD_E;
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index a15de06a10c..877df8752a0 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -355,7 +355,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
dma_addr = s->dma_addr;
s->dma_addr = 0;
- if (dma_memory_read(s->dma_as, dma_addr, &dma, sizeof(dma))) {
+ if (dma_memory_read(s->dma_as, dma_addr,
+ &dma, sizeof(dma), MEMTXATTRS_UNSPECIFIED)) {
stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control),
FW_CFG_DMA_CTL_ERROR);
return;
@@ -417,7 +418,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
*/
if (read) {
if (dma_memory_write(s->dma_as, dma.address,
- &e->data[s->cur_offset], len)) {
+ &e->data[s->cur_offset], len,
+ MEMTXATTRS_UNSPECIFIED)) {
dma.control |= FW_CFG_DMA_CTL_ERROR;
}
}
@@ -425,7 +427,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
if (!e->allow_write ||
len != dma.length ||
dma_memory_read(s->dma_as, dma.address,
- &e->data[s->cur_offset], len)) {
+ &e->data[s->cur_offset], len,
+ MEMTXATTRS_UNSPECIFIED)) {
dma.control |= FW_CFG_DMA_CTL_ERROR;
} else if (e->write_cb) {
e->write_cb(e->callback_opaque, s->cur_offset, len);
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 82132c12ca9..3e0938e5f4e 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -714,7 +714,8 @@ static bool pnv_phb3_resolve_pe(PnvPhb3DMASpace *ds)
bus_num = pci_bus_num(ds->bus);
addr = rtt & PHB_RTT_BASE_ADDRESS_MASK;
addr += 2 * ((bus_num << 8) | ds->devfn);
- if (dma_memory_read(&address_space_memory, addr, &rte, sizeof(rte))) {
+ if (dma_memory_read(&address_space_memory, addr, &rte,
+ sizeof(rte), MEMTXATTRS_UNSPECIFIED)) {
phb3_error(ds->phb, "Failed to read RTT entry at 0x%"PRIx64, addr);
/* Set error bits ? fence ? ... */
return false;
@@ -793,7 +794,7 @@ static void pnv_phb3_translate_tve(PnvPhb3DMASpace *ds, hwaddr addr,
/* Grab the TCE address */
taddr = base | (((addr >> sh) & ((1ul << tbl_shift) - 1)) << 3);
if (dma_memory_read(&address_space_memory, taddr, &tce,
- sizeof(tce))) {
+ sizeof(tce), MEMTXATTRS_UNSPECIFIED)) {
phb3_error(phb, "Failed to read TCE at 0x%"PRIx64, taddr);
return;
}
diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c
index 099d2092a2c..8bcbc2cc4f3 100644
--- a/hw/pci-host/pnv_phb3_msi.c
+++ b/hw/pci-host/pnv_phb3_msi.c
@@ -53,7 +53,8 @@ static bool phb3_msi_read_ive(PnvPHB3 *phb, int srcno, uint64_t *out_ive)
return false;
}
- if (dma_memory_read(&address_space_memory, ive_addr, &ive, sizeof(ive))) {
+ if (dma_memory_read(&address_space_memory, ive_addr,
+ &ive, sizeof(ive), MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "Failed to read IVE at 0x%" PRIx64,
ive_addr);
return false;
@@ -73,7 +74,8 @@ static void phb3_msi_set_p(Phb3MsiState *msi, int srcno, uint8_t gen)
return;
}
- if (dma_memory_write(&address_space_memory, ive_addr + 4, &p, 1)) {
+ if (dma_memory_write(&address_space_memory, ive_addr + 4,
+ &p, 1, MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR,
"Failed to write IVE (set P) at 0x%" PRIx64, ive_addr);
}
@@ -89,7 +91,8 @@ static void phb3_msi_set_q(Phb3MsiState *msi, int srcno)
return;
}
- if (dma_memory_write(&address_space_memory, ive_addr + 5, &q, 1)) {
+ if (dma_memory_write(&address_space_memory, ive_addr + 5,
+ &q, 1, MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR,
"Failed to write IVE (set Q) at 0x%" PRIx64, ive_addr);
}
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 75ad766fe0b..4369a97b9d2 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -889,7 +889,8 @@ static bool pnv_phb4_resolve_pe(PnvPhb4DMASpace *ds)
bus_num = pci_bus_num(ds->bus);
addr = rtt & PHB_RTT_BASE_ADDRESS_MASK;
addr += 2 * ((bus_num << 8) | ds->devfn);
- if (dma_memory_read(&address_space_memory, addr, &rte, sizeof(rte))) {
+ if (dma_memory_read(&address_space_memory, addr,
+ &rte, sizeof(rte), MEMTXATTRS_UNSPECIFIED)) {
phb_error(ds->phb, "Failed to read RTT entry at 0x%"PRIx64, addr);
/* Set error bits ? fence ? ... */
return false;
@@ -958,8 +959,8 @@ static void pnv_phb4_translate_tve(PnvPhb4DMASpace *ds, hwaddr addr,
while ((lev--) >= 0) {
/* Grab the TCE address */
taddr = base | (((addr >> sh) & ((1ul << tbl_shift) - 1)) << 3);
- if (dma_memory_read(&address_space_memory, taddr, &tce,
- sizeof(tce))) {
+ if (dma_memory_read(&address_space_memory, taddr,
+ &tce, sizeof(tce), MEMTXATTRS_UNSPECIFIED)) {
phb_error(ds->phb, "Failed to read TCE at 0x%"PRIx64, taddr);
return;
}
diff --git a/hw/sd/allwinner-sdhost.c b/hw/sd/allwinner-sdhost.c
index e82afb75eb6..e98956ebb76 100644
--- a/hw/sd/allwinner-sdhost.c
+++ b/hw/sd/allwinner-sdhost.c
@@ -309,7 +309,8 @@ static uint32_t allwinner_sdhost_process_desc(AwSdHostState *s,
uint8_t buf[1024];
/* Read descriptor */
- dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc));
+ dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc),
+ MEMTXATTRS_UNSPECIFIED);
if (desc->size == 0) {
desc->size = klass->max_desc_size;
} else if (desc->size > klass->max_desc_size) {
@@ -335,23 +336,24 @@ static uint32_t allwinner_sdhost_process_desc(AwSdHostState *s,
/* Write to SD bus */
if (is_write) {
dma_memory_read(&s->dma_as,
- (desc->addr & DESC_SIZE_MASK) + num_done,
- buf, buf_bytes);
+ (desc->addr & DESC_SIZE_MASK) + num_done, buf,
+ buf_bytes, MEMTXATTRS_UNSPECIFIED);
sdbus_write_data(&s->sdbus, buf, buf_bytes);
/* Read from SD bus */
} else {
sdbus_read_data(&s->sdbus, buf, buf_bytes);
dma_memory_write(&s->dma_as,
- (desc->addr & DESC_SIZE_MASK) + num_done,
- buf, buf_bytes);
+ (desc->addr & DESC_SIZE_MASK) + num_done, buf,
+ buf_bytes, MEMTXATTRS_UNSPECIFIED);
}
num_done += buf_bytes;
}
/* Clear hold flag and flush descriptor */
desc->status &= ~DESC_STATUS_HOLD;
- dma_memory_write(&s->dma_as, desc_addr, desc, sizeof(*desc));
+ dma_memory_write(&s->dma_as, desc_addr, desc, sizeof(*desc),
+ MEMTXATTRS_UNSPECIFIED);
return num_done;
}
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 1785d7e1f79..987d76e72ae 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -604,8 +604,8 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
s->blkcnt--;
}
}
- dma_memory_write(s->dma_as, s->sdmasysad,
- &s->fifo_buffer[begin], s->data_count - begin);
+ dma_memory_write(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin],
+ s->data_count - begin, MEMTXATTRS_UNSPECIFIED);
s->sdmasysad += s->data_count - begin;
if (s->data_count == block_size) {
s->data_count = 0;
@@ -626,8 +626,8 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
s->data_count = block_size;
boundary_count -= block_size - begin;
}
- dma_memory_read(s->dma_as, s->sdmasysad,
- &s->fifo_buffer[begin], s->data_count - begin);
+ dma_memory_read(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin],
+ s->data_count - begin, MEMTXATTRS_UNSPECIFIED);
s->sdmasysad += s->data_count - begin;
if (s->data_count == block_size) {
sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
@@ -659,9 +659,11 @@ static void sdhci_sdma_transfer_single_block(SDHCIState *s)
if (s->trnmod & SDHC_TRNS_READ) {
sdbus_read_data(&s->sdbus, s->fifo_buffer, datacnt);
- dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
+ dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt,
+ MEMTXATTRS_UNSPECIFIED);
} else {
- dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
+ dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt,
+ MEMTXATTRS_UNSPECIFIED);
sdbus_write_data(&s->sdbus, s->fifo_buffer, datacnt);
}
s->blkcnt--;
@@ -683,7 +685,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
hwaddr entry_addr = (hwaddr)s->admasysaddr;
switch (SDHC_DMA_TYPE(s->hostctl1)) {
case SDHC_CTRL_ADMA2_32:
- dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2));
+ dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2),
+ MEMTXATTRS_UNSPECIFIED);
adma2 = le64_to_cpu(adma2);
/* The spec does not specify endianness of descriptor table.
* We currently assume that it is LE.
@@ -694,7 +697,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
dscr->incr = 8;
break;
case SDHC_CTRL_ADMA1_32:
- dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1));
+ dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1),
+ MEMTXATTRS_UNSPECIFIED);
adma1 = le32_to_cpu(adma1);
dscr->addr = (hwaddr)(adma1 & 0xFFFFF000);
dscr->attr = (uint8_t)extract32(adma1, 0, 7);
@@ -706,10 +710,13 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
}
break;
case SDHC_CTRL_ADMA2_64:
- dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1);
- dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2);
+ dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1,
+ MEMTXATTRS_UNSPECIFIED);
+ dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2,
+ MEMTXATTRS_UNSPECIFIED);
dscr->length = le16_to_cpu(dscr->length);
- dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8);
+ dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8,
+ MEMTXATTRS_UNSPECIFIED);
dscr->addr = le64_to_cpu(dscr->addr);
dscr->attr &= (uint8_t) ~0xC0;
dscr->incr = 12;
@@ -767,7 +774,8 @@ static void sdhci_do_adma(SDHCIState *s)
}
dma_memory_write(s->dma_as, dscr.addr,
&s->fifo_buffer[begin],
- s->data_count - begin);
+ s->data_count - begin,
+ MEMTXATTRS_UNSPECIFIED);
dscr.addr += s->data_count - begin;
if (s->data_count == block_size) {
s->data_count = 0;
@@ -791,7 +799,8 @@ static void sdhci_do_adma(SDHCIState *s)
}
dma_memory_read(s->dma_as, dscr.addr,
&s->fifo_buffer[begin],
- s->data_count - begin);
+ s->data_count - begin,
+ MEMTXATTRS_UNSPECIFIED);
dscr.addr += s->data_count - begin;
if (s->data_count == block_size) {
sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c
index 97688d21bf0..fe684f92b7a 100644
--- a/hw/usb/hcd-dwc2.c
+++ b/hw/usb/hcd-dwc2.c
@@ -261,8 +261,8 @@ static void dwc2_handle_packet(DWC2State *s, uint32_t devadr, USBDevice *dev,
if (pid != USB_TOKEN_IN) {
trace_usb_dwc2_memory_read(hcdma, tlen);
- if (dma_memory_read(&s->dma_as, hcdma,
- s->usb_buf[chan], tlen) != MEMTX_OK) {
+ if (dma_memory_read(&s->dma_as, hcdma, s->usb_buf[chan], tlen,
+ MEMTXATTRS_UNSPECIFIED) != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: dma_memory_read failed\n",
__func__);
}
@@ -317,8 +317,8 @@ babble:
if (pid == USB_TOKEN_IN) {
trace_usb_dwc2_memory_write(hcdma, actual);
- if (dma_memory_write(&s->dma_as, hcdma, s->usb_buf[chan],
- actual) != MEMTX_OK) {
+ if (dma_memory_write(&s->dma_as, hcdma, s->usb_buf[chan], actual,
+ MEMTXATTRS_UNSPECIFIED) != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: dma_memory_write failed\n",
__func__);
}
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index 2b995443fbf..03ea5279f9b 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -383,7 +383,8 @@ static inline int get_dwords(EHCIState *ehci, uint32_t addr,
}
for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
- dma_memory_read(ehci->as, addr, buf, sizeof(*buf));
+ dma_memory_read(ehci->as, addr, buf, sizeof(*buf),
+ MEMTXATTRS_UNSPECIFIED);
*buf = le32_to_cpu(*buf);
}
@@ -405,7 +406,8 @@ static inline int put_dwords(EHCIState *ehci, uint32_t addr,
for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
uint32_t tmp = cpu_to_le32(*buf);
- dma_memory_write(ehci->as, addr, &tmp, sizeof(tmp));
+ dma_memory_write(ehci->as, addr, &tmp, sizeof(tmp),
+ MEMTXATTRS_UNSPECIFIED);
}
return num;
diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
index bac1adf439c..3df6a141b5f 100644
--- a/hw/usb/hcd-ohci.c
+++ b/hw/usb/hcd-ohci.c
@@ -452,7 +452,8 @@ static inline int get_dwords(OHCIState *ohci,
addr += ohci->localmem_base;
for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
- if (dma_memory_read(ohci->as, addr, buf, sizeof(*buf))) {
+ if (dma_memory_read(ohci->as, addr,
+ buf, sizeof(*buf), MEMTXATTRS_UNSPECIFIED)) {
return -1;
}
*buf = le32_to_cpu(*buf);
@@ -471,7 +472,8 @@ static inline int put_dwords(OHCIState *ohci,
for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
uint32_t tmp = cpu_to_le32(*buf);
- if (dma_memory_write(ohci->as, addr, &tmp, sizeof(tmp))) {
+ if (dma_memory_write(ohci->as, addr,
+ &tmp, sizeof(tmp), MEMTXATTRS_UNSPECIFIED)) {
return -1;
}
}
@@ -488,7 +490,8 @@ static inline int get_words(OHCIState *ohci,
addr += ohci->localmem_base;
for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
- if (dma_memory_read(ohci->as, addr, buf, sizeof(*buf))) {
+ if (dma_memory_read(ohci->as, addr,
+ buf, sizeof(*buf), MEMTXATTRS_UNSPECIFIED)) {
return -1;
}
*buf = le16_to_cpu(*buf);
@@ -507,7 +510,8 @@ static inline int put_words(OHCIState *ohci,
for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
uint16_t tmp = cpu_to_le16(*buf);
- if (dma_memory_write(ohci->as, addr, &tmp, sizeof(tmp))) {
+ if (dma_memory_write(ohci->as, addr,
+ &tmp, sizeof(tmp), MEMTXATTRS_UNSPECIFIED)) {
return -1;
}
}
@@ -537,8 +541,8 @@ static inline int ohci_read_iso_td(OHCIState *ohci,
static inline int ohci_read_hcca(OHCIState *ohci,
dma_addr_t addr, struct ohci_hcca *hcca)
{
- return dma_memory_read(ohci->as, addr + ohci->localmem_base,
- hcca, sizeof(*hcca));
+ return dma_memory_read(ohci->as, addr + ohci->localmem_base, hcca,
+ sizeof(*hcca), MEMTXATTRS_UNSPECIFIED);
}
static inline int ohci_put_ed(OHCIState *ohci,
@@ -572,7 +576,7 @@ static inline int ohci_put_hcca(OHCIState *ohci,
return dma_memory_write(ohci->as,
addr + ohci->localmem_base + HCCA_WRITEBACK_OFFSET,
(char *)hcca + HCCA_WRITEBACK_OFFSET,
- HCCA_WRITEBACK_SIZE);
+ HCCA_WRITEBACK_SIZE, MEMTXATTRS_UNSPECIFIED);
}
/* Read/Write the contents of a TD from/to main memory. */
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 13/13] dma: Let dma_memory_map() take MemTxAttrs argument
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 12/13] dma: Let dma_memory_read/write() " Philippe Mathieu-Daudé
@ 2020-09-04 15:44 ` Philippe Mathieu-Daudé
2020-09-06 4:05 ` Richard Henderson
2020-09-07 1:18 ` Li Qiang
2020-09-07 6:55 ` [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Edgar E. Iglesias
` (3 subsequent siblings)
16 siblings, 2 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-04 15:44 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Laszlo Ersek,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
Let devices specify transaction attributes when calling
dma_memory_map().
Patch created mechanically using spatch with this script:
@@
expression E1, E2, E3, E4;
@@
- dma_memory_map(E1, E2, E3, E4)
+ dma_memory_map(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/pci/pci.h | 3 ++-
include/sysemu/dma.h | 5 +++--
dma-helpers.c | 3 ++-
hw/display/virtio-gpu.c | 8 ++++++--
hw/hyperv/vmbus.c | 8 +++++---
hw/ide/ahci.c | 9 ++++++---
hw/usb/libhw.c | 3 ++-
hw/virtio/virtio.c | 6 ++++--
8 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 0c3217e019c..a221dfb3b08 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -831,7 +831,8 @@ static inline void *pci_dma_map(PCIDevice *dev, dma_addr_t addr,
{
void *buf;
- buf = dma_memory_map(pci_get_address_space(dev), addr, plen, dir);
+ buf = dma_memory_map(pci_get_address_space(dev), addr, plen, dir,
+ MEMTXATTRS_UNSPECIFIED);
return buf;
}
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index b9cb9c8944b..bb8b0a059f5 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -203,16 +203,17 @@ MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
* @addr: address within that address space
* @len: pointer to length of buffer; updated on return
* @dir: indicates the transfer direction
+ * @attrs: memory attributes
*/
static inline void *dma_memory_map(AddressSpace *as,
dma_addr_t addr, dma_addr_t *len,
- DMADirection dir)
+ DMADirection dir, MemTxAttrs attrs)
{
hwaddr xlen = *len;
void *p;
p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE,
- MEMTXATTRS_UNSPECIFIED);
+ attrs);
*len = xlen;
return p;
}
diff --git a/dma-helpers.c b/dma-helpers.c
index 6c3b2200f16..0507a6f95b9 100644
--- a/dma-helpers.c
+++ b/dma-helpers.c
@@ -143,7 +143,8 @@ static void dma_blk_cb(void *opaque, int ret)
while (dbs->sg_cur_index < dbs->sg->nsg) {
cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
- mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir);
+ mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir,
+ MEMTXATTRS_UNSPECIFIED);
/*
* Make reads deterministic in icount mode. Windows sometimes issues
* disk read requests with overlapping SGs. It leads
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index 5f0dd7c1500..be7f5cdee46 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -648,7 +648,9 @@ int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
hwaddr len = l;
(*iov)[i].iov_len = l;
(*iov)[i].iov_base = dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
- a, &len, DMA_DIRECTION_TO_DEVICE);
+ a, &len,
+ DMA_DIRECTION_TO_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
if (addr) {
(*addr)[i] = a;
}
@@ -1049,7 +1051,9 @@ static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
hwaddr len = res->iov[i].iov_len;
res->iov[i].iov_base =
dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
- res->addrs[i], &len, DMA_DIRECTION_TO_DEVICE);
+ res->addrs[i], &len,
+ DMA_DIRECTION_TO_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
/* Clean up the half-a-mapping we just created... */
diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c
index 75af6b83dde..56621d72e5b 100644
--- a/hw/hyperv/vmbus.c
+++ b/hw/hyperv/vmbus.c
@@ -372,7 +372,8 @@ static ssize_t gpadl_iter_io(GpadlIter *iter, void *buf, uint32_t len)
maddr = (iter->gpadl->gfns[idx] << TARGET_PAGE_BITS) | off_in_page;
- iter->map = dma_memory_map(iter->as, maddr, &mlen, iter->dir);
+ iter->map = dma_memory_map(iter->as, maddr, &mlen, iter->dir,
+ MEMTXATTRS_UNSPECIFIED);
if (mlen != pgleft) {
dma_memory_unmap(iter->as, iter->map, mlen, iter->dir, 0);
iter->map = NULL;
@@ -488,7 +489,8 @@ int vmbus_map_sgl(VMBusChanReq *req, DMADirection dir, struct iovec *iov,
goto err;
}
- iov[ret_cnt].iov_base = dma_memory_map(sgl->as, a, &l, dir);
+ iov[ret_cnt].iov_base = dma_memory_map(sgl->as, a, &l, dir,
+ MEMTXATTRS_UNSPECIFIED);
if (!l) {
ret = -EFAULT;
goto err;
@@ -564,7 +566,7 @@ static vmbus_ring_buffer *ringbuf_map_hdr(VMBusRingBufCommon *ringbuf)
dma_addr_t mlen = sizeof(*rb);
rb = dma_memory_map(ringbuf->as, ringbuf->rb_addr, &mlen,
- DMA_DIRECTION_FROM_DEVICE);
+ DMA_DIRECTION_FROM_DEVICE, MEMTXATTRS_UNSPECIFIED);
if (mlen != sizeof(*rb)) {
dma_memory_unmap(ringbuf->as, rb, mlen,
DMA_DIRECTION_FROM_DEVICE, 0);
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index b696c6291a3..fe1a4e2b1a2 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -249,7 +249,8 @@ static void map_page(AddressSpace *as, uint8_t **ptr, uint64_t addr,
dma_memory_unmap(as, *ptr, len, DMA_DIRECTION_FROM_DEVICE, len);
}
- *ptr = dma_memory_map(as, addr, &len, DMA_DIRECTION_FROM_DEVICE);
+ *ptr = dma_memory_map(as, addr, &len, DMA_DIRECTION_FROM_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
if (len < wanted) {
dma_memory_unmap(as, *ptr, len, DMA_DIRECTION_FROM_DEVICE, len);
*ptr = NULL;
@@ -938,7 +939,8 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist,
/* map PRDT */
if (!(prdt = dma_memory_map(ad->hba->as, prdt_addr, &prdt_len,
- DMA_DIRECTION_TO_DEVICE))){
+ DMA_DIRECTION_TO_DEVICE,
+ MEMTXATTRS_UNSPECIFIED))) {
trace_ahci_populate_sglist_no_map(ad->hba, ad->port_no);
return -1;
}
@@ -1299,7 +1301,8 @@ static int handle_cmd(AHCIState *s, int port, uint8_t slot)
tbl_addr = le64_to_cpu(cmd->tbl_addr);
cmd_len = 0x80;
cmd_fis = dma_memory_map(s->as, tbl_addr, &cmd_len,
- DMA_DIRECTION_FROM_DEVICE);
+ DMA_DIRECTION_FROM_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
if (!cmd_fis) {
trace_handle_cmd_badfis(s, port);
return -1;
diff --git a/hw/usb/libhw.c b/hw/usb/libhw.c
index 9c33a1640f7..f350eae443d 100644
--- a/hw/usb/libhw.c
+++ b/hw/usb/libhw.c
@@ -36,7 +36,8 @@ int usb_packet_map(USBPacket *p, QEMUSGList *sgl)
while (len) {
dma_addr_t xlen = len;
- mem = dma_memory_map(sgl->as, base, &xlen, dir);
+ mem = dma_memory_map(sgl->as, base, &xlen, dir,
+ MEMTXATTRS_UNSPECIFIED);
if (!mem) {
goto err;
}
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index e9830252176..c951131ba39 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -1320,7 +1320,8 @@ static bool virtqueue_map_desc(VirtIODevice *vdev, unsigned int *p_num_sg,
iov[num_sg].iov_base = dma_memory_map(vdev->dma_as, pa, &len,
is_write ?
DMA_DIRECTION_FROM_DEVICE :
- DMA_DIRECTION_TO_DEVICE);
+ DMA_DIRECTION_TO_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
if (!iov[num_sg].iov_base) {
virtio_error(vdev, "virtio: bogus descriptor or out of resources");
goto out;
@@ -1369,7 +1370,8 @@ static void virtqueue_map_iovec(VirtIODevice *vdev, struct iovec *sg,
sg[i].iov_base = dma_memory_map(vdev->dma_as,
addr[i], &len, is_write ?
DMA_DIRECTION_FROM_DEVICE :
- DMA_DIRECTION_TO_DEVICE);
+ DMA_DIRECTION_TO_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
if (!sg[i].iov_base) {
error_report("virtio: error trying to map MMIO memory");
exit(1);
--
2.26.2
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 01/13] pci: pass along the return value of dma_memory_rw
2020-09-04 15:44 ` [PATCH 01/13] pci: pass along the return value of dma_memory_rw Philippe Mathieu-Daudé
@ 2020-09-06 3:45 ` Richard Henderson
2020-09-07 1:00 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 3:45 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, Keith Busch, John Snow,
David Gibson, Andrew Jeffery, Klaus Jensen,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> From: Klaus Jensen <k.jensen@samsung.com>
>
> Some might actually care about the return value of dma_memory_rw. So
> let us pass it along instead of ignoring it.
>
> There are no existing users of the return value, so this patch should be
> safe.
>
> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Acked-by: Keith Busch <kbusch@kernel.org>
> Message-Id: <20191011070141.188713-2-its@irrelevant.dk>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/hw/pci/pci.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 02/13] docs/devel/loads-stores: Add regexp for DMA functions
2020-09-04 15:44 ` [PATCH 02/13] docs/devel/loads-stores: Add regexp for DMA functions Philippe Mathieu-Daudé
@ 2020-09-06 3:45 ` Richard Henderson
0 siblings, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 3:45 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> docs/devel/loads-stores.rst | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 03/13] dma: Document address_space_map/address_space_unmap() prototypes
2020-09-04 15:44 ` [PATCH 03/13] dma: Document address_space_map/address_space_unmap() prototypes Philippe Mathieu-Daudé
@ 2020-09-06 3:47 ` Richard Henderson
2020-09-07 6:55 ` Edgar E. Iglesias
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 3:47 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> Add documentation based on address_space_map / address_space_unmap.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/sysemu/dma.h | 30 +++++++++++++++++++++++++++++-
> 1 file changed, 29 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 04/13] dma: Let dma_memory_set() propagate MemTxResult
2020-09-04 15:44 ` [PATCH 04/13] dma: Let dma_memory_set() propagate MemTxResult Philippe Mathieu-Daudé
@ 2020-09-06 3:55 ` Richard Henderson
2020-09-07 1:05 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 3:55 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> address_space_write() returns a MemTxResult type.
> Do not discard it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/sysemu/dma.h | 15 ++++++++++++++-
> dma-helpers.c | 7 ++++---
> 2 files changed, 18 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 05/13] dma: Let dma_memory_rw() propagate MemTxResult
2020-09-04 15:44 ` [PATCH 05/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
@ 2020-09-06 3:57 ` Richard Henderson
2020-09-07 1:06 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 3:57 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> address_space_rw() returns a MemTxResult type.
> Do not discard it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/sysemu/dma.h | 30 ++++++++++++++++++++++--------
> 1 file changed, 22 insertions(+), 8 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 06/13] dma: Let dma_memory_read() propagate MemTxResult
2020-09-04 15:44 ` [PATCH 06/13] dma: Let dma_memory_read() " Philippe Mathieu-Daudé
@ 2020-09-06 3:58 ` Richard Henderson
2020-09-07 1:06 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 3:58 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> dma_memory_rw_relaxed() returns a MemTxResult type.
> Do not discard it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/sysemu/dma.h | 21 +++++++++++++++++----
> 1 file changed, 17 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 07/13] dma: Let dma_memory_write() propagate MemTxResult
2020-09-04 15:44 ` [PATCH 07/13] dma: Let dma_memory_write() " Philippe Mathieu-Daudé
@ 2020-09-06 3:58 ` Richard Henderson
2020-09-07 1:07 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 3:58 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> dma_memory_rw_relaxed() returns a MemTxResult type.
> Do not discard it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/sysemu/dma.h | 22 ++++++++++++++++++----
> 1 file changed, 18 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 08/13] dma: Let dma_memory_valid() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 08/13] dma: Let dma_memory_valid() take MemTxAttrs argument Philippe Mathieu-Daudé
@ 2020-09-06 3:59 ` Richard Henderson
2020-09-07 1:11 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 3:59 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> Let devices specify transaction attributes when calling
> dma_memory_valid().
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/hw/ppc/spapr_vio.h | 2 +-
> include/sysemu/dma.h | 4 ++--
> 2 files changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 09/13] dma: Let dma_memory_set() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 09/13] dma: Let dma_memory_set() " Philippe Mathieu-Daudé
@ 2020-09-06 4:00 ` Richard Henderson
2020-09-07 1:13 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 4:00 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> Let devices specify transaction attributes when calling
> dma_memory_set().
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/hw/ppc/spapr_vio.h | 3 ++-
> include/sysemu/dma.h | 3 ++-
> dma-helpers.c | 5 ++---
> hw/nvram/fw_cfg.c | 3 ++-
> 4 files changed, 8 insertions(+), 6 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 10/13] dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 10/13] dma: Let dma_memory_rw_relaxed() " Philippe Mathieu-Daudé
@ 2020-09-06 4:01 ` Richard Henderson
2020-09-07 1:14 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 4:01 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> We will add the MemTxAttrs argument to dma_memory_rw() in
> the next commit. Since dma_memory_rw_relaxed() is only used
> by dma_memory_rw(), modify it first in a separate commit to
> keep the next commit easier to review.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/sysemu/dma.h | 15 ++++++++++-----
> 1 file changed, 10 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 11/13] dma: Let dma_memory_rw() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 11/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
@ 2020-09-06 4:02 ` Richard Henderson
2020-09-07 1:16 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 4:02 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> Let devices specify transaction attributes when calling
> dma_memory_rw().
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/hw/pci/pci.h | 3 ++-
> include/sysemu/dma.h | 11 ++++++-----
> dma-helpers.c | 3 ++-
> hw/intc/spapr_xive.c | 3 ++-
> hw/usb/hcd-ohci.c | 10 ++++++----
> 5 files changed, 18 insertions(+), 12 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 12/13] dma: Let dma_memory_read/write() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 12/13] dma: Let dma_memory_read/write() " Philippe Mathieu-Daudé
@ 2020-09-06 4:04 ` Richard Henderson
2020-09-07 1:17 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 4:04 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> Let devices specify transaction attributes when calling
> dma_memory_read() or dma_memory_write().
>
> Patch created mechanically using spatch with this script:
>
> @@
> expression E1, E2, E3, E4;
> @@
> (
> - dma_memory_read(E1, E2, E3, E4)
> + dma_memory_read(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
> |
> - dma_memory_write(E1, E2, E3, E4)
> + dma_memory_write(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
> )
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 13/13] dma: Let dma_memory_map() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 13/13] dma: Let dma_memory_map() " Philippe Mathieu-Daudé
@ 2020-09-06 4:05 ` Richard Henderson
2020-09-07 1:18 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Richard Henderson @ 2020-09-06 4:05 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, Richard Henderson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, David Gibson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 8:44 AM, Philippe Mathieu-Daudé wrote:
> Let devices specify transaction attributes when calling
> dma_memory_map().
>
> Patch created mechanically using spatch with this script:
>
> @@
> expression E1, E2, E3, E4;
> @@
> - dma_memory_map(E1, E2, E3, E4)
> + dma_memory_map(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 01/13] pci: pass along the return value of dma_memory_rw
2020-09-04 15:44 ` [PATCH 01/13] pci: pass along the return value of dma_memory_rw Philippe Mathieu-Daudé
2020-09-06 3:45 ` Richard Henderson
@ 2020-09-07 1:00 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:00 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, Keith Busch, John Snow, David Gibson,
Andrew Jeffery, Klaus Jensen, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:47写道：
>
> From: Klaus Jensen <k.jensen@samsung.com>
>
> Some might actually care about the return value of dma_memory_rw. So
> let us pass it along instead of ignoring it.
>
> There are no existing users of the return value, so this patch should be
> safe.
>
> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Acked-by: Keith Busch <kbusch@kernel.org>
> Message-Id: <20191011070141.188713-2-its@irrelevant.dk>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/hw/pci/pci.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 4ca7258b5b7..896cef9ad47 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -788,8 +788,7 @@ static inline AddressSpace *pci_get_address_space(PCIDevice *dev)
> static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
> void *buf, dma_addr_t len, DMADirection dir)
> {
> - dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
> - return 0;
> + return dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
> }
>
> static inline int pci_dma_read(PCIDevice *dev, dma_addr_t addr,
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 04/13] dma: Let dma_memory_set() propagate MemTxResult
2020-09-04 15:44 ` [PATCH 04/13] dma: Let dma_memory_set() propagate MemTxResult Philippe Mathieu-Daudé
2020-09-06 3:55 ` Richard Henderson
@ 2020-09-07 1:05 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:05 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:47写道：
>
> address_space_write() returns a MemTxResult type.
> Do not discard it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/sysemu/dma.h | 15 ++++++++++++++-
> dma-helpers.c | 7 ++++---
> 2 files changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index 19bc9ad1b69..ad8a3f82f47 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -123,7 +123,20 @@ static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
> DMA_DIRECTION_FROM_DEVICE);
> }
>
> -int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
> +/**
> + * dma_memory_set: Fill memory with a constant byte from DMA controller.
> + *
> + * Return a MemTxResult indicating whether the operation succeeded
> + * or failed (eg unassigned memory, device rejected the transaction,
> + * IOMMU fault).
> + *
> + * @as: #AddressSpace to be accessed
> + * @addr: address within that address space
> + * @c: constant byte to fill the memory
> + * @len: the number of bytes to fill with the constant byte
> + */
> +MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
> + uint8_t c, dma_addr_t len);
>
> /**
> * address_space_map: Map a physical memory region into a DMA controller
> diff --git a/dma-helpers.c b/dma-helpers.c
> index 41ef24a63b6..4a9e37d6d06 100644
> --- a/dma-helpers.c
> +++ b/dma-helpers.c
> @@ -1,7 +1,7 @@
> /*
> * DMA helper functions
> *
> - * Copyright (c) 2009 Red Hat
> + * Copyright (c) 2009,2020 Red Hat
> *
> * This work is licensed under the terms of the GNU General Public License
> * (GNU GPL), version 2 or later.
> @@ -18,14 +18,15 @@
>
> /* #define DEBUG_IOMMU */
>
> -int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
> +MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
> + uint8_t c, dma_addr_t len)
> {
> dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
>
> #define FILLBUF_SIZE 512
> uint8_t fillbuf[FILLBUF_SIZE];
> int l;
> - bool error = false;
> + MemTxResult error = MEMTX_OK;
>
> memset(fillbuf, c, FILLBUF_SIZE);
> while (len > 0) {
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 05/13] dma: Let dma_memory_rw() propagate MemTxResult
2020-09-04 15:44 ` [PATCH 05/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
2020-09-06 3:57 ` Richard Henderson
@ 2020-09-07 1:06 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:06 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:46写道：
>
> address_space_rw() returns a MemTxResult type.
> Do not discard it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/sysemu/dma.h | 30 ++++++++++++++++++++++--------
> 1 file changed, 22 insertions(+), 8 deletions(-)
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index ad8a3f82f47..661d7d0ca88 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -80,12 +80,13 @@ static inline bool dma_memory_valid(AddressSpace *as,
> MEMTXATTRS_UNSPECIFIED);
> }
>
> -static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr,
> - void *buf, dma_addr_t len,
> - DMADirection dir)
> +static inline MemTxResult dma_memory_rw_relaxed(AddressSpace *as,
> + dma_addr_t addr,
> + void *buf, dma_addr_t len,
> + DMADirection dir)
> {
> - return (bool)address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
> - buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
> + return address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
> + buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
> }
>
> static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
> @@ -101,9 +102,22 @@ static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
> DMA_DIRECTION_FROM_DEVICE);
> }
>
> -static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr,
> - void *buf, dma_addr_t len,
> - DMADirection dir)
> +/**
> + * dma_memory_rw: Read from or write to an address space from DMA controller.
> + *
> + * Return a MemTxResult indicating whether the operation succeeded
> + * or failed (eg unassigned memory, device rejected the transaction,
> + * IOMMU fault).
> + *
> + * @as: #AddressSpace to be accessed
> + * @addr: address within that address space
> + * @buf: buffer with the data transferred
> + * @len: the number of bytes to read or write
> + * @dir: indicates the transfer direction
> + */
> +static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
> + void *buf, dma_addr_t len,
> + DMADirection dir)
> {
> dma_barrier(as, dir);
>
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 06/13] dma: Let dma_memory_read() propagate MemTxResult
2020-09-04 15:44 ` [PATCH 06/13] dma: Let dma_memory_read() " Philippe Mathieu-Daudé
2020-09-06 3:58 ` Richard Henderson
@ 2020-09-07 1:06 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:06 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:50写道：
>
> dma_memory_rw_relaxed() returns a MemTxResult type.
> Do not discard it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/sysemu/dma.h | 21 +++++++++++++++++----
> 1 file changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index 661d7d0ca88..2961a96ad67 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -89,8 +89,9 @@ static inline MemTxResult dma_memory_rw_relaxed(AddressSpace *as,
> buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
> }
>
> -static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
> - void *buf, dma_addr_t len)
> +static inline MemTxResult dma_memory_read_relaxed(AddressSpace *as,
> + dma_addr_t addr,
> + void *buf, dma_addr_t len)
> {
> return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
> }
> @@ -124,8 +125,20 @@ static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
> return dma_memory_rw_relaxed(as, addr, buf, len, dir);
> }
>
> -static inline int dma_memory_read(AddressSpace *as, dma_addr_t addr,
> - void *buf, dma_addr_t len)
> +/**
> + * dma_memory_read: Read from an address space from DMA controller.
> + *
> + * Return a MemTxResult indicating whether the operation succeeded
> + * or failed (eg unassigned memory, device rejected the transaction,
> + * IOMMU fault). Called within RCU critical section.
> + *
> + * @as: #AddressSpace to be accessed
> + * @addr: address within that address space
> + * @buf: buffer with the data transferred
> + * @len: length of the data transferred
> + */
> +static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
> + void *buf, dma_addr_t len)
> {
> return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
> }
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 07/13] dma: Let dma_memory_write() propagate MemTxResult
2020-09-04 15:44 ` [PATCH 07/13] dma: Let dma_memory_write() " Philippe Mathieu-Daudé
2020-09-06 3:58 ` Richard Henderson
@ 2020-09-07 1:07 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:07 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:46写道：
>
> dma_memory_rw_relaxed() returns a MemTxResult type.
> Do not discard it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/sysemu/dma.h | 22 ++++++++++++++++++----
> 1 file changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index 2961a96ad67..f4ade067a46 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -96,8 +96,10 @@ static inline MemTxResult dma_memory_read_relaxed(AddressSpace *as,
> return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
> }
>
> -static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
> - const void *buf, dma_addr_t len)
> +static inline MemTxResult dma_memory_write_relaxed(AddressSpace *as,
> + dma_addr_t addr,
> + const void *buf,
> + dma_addr_t len)
> {
> return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
> DMA_DIRECTION_FROM_DEVICE);
> @@ -143,8 +145,20 @@ static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
> return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
> }
>
> -static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
> - const void *buf, dma_addr_t len)
> +/**
> + * address_space_write: Write to address space from DMA controller.
> + *
> + * Return a MemTxResult indicating whether the operation succeeded
> + * or failed (eg unassigned memory, device rejected the transaction,
> + * IOMMU fault).
> + *
> + * @as: #AddressSpace to be accessed
> + * @addr: address within that address space
> + * @buf: buffer with the data transferred
> + * @len: the number of bytes to write
> + */
> +static inline MemTxResult dma_memory_write(AddressSpace *as, dma_addr_t addr,
> + const void *buf, dma_addr_t len)
> {
> return dma_memory_rw(as, addr, (void *)buf, len,
> DMA_DIRECTION_FROM_DEVICE);
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 08/13] dma: Let dma_memory_valid() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 08/13] dma: Let dma_memory_valid() take MemTxAttrs argument Philippe Mathieu-Daudé
2020-09-06 3:59 ` Richard Henderson
@ 2020-09-07 1:11 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:11 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:48写道：
>
> Let devices specify transaction attributes when calling
> dma_memory_valid().
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/hw/ppc/spapr_vio.h | 2 +-
> include/sysemu/dma.h | 4 ++--
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
> index bed7df60e35..f134f6cf574 100644
> --- a/include/hw/ppc/spapr_vio.h
> +++ b/include/hw/ppc/spapr_vio.h
> @@ -96,7 +96,7 @@ static inline void spapr_vio_irq_pulse(SpaprVioDevice *dev)
> static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr,
> uint32_t size, DMADirection dir)
> {
> - return dma_memory_valid(&dev->as, taddr, size, dir);
> + return dma_memory_valid(&dev->as, taddr, size, dir, MEMTXATTRS_UNSPECIFIED);
> }
>
> static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr,
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index f4ade067a46..b322aa5947b 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -73,11 +73,11 @@ static inline void dma_barrier(AddressSpace *as, DMADirection dir)
> * dma_memory_{read,write}() and check for errors */
> static inline bool dma_memory_valid(AddressSpace *as,
> dma_addr_t addr, dma_addr_t len,
> - DMADirection dir)
> + DMADirection dir, MemTxAttrs attrs)
> {
> return address_space_access_valid(as, addr, len,
> dir == DMA_DIRECTION_FROM_DEVICE,
> - MEMTXATTRS_UNSPECIFIED);
> + attrs);
> }
>
> static inline MemTxResult dma_memory_rw_relaxed(AddressSpace *as,
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 09/13] dma: Let dma_memory_set() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 09/13] dma: Let dma_memory_set() " Philippe Mathieu-Daudé
2020-09-06 4:00 ` Richard Henderson
@ 2020-09-07 1:13 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:13 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:49写道：
>
> Let devices specify transaction attributes when calling
> dma_memory_set().
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/hw/ppc/spapr_vio.h | 3 ++-
> include/sysemu/dma.h | 3 ++-
> dma-helpers.c | 5 ++---
> hw/nvram/fw_cfg.c | 3 ++-
> 4 files changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
> index f134f6cf574..6e5c0840248 100644
> --- a/include/hw/ppc/spapr_vio.h
> +++ b/include/hw/ppc/spapr_vio.h
> @@ -116,7 +116,8 @@ static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr,
> static inline int spapr_vio_dma_set(SpaprVioDevice *dev, uint64_t taddr,
> uint8_t c, uint32_t size)
> {
> - return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
> + return (dma_memory_set(&dev->as, taddr,
> + c, size, MEMTXATTRS_UNSPECIFIED) != 0) ?
> H_DEST_PARM : H_SUCCESS;
> }
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index b322aa5947b..d0381f9ae9b 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -175,9 +175,10 @@ static inline MemTxResult dma_memory_write(AddressSpace *as, dma_addr_t addr,
> * @addr: address within that address space
> * @c: constant byte to fill the memory
> * @len: the number of bytes to fill with the constant byte
> + * @attrs: memory transaction attributes
> */
> MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
> - uint8_t c, dma_addr_t len);
> + uint8_t c, dma_addr_t len, MemTxAttrs attrs);
>
> /**
> * address_space_map: Map a physical memory region into a DMA controller
> diff --git a/dma-helpers.c b/dma-helpers.c
> index 4a9e37d6d06..6a9735386dc 100644
> --- a/dma-helpers.c
> +++ b/dma-helpers.c
> @@ -19,7 +19,7 @@
> /* #define DEBUG_IOMMU */
>
> MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
> - uint8_t c, dma_addr_t len)
> + uint8_t c, dma_addr_t len, MemTxAttrs attrs)
> {
> dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
>
> @@ -31,8 +31,7 @@ MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
> memset(fillbuf, c, FILLBUF_SIZE);
> while (len > 0) {
> l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
> - error |= address_space_write(as, addr, MEMTXATTRS_UNSPECIFIED,
> - fillbuf, l);
> + error |= address_space_write(as, addr, attrs, fillbuf, l);
> len -= l;
> addr += l;
> }
> diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
> index f3a4728288e..a15de06a10c 100644
> --- a/hw/nvram/fw_cfg.c
> +++ b/hw/nvram/fw_cfg.c
> @@ -397,7 +397,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
> * tested before.
> */
> if (read) {
> - if (dma_memory_set(s->dma_as, dma.address, 0, len)) {
> + if (dma_memory_set(s->dma_as, dma.address, 0, len,
> + MEMTXATTRS_UNSPECIFIED)) {
> dma.control |= FW_CFG_DMA_CTL_ERROR;
> }
> }
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 10/13] dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 10/13] dma: Let dma_memory_rw_relaxed() " Philippe Mathieu-Daudé
2020-09-06 4:01 ` Richard Henderson
@ 2020-09-07 1:14 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:14 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:53写道：
>
> We will add the MemTxAttrs argument to dma_memory_rw() in
> the next commit. Since dma_memory_rw_relaxed() is only used
> by dma_memory_rw(), modify it first in a separate commit to
> keep the next commit easier to review.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/sysemu/dma.h | 15 ++++++++++-----
> 1 file changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index d0381f9ae9b..59331ec0bd3 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -83,9 +83,10 @@ static inline bool dma_memory_valid(AddressSpace *as,
> static inline MemTxResult dma_memory_rw_relaxed(AddressSpace *as,
> dma_addr_t addr,
> void *buf, dma_addr_t len,
> - DMADirection dir)
> + DMADirection dir,
> + MemTxAttrs attrs)
> {
> - return address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
> + return address_space_rw(as, addr, attrs,
> buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
> }
>
> @@ -93,7 +94,9 @@ static inline MemTxResult dma_memory_read_relaxed(AddressSpace *as,
> dma_addr_t addr,
> void *buf, dma_addr_t len)
> {
> - return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
> + return dma_memory_rw_relaxed(as, addr, buf, len,
> + DMA_DIRECTION_TO_DEVICE,
> + MEMTXATTRS_UNSPECIFIED);
> }
>
> static inline MemTxResult dma_memory_write_relaxed(AddressSpace *as,
> @@ -102,7 +105,8 @@ static inline MemTxResult dma_memory_write_relaxed(AddressSpace *as,
> dma_addr_t len)
> {
> return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
> - DMA_DIRECTION_FROM_DEVICE);
> + DMA_DIRECTION_FROM_DEVICE,
> + MEMTXATTRS_UNSPECIFIED);
> }
>
> /**
> @@ -124,7 +128,8 @@ static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
> {
> dma_barrier(as, dir);
>
> - return dma_memory_rw_relaxed(as, addr, buf, len, dir);
> + return dma_memory_rw_relaxed(as, addr, buf, len, dir,
> + MEMTXATTRS_UNSPECIFIED);
> }
>
> /**
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 11/13] dma: Let dma_memory_rw() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 11/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
2020-09-06 4:02 ` Richard Henderson
@ 2020-09-07 1:16 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:16 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:53写道：
>
> Let devices specify transaction attributes when calling
> dma_memory_rw().
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/hw/pci/pci.h | 3 ++-
> include/sysemu/dma.h | 11 ++++++-----
> dma-helpers.c | 3 ++-
> hw/intc/spapr_xive.c | 3 ++-
> hw/usb/hcd-ohci.c | 10 ++++++----
> 5 files changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 896cef9ad47..0c3217e019c 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -788,7 +788,8 @@ static inline AddressSpace *pci_get_address_space(PCIDevice *dev)
> static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
> void *buf, dma_addr_t len, DMADirection dir)
> {
> - return dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
> + return dma_memory_rw(pci_get_address_space(dev), addr, buf, len,
> + dir, MEMTXATTRS_UNSPECIFIED);
> }
>
> static inline int pci_dma_read(PCIDevice *dev, dma_addr_t addr,
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index 59331ec0bd3..0695d430119 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -121,15 +121,15 @@ static inline MemTxResult dma_memory_write_relaxed(AddressSpace *as,
> * @buf: buffer with the data transferred
> * @len: the number of bytes to read or write
> * @dir: indicates the transfer direction
> + * @attrs: memory transaction attributes
> */
> static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
> void *buf, dma_addr_t len,
> - DMADirection dir)
> + DMADirection dir, MemTxAttrs attrs)
> {
> dma_barrier(as, dir);
>
> - return dma_memory_rw_relaxed(as, addr, buf, len, dir,
> - MEMTXATTRS_UNSPECIFIED);
> + return dma_memory_rw_relaxed(as, addr, buf, len, dir, attrs);
> }
>
> /**
> @@ -147,7 +147,8 @@ static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
> static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
> void *buf, dma_addr_t len)
> {
> - return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
> + return dma_memory_rw(as, addr, buf, len,
> + DMA_DIRECTION_TO_DEVICE, MEMTXATTRS_UNSPECIFIED);
> }
>
> /**
> @@ -166,7 +167,7 @@ static inline MemTxResult dma_memory_write(AddressSpace *as, dma_addr_t addr,
> const void *buf, dma_addr_t len)
> {
> return dma_memory_rw(as, addr, (void *)buf, len,
> - DMA_DIRECTION_FROM_DEVICE);
> + DMA_DIRECTION_FROM_DEVICE, MEMTXATTRS_UNSPECIFIED);
> }
>
> /**
> diff --git a/dma-helpers.c b/dma-helpers.c
> index 6a9735386dc..6c3b2200f16 100644
> --- a/dma-helpers.c
> +++ b/dma-helpers.c
> @@ -305,7 +305,8 @@ static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg,
> while (len > 0) {
> ScatterGatherEntry entry = sg->sg[sg_cur_index++];
> int32_t xfer = MIN(len, entry.len);
> - dma_memory_rw(sg->as, entry.base, ptr, xfer, dir);
> + dma_memory_rw(sg->as, entry.base, ptr, xfer, dir,
> + MEMTXATTRS_UNSPECIFIED);
> ptr += xfer;
> len -= xfer;
> resid -= xfer;
> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
> index 4bd0d606ba1..dbf73a8bf47 100644
> --- a/hw/intc/spapr_xive.c
> +++ b/hw/intc/spapr_xive.c
> @@ -1666,7 +1666,8 @@ static target_ulong h_int_esb(PowerPCCPU *cpu,
> mmio_addr = xive->vc_base + xive_source_esb_mgmt(xsrc, lisn) + offset;
>
> if (dma_memory_rw(&address_space_memory, mmio_addr, &data, 8,
> - (flags & SPAPR_XIVE_ESB_STORE))) {
> + (flags & SPAPR_XIVE_ESB_STORE),
> + MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR, "XIVE: failed to access ESB @0x%"
> HWADDR_PRIx "\n", mmio_addr);
> return H_HARDWARE;
> diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
> index 1e6e85e86a8..bac1adf439c 100644
> --- a/hw/usb/hcd-ohci.c
> +++ b/hw/usb/hcd-ohci.c
> @@ -586,7 +586,8 @@ static int ohci_copy_td(OHCIState *ohci, struct ohci_td *td,
> if (n > len)
> n = len;
>
> - if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir)) {
> + if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
> + n, dir, MEMTXATTRS_UNSPECIFIED)) {
> return -1;
> }
> if (n == len) {
> @@ -595,7 +596,7 @@ static int ohci_copy_td(OHCIState *ohci, struct ohci_td *td,
> ptr = td->be & ~0xfffu;
> buf += n;
> if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
> - len - n, dir)) {
> + len - n, dir, MEMTXATTRS_UNSPECIFIED)) {
> return -1;
> }
> return 0;
> @@ -613,7 +614,8 @@ static int ohci_copy_iso_td(OHCIState *ohci,
> if (n > len)
> n = len;
>
> - if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir)) {
> + if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
> + n, dir, MEMTXATTRS_UNSPECIFIED)) {
> return -1;
> }
> if (n == len) {
> @@ -622,7 +624,7 @@ static int ohci_copy_iso_td(OHCIState *ohci,
> ptr = end_addr & ~0xfffu;
> buf += n;
> if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
> - len - n, dir)) {
> + len - n, dir, MEMTXATTRS_UNSPECIFIED)) {
> return -1;
> }
> return 0;
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 12/13] dma: Let dma_memory_read/write() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 12/13] dma: Let dma_memory_read/write() " Philippe Mathieu-Daudé
2020-09-06 4:04 ` Richard Henderson
@ 2020-09-07 1:17 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:17 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:52写道：
>
> Let devices specify transaction attributes when calling
> dma_memory_read() or dma_memory_write().
>
> Patch created mechanically using spatch with this script:
>
> @@
> expression E1, E2, E3, E4;
> @@
> (
> - dma_memory_read(E1, E2, E3, E4)
> + dma_memory_read(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
> |
> - dma_memory_write(E1, E2, E3, E4)
> + dma_memory_write(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
> )
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/hw/ppc/spapr_vio.h | 6 ++++--
> include/sysemu/dma.h | 20 ++++++++++++--------
> hw/arm/musicpal.c | 13 +++++++------
> hw/arm/smmu-common.c | 3 ++-
> hw/arm/smmuv3.c | 14 +++++++++-----
> hw/core/generic-loader.c | 3 ++-
> hw/dma/pl330.c | 12 ++++++++----
> hw/dma/sparc32_dma.c | 16 ++++++++++------
> hw/dma/xlnx-zynq-devcfg.c | 6 ++++--
> hw/dma/xlnx_dpdma.c | 10 ++++++----
> hw/i386/amd_iommu.c | 16 +++++++++-------
> hw/i386/intel_iommu.c | 28 +++++++++++++++++-----------
> hw/ide/macio.c | 2 +-
> hw/intc/xive.c | 7 ++++---
> hw/misc/bcm2835_property.c | 3 ++-
> hw/misc/macio/mac_dbdma.c | 10 ++++++----
> hw/net/allwinner-sun8i-emac.c | 21 ++++++++++++++-------
> hw/net/ftgmac100.c | 25 ++++++++++++++++---------
> hw/net/imx_fec.c | 32 ++++++++++++++++++++------------
> hw/nvram/fw_cfg.c | 9 ++++++---
> hw/pci-host/pnv_phb3.c | 5 +++--
> hw/pci-host/pnv_phb3_msi.c | 9 ++++++---
> hw/pci-host/pnv_phb4.c | 7 ++++---
> hw/sd/allwinner-sdhost.c | 14 ++++++++------
> hw/sd/sdhci.c | 35 ++++++++++++++++++++++-------------
> hw/usb/hcd-dwc2.c | 8 ++++----
> hw/usb/hcd-ehci.c | 6 ++++--
> hw/usb/hcd-ohci.c | 18 +++++++++++-------
> 28 files changed, 221 insertions(+), 137 deletions(-)
>
> diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
> index 6e5c0840248..8168f4fc5a5 100644
> --- a/include/hw/ppc/spapr_vio.h
> +++ b/include/hw/ppc/spapr_vio.h
> @@ -102,14 +102,16 @@ static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr,
> static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr,
> void *buf, uint32_t size)
> {
> - return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
> + return (dma_memory_read(&dev->as, taddr,
> + buf, size, MEMTXATTRS_UNSPECIFIED) != 0) ?
> H_DEST_PARM : H_SUCCESS;
> }
>
> static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr,
> const void *buf, uint32_t size)
> {
> - return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
> + return (dma_memory_write(&dev->as, taddr,
> + buf, size, MEMTXATTRS_UNSPECIFIED) != 0) ?
> H_DEST_PARM : H_SUCCESS;
> }
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index 0695d430119..b9cb9c8944b 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -143,12 +143,14 @@ static inline MemTxResult dma_memory_rw(AddressSpace *as, dma_addr_t addr,
> * @addr: address within that address space
> * @buf: buffer with the data transferred
> * @len: length of the data transferred
> + * @attrs: memory transaction attributes
> */
> static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
> - void *buf, dma_addr_t len)
> + void *buf, dma_addr_t len,
> + MemTxAttrs attrs)
> {
> return dma_memory_rw(as, addr, buf, len,
> - DMA_DIRECTION_TO_DEVICE, MEMTXATTRS_UNSPECIFIED);
> + DMA_DIRECTION_TO_DEVICE, attrs);
> }
>
> /**
> @@ -162,12 +164,14 @@ static inline MemTxResult dma_memory_read(AddressSpace *as, dma_addr_t addr,
> * @addr: address within that address space
> * @buf: buffer with the data transferred
> * @len: the number of bytes to write
> + * @attrs: memory transaction attributes
> */
> static inline MemTxResult dma_memory_write(AddressSpace *as, dma_addr_t addr,
> - const void *buf, dma_addr_t len)
> + const void *buf, dma_addr_t len,
> + MemTxAttrs attrs)
> {
> return dma_memory_rw(as, addr, (void *)buf, len,
> - DMA_DIRECTION_FROM_DEVICE, MEMTXATTRS_UNSPECIFIED);
> + DMA_DIRECTION_FROM_DEVICE, attrs);
> }
>
> /**
> @@ -240,7 +244,7 @@ static inline void dma_memory_unmap(AddressSpace *as,
> dma_addr_t addr) \
> { \
> uint##_bits##_t val; \
> - dma_memory_read(as, addr, &val, (_bits) / 8); \
> + dma_memory_read(as, addr, &val, (_bits) / 8, MEMTXATTRS_UNSPECIFIED); \
> return _end##_bits##_to_cpu(val); \
> } \
> static inline void st##_sname##_##_end##_dma(AddressSpace *as, \
> @@ -248,20 +252,20 @@ static inline void dma_memory_unmap(AddressSpace *as,
> uint##_bits##_t val) \
> { \
> val = cpu_to_##_end##_bits(val); \
> - dma_memory_write(as, addr, &val, (_bits) / 8); \
> + dma_memory_write(as, addr, &val, (_bits) / 8, MEMTXATTRS_UNSPECIFIED); \
> }
>
> static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr)
> {
> uint8_t val;
>
> - dma_memory_read(as, addr, &val, 1);
> + dma_memory_read(as, addr, &val, 1, MEMTXATTRS_UNSPECIFIED);
> return val;
> }
>
> static inline void stb_dma(AddressSpace *as, dma_addr_t addr, uint8_t val)
> {
> - dma_memory_write(as, addr, &val, 1);
> + dma_memory_write(as, addr, &val, 1, MEMTXATTRS_UNSPECIFIED);
> }
>
> DEFINE_LDST_DMA(uw, w, 16, le);
> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
> index f2f4fc02649..5d9959e8ddd 100644
> --- a/hw/arm/musicpal.c
> +++ b/hw/arm/musicpal.c
> @@ -187,13 +187,13 @@ static void eth_rx_desc_put(AddressSpace *dma_as, uint32_t addr,
> cpu_to_le16s(&desc->buffer_size);
> cpu_to_le32s(&desc->buffer);
> cpu_to_le32s(&desc->next);
> - dma_memory_write(dma_as, addr, desc, sizeof(*desc));
> + dma_memory_write(dma_as, addr, desc, sizeof(*desc), MEMTXATTRS_UNSPECIFIED);
> }
>
> static void eth_rx_desc_get(AddressSpace *dma_as, uint32_t addr,
> mv88w8618_rx_desc *desc)
> {
> - dma_memory_read(dma_as, addr, desc, sizeof(*desc));
> + dma_memory_read(dma_as, addr, desc, sizeof(*desc), MEMTXATTRS_UNSPECIFIED);
> le32_to_cpus(&desc->cmdstat);
> le16_to_cpus(&desc->bytes);
> le16_to_cpus(&desc->buffer_size);
> @@ -217,7 +217,7 @@ static ssize_t eth_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> eth_rx_desc_get(&s->dma_as, desc_addr, &desc);
> if ((desc.cmdstat & MP_ETH_RX_OWN) && desc.buffer_size >= size) {
> dma_memory_write(&s->dma_as, desc.buffer + s->vlan_header,
> - buf, size);
> + buf, size, MEMTXATTRS_UNSPECIFIED);
> desc.bytes = size + s->vlan_header;
> desc.cmdstat &= ~MP_ETH_RX_OWN;
> s->cur_rx[i] = desc.next;
> @@ -243,13 +243,13 @@ static void eth_tx_desc_put(AddressSpace *dma_as, uint32_t addr,
> cpu_to_le16s(&desc->bytes);
> cpu_to_le32s(&desc->buffer);
> cpu_to_le32s(&desc->next);
> - dma_memory_write(dma_as, addr, desc, sizeof(*desc));
> + dma_memory_write(dma_as, addr, desc, sizeof(*desc), MEMTXATTRS_UNSPECIFIED);
> }
>
> static void eth_tx_desc_get(AddressSpace *dma_as, uint32_t addr,
> mv88w8618_tx_desc *desc)
> {
> - dma_memory_read(dma_as, addr, desc, sizeof(*desc));
> + dma_memory_read(dma_as, addr, desc, sizeof(*desc), MEMTXATTRS_UNSPECIFIED);
> le32_to_cpus(&desc->cmdstat);
> le16_to_cpus(&desc->res);
> le16_to_cpus(&desc->bytes);
> @@ -271,7 +271,8 @@ static void eth_send(mv88w8618_eth_state *s, int queue_index)
> if (desc.cmdstat & MP_ETH_TX_OWN) {
> len = desc.bytes;
> if (len < 2048) {
> - dma_memory_read(&s->dma_as, desc.buffer, buf, len);
> + dma_memory_read(&s->dma_as, desc.buffer, buf, len,
> + MEMTXATTRS_UNSPECIFIED);
> qemu_send_packet(qemu_get_queue(s->nic), buf, len);
> }
> desc.cmdstat &= ~MP_ETH_TX_OWN;
> diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
> index 3838db13952..f42ee237204 100644
> --- a/hw/arm/smmu-common.c
> +++ b/hw/arm/smmu-common.c
> @@ -188,7 +188,8 @@ static int get_pte(dma_addr_t baseaddr, uint32_t index, uint64_t *pte,
> dma_addr_t addr = baseaddr + index * sizeof(*pte);
>
> /* TODO: guarantee 64-bit single-copy atomicity */
> - ret = dma_memory_read(&address_space_memory, addr, pte, sizeof(*pte));
> + ret = dma_memory_read(&address_space_memory, addr, pte, sizeof(*pte),
> + MEMTXATTRS_UNSPECIFIED);
>
> if (ret != MEMTX_OK) {
> info->type = SMMU_PTW_ERR_WALK_EABT;
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 0122700e725..71d0eea2af1 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -101,7 +101,8 @@ static inline MemTxResult queue_read(SMMUQueue *q, void *data)
> {
> dma_addr_t addr = Q_CONS_ENTRY(q);
>
> - return dma_memory_read(&address_space_memory, addr, data, q->entry_size);
> + return dma_memory_read(&address_space_memory, addr, data, q->entry_size,
> + MEMTXATTRS_UNSPECIFIED);
> }
>
> static MemTxResult queue_write(SMMUQueue *q, void *data)
> @@ -109,7 +110,8 @@ static MemTxResult queue_write(SMMUQueue *q, void *data)
> dma_addr_t addr = Q_PROD_ENTRY(q);
> MemTxResult ret;
>
> - ret = dma_memory_write(&address_space_memory, addr, data, q->entry_size);
> + ret = dma_memory_write(&address_space_memory, addr, data, q->entry_size,
> + MEMTXATTRS_UNSPECIFIED);
> if (ret != MEMTX_OK) {
> return ret;
> }
> @@ -283,7 +285,8 @@ static int smmu_get_ste(SMMUv3State *s, dma_addr_t addr, STE *buf,
>
> trace_smmuv3_get_ste(addr);
> /* TODO: guarantee 64-bit single-copy atomicity */
> - ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf));
> + ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf),
> + MEMTXATTRS_UNSPECIFIED);
> if (ret != MEMTX_OK) {
> qemu_log_mask(LOG_GUEST_ERROR,
> "Cannot fetch pte at address=0x%"PRIx64"\n", addr);
> @@ -304,7 +307,8 @@ static int smmu_get_cd(SMMUv3State *s, STE *ste, uint32_t ssid,
>
> trace_smmuv3_get_cd(addr);
> /* TODO: guarantee 64-bit single-copy atomicity */
> - ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf));
> + ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf),
> + MEMTXATTRS_UNSPECIFIED);
> if (ret != MEMTX_OK) {
> qemu_log_mask(LOG_GUEST_ERROR,
> "Cannot fetch pte at address=0x%"PRIx64"\n", addr);
> @@ -409,7 +413,7 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste,
> l1ptr = (dma_addr_t)(strtab_base + l1_ste_offset * sizeof(l1std));
> /* TODO: guarantee 64-bit single-copy atomicity */
> ret = dma_memory_read(&address_space_memory, l1ptr, &l1std,
> - sizeof(l1std));
> + sizeof(l1std), MEMTXATTRS_UNSPECIFIED);
> if (ret != MEMTX_OK) {
> qemu_log_mask(LOG_GUEST_ERROR,
> "Could not read L1PTR at 0X%"PRIx64"\n", l1ptr);
> diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c
> index a242c076f69..ba48ebae993 100644
> --- a/hw/core/generic-loader.c
> +++ b/hw/core/generic-loader.c
> @@ -57,7 +57,8 @@ static void generic_loader_reset(void *opaque)
>
> if (s->data_len) {
> assert(s->data_len < sizeof(s->data));
> - dma_memory_write(s->cpu->as, s->addr, &s->data, s->data_len);
> + dma_memory_write(s->cpu->as, s->addr, &s->data, s->data_len,
> + MEMTXATTRS_UNSPECIFIED);
> }
> }
>
> diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
> index 0bd63a43f50..0361524c067 100644
> --- a/hw/dma/pl330.c
> +++ b/hw/dma/pl330.c
> @@ -1107,7 +1107,8 @@ static inline const PL330InsnDesc *pl330_fetch_insn(PL330Chan *ch)
> uint8_t opcode;
> int i;
>
> - dma_memory_read(&address_space_memory, ch->pc, &opcode, 1);
> + dma_memory_read(&address_space_memory, ch->pc, &opcode, 1,
> + MEMTXATTRS_UNSPECIFIED);
> for (i = 0; insn_desc[i].size; i++) {
> if ((opcode & insn_desc[i].opmask) == insn_desc[i].opcode) {
> return &insn_desc[i];
> @@ -1121,7 +1122,8 @@ static inline void pl330_exec_insn(PL330Chan *ch, const PL330InsnDesc *insn)
> uint8_t buf[PL330_INSN_MAXSIZE];
>
> assert(insn->size <= PL330_INSN_MAXSIZE);
> - dma_memory_read(&address_space_memory, ch->pc, buf, insn->size);
> + dma_memory_read(&address_space_memory, ch->pc, buf, insn->size,
> + MEMTXATTRS_UNSPECIFIED);
> insn->exec(ch, buf[0], &buf[1], insn->size - 1);
> }
>
> @@ -1185,7 +1187,8 @@ static int pl330_exec_cycle(PL330Chan *channel)
> if (q != NULL && q->len <= pl330_fifo_num_free(&s->fifo)) {
> int len = q->len - (q->addr & (q->len - 1));
>
> - dma_memory_read(&address_space_memory, q->addr, buf, len);
> + dma_memory_read(&address_space_memory, q->addr, buf, len,
> + MEMTXATTRS_UNSPECIFIED);
> trace_pl330_exec_cycle(q->addr, len);
> if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) {
> pl330_hexdump(buf, len);
> @@ -1216,7 +1219,8 @@ static int pl330_exec_cycle(PL330Chan *channel)
> fifo_res = pl330_fifo_get(&s->fifo, buf, len, q->tag);
> }
> if (fifo_res == PL330_FIFO_OK || q->z) {
> - dma_memory_write(&address_space_memory, q->addr, buf, len);
> + dma_memory_write(&address_space_memory, q->addr, buf, len,
> + MEMTXATTRS_UNSPECIFIED);
> trace_pl330_exec_cycle(q->addr, len);
> if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) {
> pl330_hexdump(buf, len);
> diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c
> index bcd1626fbd5..00c22232ceb 100644
> --- a/hw/dma/sparc32_dma.c
> +++ b/hw/dma/sparc32_dma.c
> @@ -81,11 +81,11 @@ void ledma_memory_read(void *opaque, hwaddr addr,
> addr |= s->dmaregs[3];
> trace_ledma_memory_read(addr, len);
> if (do_bswap) {
> - dma_memory_read(&is->iommu_as, addr, buf, len);
> + dma_memory_read(&is->iommu_as, addr, buf, len, MEMTXATTRS_UNSPECIFIED);
> } else {
> addr &= ~1;
> len &= ~1;
> - dma_memory_read(&is->iommu_as, addr, buf, len);
> + dma_memory_read(&is->iommu_as, addr, buf, len, MEMTXATTRS_UNSPECIFIED);
> for(i = 0; i < len; i += 2) {
> bswap16s((uint16_t *)(buf + i));
> }
> @@ -103,7 +103,8 @@ void ledma_memory_write(void *opaque, hwaddr addr,
> addr |= s->dmaregs[3];
> trace_ledma_memory_write(addr, len);
> if (do_bswap) {
> - dma_memory_write(&is->iommu_as, addr, buf, len);
> + dma_memory_write(&is->iommu_as, addr, buf, len,
> + MEMTXATTRS_UNSPECIFIED);
> } else {
> addr &= ~1;
> len &= ~1;
> @@ -114,7 +115,8 @@ void ledma_memory_write(void *opaque, hwaddr addr,
> for(i = 0; i < l; i += 2) {
> tmp_buf[i >> 1] = bswap16(*(uint16_t *)(buf + i));
> }
> - dma_memory_write(&is->iommu_as, addr, tmp_buf, l);
> + dma_memory_write(&is->iommu_as, addr, tmp_buf, l,
> + MEMTXATTRS_UNSPECIFIED);
> len -= l;
> buf += l;
> addr += l;
> @@ -148,7 +150,8 @@ void espdma_memory_read(void *opaque, uint8_t *buf, int len)
> IOMMUState *is = (IOMMUState *)s->iommu;
>
> trace_espdma_memory_read(s->dmaregs[1], len);
> - dma_memory_read(&is->iommu_as, s->dmaregs[1], buf, len);
> + dma_memory_read(&is->iommu_as, s->dmaregs[1], buf, len,
> + MEMTXATTRS_UNSPECIFIED);
> s->dmaregs[1] += len;
> }
>
> @@ -158,7 +161,8 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int len)
> IOMMUState *is = (IOMMUState *)s->iommu;
>
> trace_espdma_memory_write(s->dmaregs[1], len);
> - dma_memory_write(&is->iommu_as, s->dmaregs[1], buf, len);
> + dma_memory_write(&is->iommu_as, s->dmaregs[1], buf, len,
> + MEMTXATTRS_UNSPECIFIED);
> s->dmaregs[1] += len;
> }
>
> diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
> index e33112b6f0e..f5ad1a0d22c 100644
> --- a/hw/dma/xlnx-zynq-devcfg.c
> +++ b/hw/dma/xlnx-zynq-devcfg.c
> @@ -161,12 +161,14 @@ static void xlnx_zynq_devcfg_dma_go(XlnxZynqDevcfg *s)
> btt = MIN(btt, dmah->dest_len);
> }
> DB_PRINT("reading %x bytes from %x\n", btt, dmah->src_addr);
> - dma_memory_read(&address_space_memory, dmah->src_addr, buf, btt);
> + dma_memory_read(&address_space_memory, dmah->src_addr, buf, btt,
> + MEMTXATTRS_UNSPECIFIED);
> dmah->src_len -= btt;
> dmah->src_addr += btt;
> if (loopback && (dmah->src_len || dmah->dest_len)) {
> DB_PRINT("writing %x bytes from %x\n", btt, dmah->dest_addr);
> - dma_memory_write(&address_space_memory, dmah->dest_addr, buf, btt);
> + dma_memory_write(&address_space_memory, dmah->dest_addr, buf, btt,
> + MEMTXATTRS_UNSPECIFIED);
> dmah->dest_len -= btt;
> dmah->dest_addr += btt;
> }
> diff --git a/hw/dma/xlnx_dpdma.c b/hw/dma/xlnx_dpdma.c
> index b40c897de2c..321f30a6535 100644
> --- a/hw/dma/xlnx_dpdma.c
> +++ b/hw/dma/xlnx_dpdma.c
> @@ -652,7 +652,7 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
> }
>
> if (dma_memory_read(&address_space_memory, desc_addr, &desc,
> - sizeof(DPDMADescriptor))) {
> + sizeof(DPDMADescriptor), MEMTXATTRS_UNSPECIFIED)) {
> s->registers[DPDMA_EISR] |= ((1 << 1) << channel);
> xlnx_dpdma_update_irq(s);
> s->operation_finished[channel] = true;
> @@ -708,7 +708,8 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
> if (dma_memory_read(&address_space_memory,
> source_addr[0],
> &s->data[channel][ptr],
> - line_size)) {
> + line_size,
> + MEMTXATTRS_UNSPECIFIED)) {
> s->registers[DPDMA_ISR] |= ((1 << 12) << channel);
> xlnx_dpdma_update_irq(s);
> DPRINTF("Can't get data.\n");
> @@ -736,7 +737,8 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
> if (dma_memory_read(&address_space_memory,
> source_addr[frag],
> &(s->data[channel][ptr]),
> - fragment_len)) {
> + fragment_len,
> + MEMTXATTRS_UNSPECIFIED)) {
> s->registers[DPDMA_ISR] |= ((1 << 12) << channel);
> xlnx_dpdma_update_irq(s);
> DPRINTF("Can't get data.\n");
> @@ -754,7 +756,7 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
> DPRINTF("update the descriptor with the done flag set.\n");
> xlnx_dpdma_desc_set_done(&desc);
> dma_memory_write(&address_space_memory, desc_addr, &desc,
> - sizeof(DPDMADescriptor));
> + sizeof(DPDMADescriptor), MEMTXATTRS_UNSPECIFIED);
> }
>
> if (xlnx_dpdma_desc_completion_interrupt(&desc)) {
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 74a93a5d93f..3c2a1a61db5 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -181,7 +181,7 @@ static void amdvi_log_event(AMDVIState *s, uint64_t *evt)
> }
>
> if (dma_memory_write(&address_space_memory, s->evtlog + s->evtlog_tail,
> - evt, AMDVI_EVENT_LEN)) {
> + evt, AMDVI_EVENT_LEN, MEMTXATTRS_UNSPECIFIED)) {
> trace_amdvi_evntlog_fail(s->evtlog, s->evtlog_tail);
> }
>
> @@ -376,7 +376,8 @@ static void amdvi_completion_wait(AMDVIState *s, uint64_t *cmd)
> }
> if (extract64(cmd[0], 0, 1)) {
> if (dma_memory_write(&address_space_memory, addr, &data,
> - AMDVI_COMPLETION_DATA_SIZE)) {
> + AMDVI_COMPLETION_DATA_SIZE,
> + MEMTXATTRS_UNSPECIFIED)) {
> trace_amdvi_completion_wait_fail(addr);
> }
> }
> @@ -502,7 +503,7 @@ static void amdvi_cmdbuf_exec(AMDVIState *s)
> uint64_t cmd[2];
>
> if (dma_memory_read(&address_space_memory, s->cmdbuf + s->cmdbuf_head,
> - cmd, AMDVI_COMMAND_SIZE)) {
> + cmd, AMDVI_COMMAND_SIZE, MEMTXATTRS_UNSPECIFIED)) {
> trace_amdvi_command_read_fail(s->cmdbuf, s->cmdbuf_head);
> amdvi_log_command_error(s, s->cmdbuf + s->cmdbuf_head);
> return;
> @@ -836,7 +837,7 @@ static bool amdvi_get_dte(AMDVIState *s, int devid, uint64_t *entry)
> uint32_t offset = devid * AMDVI_DEVTAB_ENTRY_SIZE;
>
> if (dma_memory_read(&address_space_memory, s->devtab + offset, entry,
> - AMDVI_DEVTAB_ENTRY_SIZE)) {
> + AMDVI_DEVTAB_ENTRY_SIZE, MEMTXATTRS_UNSPECIFIED)) {
> trace_amdvi_dte_get_fail(s->devtab, offset);
> /* log error accessing dte */
> amdvi_log_devtab_error(s, devid, s->devtab + offset, 0);
> @@ -881,7 +882,8 @@ static inline uint64_t amdvi_get_pte_entry(AMDVIState *s, uint64_t pte_addr,
> {
> uint64_t pte;
>
> - if (dma_memory_read(&address_space_memory, pte_addr, &pte, sizeof(pte))) {
> + if (dma_memory_read(&address_space_memory, pte_addr,
> + &pte, sizeof(pte), MEMTXATTRS_UNSPECIFIED)) {
> trace_amdvi_get_pte_hwerror(pte_addr);
> amdvi_log_pagetab_error(s, devid, pte_addr, 0);
> pte = 0;
> @@ -1048,7 +1050,7 @@ static int amdvi_get_irte(AMDVIState *s, MSIMessage *origin, uint64_t *dte,
> trace_amdvi_ir_irte(irte_root, offset);
>
> if (dma_memory_read(&address_space_memory, irte_root + offset,
> - irte, sizeof(*irte))) {
> + irte, sizeof(*irte), MEMTXATTRS_UNSPECIFIED)) {
> trace_amdvi_ir_err("failed to get irte");
> return -AMDVI_IR_GET_IRTE;
> }
> @@ -1108,7 +1110,7 @@ static int amdvi_get_irte_ga(AMDVIState *s, MSIMessage *origin, uint64_t *dte,
> trace_amdvi_ir_irte(irte_root, offset);
>
> if (dma_memory_read(&address_space_memory, irte_root + offset,
> - irte, sizeof(*irte))) {
> + irte, sizeof(*irte), MEMTXATTRS_UNSPECIFIED)) {
> trace_amdvi_ir_err("failed to get irte_ga");
> return -AMDVI_IR_GET_IRTE;
> }
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 749eb6ad632..8de57dd995e 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -570,7 +570,8 @@ static int vtd_get_root_entry(IntelIOMMUState *s, uint8_t index,
> dma_addr_t addr;
>
> addr = s->root + index * sizeof(*re);
> - if (dma_memory_read(&address_space_memory, addr, re, sizeof(*re))) {
> + if (dma_memory_read(&address_space_memory, addr,
> + re, sizeof(*re), MEMTXATTRS_UNSPECIFIED)) {
> re->lo = 0;
> return -VTD_FR_ROOT_TABLE_INV;
> }
> @@ -603,7 +604,8 @@ static int vtd_get_context_entry_from_root(IntelIOMMUState *s,
> }
>
> addr = addr + index * ce_size;
> - if (dma_memory_read(&address_space_memory, addr, ce, ce_size)) {
> + if (dma_memory_read(&address_space_memory, addr,
> + ce, ce_size, MEMTXATTRS_UNSPECIFIED)) {
> return -VTD_FR_CONTEXT_TABLE_INV;
> }
>
> @@ -640,8 +642,8 @@ static uint64_t vtd_get_slpte(dma_addr_t base_addr, uint32_t index)
> assert(index < VTD_SL_PT_ENTRY_NR);
>
> if (dma_memory_read(&address_space_memory,
> - base_addr + index * sizeof(slpte), &slpte,
> - sizeof(slpte))) {
> + base_addr + index * sizeof(slpte),
> + &slpte, sizeof(slpte), MEMTXATTRS_UNSPECIFIED)) {
> slpte = (uint64_t)-1;
> return slpte;
> }
> @@ -705,7 +707,8 @@ static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base,
> index = VTD_PASID_DIR_INDEX(pasid);
> entry_size = VTD_PASID_DIR_ENTRY_SIZE;
> addr = pasid_dir_base + index * entry_size;
> - if (dma_memory_read(&address_space_memory, addr, pdire, entry_size)) {
> + if (dma_memory_read(&address_space_memory, addr,
> + pdire, entry_size, MEMTXATTRS_UNSPECIFIED)) {
> return -VTD_FR_PASID_TABLE_INV;
> }
>
> @@ -729,7 +732,8 @@ static int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s,
> index = VTD_PASID_TABLE_INDEX(pasid);
> entry_size = VTD_PASID_ENTRY_SIZE;
> addr = addr + index * entry_size;
> - if (dma_memory_read(&address_space_memory, addr, pe, entry_size)) {
> + if (dma_memory_read(&address_space_memory, addr,
> + pe, entry_size, MEMTXATTRS_UNSPECIFIED)) {
> return -VTD_FR_PASID_TABLE_INV;
> }
>
> @@ -2262,7 +2266,8 @@ static bool vtd_get_inv_desc(IntelIOMMUState *s,
> uint32_t dw = s->iq_dw ? 32 : 16;
> dma_addr_t addr = base_addr + offset * dw;
>
> - if (dma_memory_read(&address_space_memory, addr, inv_desc, dw)) {
> + if (dma_memory_read(&address_space_memory, addr,
> + inv_desc, dw, MEMTXATTRS_UNSPECIFIED)) {
> error_report_once("Read INV DESC failed.");
> return false;
> }
> @@ -2295,8 +2300,9 @@ static bool vtd_process_wait_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc)
> dma_addr_t status_addr = inv_desc->hi;
> trace_vtd_inv_desc_wait_sw(status_addr, status_data);
> status_data = cpu_to_le32(status_data);
> - if (dma_memory_write(&address_space_memory, status_addr, &status_data,
> - sizeof(status_data))) {
> + if (dma_memory_write(&address_space_memory, status_addr,
> + &status_data, sizeof(status_data),
> + MEMTXATTRS_UNSPECIFIED)) {
> trace_vtd_inv_desc_wait_write_fail(inv_desc->hi, inv_desc->lo);
> return false;
> }
> @@ -3106,8 +3112,8 @@ static int vtd_irte_get(IntelIOMMUState *iommu, uint16_t index,
> }
>
> addr = iommu->intr_root + index * sizeof(*entry);
> - if (dma_memory_read(&address_space_memory, addr, entry,
> - sizeof(*entry))) {
> + if (dma_memory_read(&address_space_memory, addr,
> + entry, sizeof(*entry), MEMTXATTRS_UNSPECIFIED)) {
> error_report_once("%s: read failed: ind=0x%x addr=0x%" PRIx64,
> __func__, index, addr);
> return -VTD_FR_IR_ROOT_INVAL;
> diff --git a/hw/ide/macio.c b/hw/ide/macio.c
> index 62a599a0751..a93a2b75a85 100644
> --- a/hw/ide/macio.c
> +++ b/hw/ide/macio.c
> @@ -97,7 +97,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
> /* Non-block ATAPI transfer - just copy to RAM */
> s->io_buffer_size = MIN(s->io_buffer_size, io->len);
> dma_memory_write(&address_space_memory, io->addr, s->io_buffer,
> - s->io_buffer_size);
> + s->io_buffer_size, MEMTXATTRS_UNSPECIFIED);
> io->len = 0;
> ide_atapi_cmd_ok(s);
> m->dma_active = false;
> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> index 489e6256ef7..8e8618c1ab4 100644
> --- a/hw/intc/xive.c
> +++ b/hw/intc/xive.c
> @@ -1236,8 +1236,8 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon)
> uint64_t qaddr = qaddr_base + (qindex << 2);
> uint32_t qdata = -1;
>
> - if (dma_memory_read(&address_space_memory, qaddr, &qdata,
> - sizeof(qdata))) {
> + if (dma_memory_read(&address_space_memory, qaddr,
> + &qdata, sizeof(qdata), MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR, "XIVE: failed to read EQ @0x%"
> HWADDR_PRIx "\n", qaddr);
> return;
> @@ -1300,7 +1300,8 @@ static void xive_end_enqueue(XiveEND *end, uint32_t data)
> uint32_t qdata = cpu_to_be32((qgen << 31) | (data & 0x7fffffff));
> uint32_t qentries = 1 << (qsize + 10);
>
> - if (dma_memory_write(&address_space_memory, qaddr, &qdata, sizeof(qdata))) {
> + if (dma_memory_write(&address_space_memory, qaddr,
> + &qdata, sizeof(qdata), MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR, "XIVE: failed to write END data @0x%"
> HWADDR_PRIx "\n", qaddr);
> return;
> diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
> index 73941bdae97..76ea511d53d 100644
> --- a/hw/misc/bcm2835_property.c
> +++ b/hw/misc/bcm2835_property.c
> @@ -69,7 +69,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> break;
> case 0x00010003: /* Get board MAC address */
> resplen = sizeof(s->macaddr.a);
> - dma_memory_write(&s->dma_as, value + 12, s->macaddr.a, resplen);
> + dma_memory_write(&s->dma_as, value + 12, s->macaddr.a, resplen,
> + MEMTXATTRS_UNSPECIFIED);
> break;
> case 0x00010004: /* Get board serial */
> qemu_log_mask(LOG_UNIMP,
> diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc/macio/mac_dbdma.c
> index e220f1a9277..efcc02609fd 100644
> --- a/hw/misc/macio/mac_dbdma.c
> +++ b/hw/misc/macio/mac_dbdma.c
> @@ -94,7 +94,7 @@ static void dbdma_cmdptr_load(DBDMA_channel *ch)
> DBDMA_DPRINTFCH(ch, "dbdma_cmdptr_load 0x%08x\n",
> ch->regs[DBDMA_CMDPTR_LO]);
> dma_memory_read(&address_space_memory, ch->regs[DBDMA_CMDPTR_LO],
> - &ch->current, sizeof(dbdma_cmd));
> + &ch->current, sizeof(dbdma_cmd), MEMTXATTRS_UNSPECIFIED);
> }
>
> static void dbdma_cmdptr_save(DBDMA_channel *ch)
> @@ -104,7 +104,7 @@ static void dbdma_cmdptr_save(DBDMA_channel *ch)
> le16_to_cpu(ch->current.xfer_status),
> le16_to_cpu(ch->current.res_count));
> dma_memory_write(&address_space_memory, ch->regs[DBDMA_CMDPTR_LO],
> - &ch->current, sizeof(dbdma_cmd));
> + &ch->current, sizeof(dbdma_cmd), MEMTXATTRS_UNSPECIFIED);
> }
>
> static void kill_channel(DBDMA_channel *ch)
> @@ -371,7 +371,8 @@ static void load_word(DBDMA_channel *ch, int key, uint32_t addr,
> return;
> }
>
> - dma_memory_read(&address_space_memory, addr, ¤t->cmd_dep, len);
> + dma_memory_read(&address_space_memory, addr, ¤t->cmd_dep, len,
> + MEMTXATTRS_UNSPECIFIED);
>
> if (conditional_wait(ch))
> goto wait;
> @@ -403,7 +404,8 @@ static void store_word(DBDMA_channel *ch, int key, uint32_t addr,
> return;
> }
>
> - dma_memory_write(&address_space_memory, addr, ¤t->cmd_dep, len);
> + dma_memory_write(&address_space_memory, addr, ¤t->cmd_dep, len,
> + MEMTXATTRS_UNSPECIFIED);
>
> if (conditional_wait(ch))
> goto wait;
> diff --git a/hw/net/allwinner-sun8i-emac.c b/hw/net/allwinner-sun8i-emac.c
> index 38d328587e3..5189ad77527 100644
> --- a/hw/net/allwinner-sun8i-emac.c
> +++ b/hw/net/allwinner-sun8i-emac.c
> @@ -345,7 +345,8 @@ static uint32_t allwinner_sun8i_emac_next_desc(AwSun8iEmacState *s,
> {
> uint32_t paddr = desc->next;
>
> - dma_memory_read(&s->dma_as, paddr, desc, sizeof(*desc));
> + dma_memory_read(&s->dma_as, paddr, desc, sizeof(*desc),
> + MEMTXATTRS_UNSPECIFIED);
>
> if ((desc->status & DESC_STATUS_CTL) &&
> (desc->status2 & DESC_STATUS2_BUF_SIZE_MASK) >= min_size) {
> @@ -364,7 +365,8 @@ static uint32_t allwinner_sun8i_emac_get_desc(AwSun8iEmacState *s,
>
> /* Note that the list is a cycle. Last entry points back to the head. */
> while (desc_addr != 0) {
> - dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc));
> + dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc),
> + MEMTXATTRS_UNSPECIFIED);
>
> if ((desc->status & DESC_STATUS_CTL) &&
> (desc->status2 & DESC_STATUS2_BUF_SIZE_MASK) >= min_size) {
> @@ -397,7 +399,8 @@ static void allwinner_sun8i_emac_flush_desc(AwSun8iEmacState *s,
> FrameDescriptor *desc,
> uint32_t phys_addr)
> {
> - dma_memory_write(&s->dma_as, phys_addr, desc, sizeof(*desc));
> + dma_memory_write(&s->dma_as, phys_addr, desc, sizeof(*desc),
> + MEMTXATTRS_UNSPECIFIED);
> }
>
> static bool allwinner_sun8i_emac_can_receive(NetClientState *nc)
> @@ -455,7 +458,8 @@ static ssize_t allwinner_sun8i_emac_receive(NetClientState *nc,
> << RX_DESC_STATUS_FRM_LEN_SHIFT;
> }
>
> - dma_memory_write(&s->dma_as, desc.addr, buf, desc_bytes);
> + dma_memory_write(&s->dma_as, desc.addr, buf, desc_bytes,
> + MEMTXATTRS_UNSPECIFIED);
> allwinner_sun8i_emac_flush_desc(s, &desc, s->rx_desc_curr);
> trace_allwinner_sun8i_emac_receive(s->rx_desc_curr, desc.addr,
> desc_bytes);
> @@ -506,7 +510,8 @@ static void allwinner_sun8i_emac_transmit(AwSun8iEmacState *s)
> desc.status |= TX_DESC_STATUS_LENGTH_ERR;
> break;
> }
> - dma_memory_read(&s->dma_as, desc.addr, packet_buf + packet_bytes, bytes);
> + dma_memory_read(&s->dma_as, desc.addr, packet_buf + packet_bytes,
> + bytes, MEMTXATTRS_UNSPECIFIED);
> packet_bytes += bytes;
> desc.status &= ~DESC_STATUS_CTL;
> allwinner_sun8i_emac_flush_desc(s, &desc, s->tx_desc_curr);
> @@ -628,7 +633,8 @@ static uint64_t allwinner_sun8i_emac_read(void *opaque, hwaddr offset,
> break;
> case REG_TX_CUR_BUF: /* Transmit Current Buffer */
> if (s->tx_desc_curr != 0) {
> - dma_memory_read(&s->dma_as, s->tx_desc_curr, &desc, sizeof(desc));
> + dma_memory_read(&s->dma_as, s->tx_desc_curr, &desc, sizeof(desc),
> + MEMTXATTRS_UNSPECIFIED);
> value = desc.addr;
> } else {
> value = 0;
> @@ -641,7 +647,8 @@ static uint64_t allwinner_sun8i_emac_read(void *opaque, hwaddr offset,
> break;
> case REG_RX_CUR_BUF: /* Receive Current Buffer */
> if (s->rx_desc_curr != 0) {
> - dma_memory_read(&s->dma_as, s->rx_desc_curr, &desc, sizeof(desc));
> + dma_memory_read(&s->dma_as, s->rx_desc_curr, &desc, sizeof(desc),
> + MEMTXATTRS_UNSPECIFIED);
> value = desc.addr;
> } else {
> value = 0;
> diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
> index 782ff192ced..ee2da500948 100644
> --- a/hw/net/ftgmac100.c
> +++ b/hw/net/ftgmac100.c
> @@ -453,7 +453,8 @@ static void do_phy_ctl(FTGMAC100State *s)
>
> static int ftgmac100_read_bd(FTGMAC100Desc *bd, dma_addr_t addr)
> {
> - if (dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd))) {
> + if (dma_memory_read(&address_space_memory, addr,
> + bd, sizeof(*bd), MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to read descriptor @ 0x%"
> HWADDR_PRIx "\n", __func__, addr);
> return -1;
> @@ -473,7 +474,8 @@ static int ftgmac100_write_bd(FTGMAC100Desc *bd, dma_addr_t addr)
> lebd.des1 = cpu_to_le32(bd->des1);
> lebd.des2 = cpu_to_le32(bd->des2);
> lebd.des3 = cpu_to_le32(bd->des3);
> - if (dma_memory_write(&address_space_memory, addr, &lebd, sizeof(lebd))) {
> + if (dma_memory_write(&address_space_memory, addr,
> + &lebd, sizeof(lebd), MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to write descriptor @ 0x%"
> HWADDR_PRIx "\n", __func__, addr);
> return -1;
> @@ -554,7 +556,8 @@ static void ftgmac100_do_tx(FTGMAC100State *s, uint32_t tx_ring,
> len = sizeof(s->frame) - frame_size;
> }
>
> - if (dma_memory_read(&address_space_memory, bd.des3, ptr, len)) {
> + if (dma_memory_read(&address_space_memory, bd.des3,
> + ptr, len, MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to read packet @ 0x%x\n",
> __func__, bd.des3);
> s->isr |= FTGMAC100_INT_AHB_ERR;
> @@ -1019,20 +1022,24 @@ static ssize_t ftgmac100_receive(NetClientState *nc, const uint8_t *buf,
> bd.des1 = lduw_be_p(buf + 14) | FTGMAC100_RXDES1_VLANTAG_AVAIL;
>
> if (s->maccr & FTGMAC100_MACCR_RM_VLAN) {
> - dma_memory_write(&address_space_memory, buf_addr, buf, 12);
> - dma_memory_write(&address_space_memory, buf_addr + 12, buf + 16,
> - buf_len - 16);
> + dma_memory_write(&address_space_memory, buf_addr, buf, 12,
> + MEMTXATTRS_UNSPECIFIED);
> + dma_memory_write(&address_space_memory, buf_addr + 12,
> + buf + 16, buf_len - 16,
> + MEMTXATTRS_UNSPECIFIED);
> } else {
> - dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
> + dma_memory_write(&address_space_memory, buf_addr, buf,
> + buf_len, MEMTXATTRS_UNSPECIFIED);
> }
> } else {
> bd.des1 = 0;
> - dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
> + dma_memory_write(&address_space_memory, buf_addr, buf, buf_len,
> + MEMTXATTRS_UNSPECIFIED);
> }
> buf += buf_len;
> if (size < 4) {
> dma_memory_write(&address_space_memory, buf_addr + buf_len,
> - crc_ptr, 4 - size);
> + crc_ptr, 4 - size, MEMTXATTRS_UNSPECIFIED);
> crc_ptr += 4 - size;
> }
>
> diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
> index 2c148040414..ff4c345f09f 100644
> --- a/hw/net/imx_fec.c
> +++ b/hw/net/imx_fec.c
> @@ -389,19 +389,22 @@ static void imx_phy_write(IMXFECState *s, int reg, uint32_t val)
>
> static void imx_fec_read_bd(IMXFECBufDesc *bd, dma_addr_t addr)
> {
> - dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd));
> + dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd),
> + MEMTXATTRS_UNSPECIFIED);
>
> trace_imx_fec_read_bd(addr, bd->flags, bd->length, bd->data);
> }
>
> static void imx_fec_write_bd(IMXFECBufDesc *bd, dma_addr_t addr)
> {
> - dma_memory_write(&address_space_memory, addr, bd, sizeof(*bd));
> + dma_memory_write(&address_space_memory, addr, bd, sizeof(*bd),
> + MEMTXATTRS_UNSPECIFIED);
> }
>
> static void imx_enet_read_bd(IMXENETBufDesc *bd, dma_addr_t addr)
> {
> - dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd));
> + dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd),
> + MEMTXATTRS_UNSPECIFIED);
>
> trace_imx_enet_read_bd(addr, bd->flags, bd->length, bd->data,
> bd->option, bd->status);
> @@ -409,7 +412,8 @@ static void imx_enet_read_bd(IMXENETBufDesc *bd, dma_addr_t addr)
>
> static void imx_enet_write_bd(IMXENETBufDesc *bd, dma_addr_t addr)
> {
> - dma_memory_write(&address_space_memory, addr, bd, sizeof(*bd));
> + dma_memory_write(&address_space_memory, addr, bd, sizeof(*bd),
> + MEMTXATTRS_UNSPECIFIED);
> }
>
> static void imx_eth_update(IMXFECState *s)
> @@ -476,7 +480,8 @@ static void imx_fec_do_tx(IMXFECState *s)
> len = ENET_MAX_FRAME_SIZE - frame_size;
> s->regs[ENET_EIR] |= ENET_INT_BABT;
> }
> - dma_memory_read(&address_space_memory, bd.data, ptr, len);
> + dma_memory_read(&address_space_memory, bd.data, ptr, len,
> + MEMTXATTRS_UNSPECIFIED);
> ptr += len;
> frame_size += len;
> if (bd.flags & ENET_BD_L) {
> @@ -557,7 +562,8 @@ static void imx_enet_do_tx(IMXFECState *s, uint32_t index)
> len = ENET_MAX_FRAME_SIZE - frame_size;
> s->regs[ENET_EIR] |= ENET_INT_BABT;
> }
> - dma_memory_read(&address_space_memory, bd.data, ptr, len);
> + dma_memory_read(&address_space_memory, bd.data, ptr, len,
> + MEMTXATTRS_UNSPECIFIED);
> ptr += len;
> frame_size += len;
> if (bd.flags & ENET_BD_L) {
> @@ -1109,11 +1115,12 @@ static ssize_t imx_fec_receive(NetClientState *nc, const uint8_t *buf,
> buf_len += size - 4;
> }
> buf_addr = bd.data;
> - dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
> + dma_memory_write(&address_space_memory, buf_addr, buf, buf_len,
> + MEMTXATTRS_UNSPECIFIED);
> buf += buf_len;
> if (size < 4) {
> dma_memory_write(&address_space_memory, buf_addr + buf_len,
> - crc_ptr, 4 - size);
> + crc_ptr, 4 - size, MEMTXATTRS_UNSPECIFIED);
> crc_ptr += 4 - size;
> }
> bd.flags &= ~ENET_BD_E;
> @@ -1216,8 +1223,8 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
> */
> const uint8_t zeros[2] = { 0 };
>
> - dma_memory_write(&address_space_memory, buf_addr,
> - zeros, sizeof(zeros));
> + dma_memory_write(&address_space_memory, buf_addr, zeros,
> + sizeof(zeros), MEMTXATTRS_UNSPECIFIED);
>
> buf_addr += sizeof(zeros);
> buf_len -= sizeof(zeros);
> @@ -1226,11 +1233,12 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
> shift16 = false;
> }
>
> - dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
> + dma_memory_write(&address_space_memory, buf_addr, buf, buf_len,
> + MEMTXATTRS_UNSPECIFIED);
> buf += buf_len;
> if (size < 4) {
> dma_memory_write(&address_space_memory, buf_addr + buf_len,
> - crc_ptr, 4 - size);
> + crc_ptr, 4 - size, MEMTXATTRS_UNSPECIFIED);
> crc_ptr += 4 - size;
> }
> bd.flags &= ~ENET_BD_E;
> diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
> index a15de06a10c..877df8752a0 100644
> --- a/hw/nvram/fw_cfg.c
> +++ b/hw/nvram/fw_cfg.c
> @@ -355,7 +355,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
> dma_addr = s->dma_addr;
> s->dma_addr = 0;
>
> - if (dma_memory_read(s->dma_as, dma_addr, &dma, sizeof(dma))) {
> + if (dma_memory_read(s->dma_as, dma_addr,
> + &dma, sizeof(dma), MEMTXATTRS_UNSPECIFIED)) {
> stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control),
> FW_CFG_DMA_CTL_ERROR);
> return;
> @@ -417,7 +418,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
> */
> if (read) {
> if (dma_memory_write(s->dma_as, dma.address,
> - &e->data[s->cur_offset], len)) {
> + &e->data[s->cur_offset], len,
> + MEMTXATTRS_UNSPECIFIED)) {
> dma.control |= FW_CFG_DMA_CTL_ERROR;
> }
> }
> @@ -425,7 +427,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
> if (!e->allow_write ||
> len != dma.length ||
> dma_memory_read(s->dma_as, dma.address,
> - &e->data[s->cur_offset], len)) {
> + &e->data[s->cur_offset], len,
> + MEMTXATTRS_UNSPECIFIED)) {
> dma.control |= FW_CFG_DMA_CTL_ERROR;
> } else if (e->write_cb) {
> e->write_cb(e->callback_opaque, s->cur_offset, len);
> diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
> index 82132c12ca9..3e0938e5f4e 100644
> --- a/hw/pci-host/pnv_phb3.c
> +++ b/hw/pci-host/pnv_phb3.c
> @@ -714,7 +714,8 @@ static bool pnv_phb3_resolve_pe(PnvPhb3DMASpace *ds)
> bus_num = pci_bus_num(ds->bus);
> addr = rtt & PHB_RTT_BASE_ADDRESS_MASK;
> addr += 2 * ((bus_num << 8) | ds->devfn);
> - if (dma_memory_read(&address_space_memory, addr, &rte, sizeof(rte))) {
> + if (dma_memory_read(&address_space_memory, addr, &rte,
> + sizeof(rte), MEMTXATTRS_UNSPECIFIED)) {
> phb3_error(ds->phb, "Failed to read RTT entry at 0x%"PRIx64, addr);
> /* Set error bits ? fence ? ... */
> return false;
> @@ -793,7 +794,7 @@ static void pnv_phb3_translate_tve(PnvPhb3DMASpace *ds, hwaddr addr,
> /* Grab the TCE address */
> taddr = base | (((addr >> sh) & ((1ul << tbl_shift) - 1)) << 3);
> if (dma_memory_read(&address_space_memory, taddr, &tce,
> - sizeof(tce))) {
> + sizeof(tce), MEMTXATTRS_UNSPECIFIED)) {
> phb3_error(phb, "Failed to read TCE at 0x%"PRIx64, taddr);
> return;
> }
> diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c
> index 099d2092a2c..8bcbc2cc4f3 100644
> --- a/hw/pci-host/pnv_phb3_msi.c
> +++ b/hw/pci-host/pnv_phb3_msi.c
> @@ -53,7 +53,8 @@ static bool phb3_msi_read_ive(PnvPHB3 *phb, int srcno, uint64_t *out_ive)
> return false;
> }
>
> - if (dma_memory_read(&address_space_memory, ive_addr, &ive, sizeof(ive))) {
> + if (dma_memory_read(&address_space_memory, ive_addr,
> + &ive, sizeof(ive), MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR, "Failed to read IVE at 0x%" PRIx64,
> ive_addr);
> return false;
> @@ -73,7 +74,8 @@ static void phb3_msi_set_p(Phb3MsiState *msi, int srcno, uint8_t gen)
> return;
> }
>
> - if (dma_memory_write(&address_space_memory, ive_addr + 4, &p, 1)) {
> + if (dma_memory_write(&address_space_memory, ive_addr + 4,
> + &p, 1, MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR,
> "Failed to write IVE (set P) at 0x%" PRIx64, ive_addr);
> }
> @@ -89,7 +91,8 @@ static void phb3_msi_set_q(Phb3MsiState *msi, int srcno)
> return;
> }
>
> - if (dma_memory_write(&address_space_memory, ive_addr + 5, &q, 1)) {
> + if (dma_memory_write(&address_space_memory, ive_addr + 5,
> + &q, 1, MEMTXATTRS_UNSPECIFIED)) {
> qemu_log_mask(LOG_GUEST_ERROR,
> "Failed to write IVE (set Q) at 0x%" PRIx64, ive_addr);
> }
> diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
> index 75ad766fe0b..4369a97b9d2 100644
> --- a/hw/pci-host/pnv_phb4.c
> +++ b/hw/pci-host/pnv_phb4.c
> @@ -889,7 +889,8 @@ static bool pnv_phb4_resolve_pe(PnvPhb4DMASpace *ds)
> bus_num = pci_bus_num(ds->bus);
> addr = rtt & PHB_RTT_BASE_ADDRESS_MASK;
> addr += 2 * ((bus_num << 8) | ds->devfn);
> - if (dma_memory_read(&address_space_memory, addr, &rte, sizeof(rte))) {
> + if (dma_memory_read(&address_space_memory, addr,
> + &rte, sizeof(rte), MEMTXATTRS_UNSPECIFIED)) {
> phb_error(ds->phb, "Failed to read RTT entry at 0x%"PRIx64, addr);
> /* Set error bits ? fence ? ... */
> return false;
> @@ -958,8 +959,8 @@ static void pnv_phb4_translate_tve(PnvPhb4DMASpace *ds, hwaddr addr,
> while ((lev--) >= 0) {
> /* Grab the TCE address */
> taddr = base | (((addr >> sh) & ((1ul << tbl_shift) - 1)) << 3);
> - if (dma_memory_read(&address_space_memory, taddr, &tce,
> - sizeof(tce))) {
> + if (dma_memory_read(&address_space_memory, taddr,
> + &tce, sizeof(tce), MEMTXATTRS_UNSPECIFIED)) {
> phb_error(ds->phb, "Failed to read TCE at 0x%"PRIx64, taddr);
> return;
> }
> diff --git a/hw/sd/allwinner-sdhost.c b/hw/sd/allwinner-sdhost.c
> index e82afb75eb6..e98956ebb76 100644
> --- a/hw/sd/allwinner-sdhost.c
> +++ b/hw/sd/allwinner-sdhost.c
> @@ -309,7 +309,8 @@ static uint32_t allwinner_sdhost_process_desc(AwSdHostState *s,
> uint8_t buf[1024];
>
> /* Read descriptor */
> - dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc));
> + dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc),
> + MEMTXATTRS_UNSPECIFIED);
> if (desc->size == 0) {
> desc->size = klass->max_desc_size;
> } else if (desc->size > klass->max_desc_size) {
> @@ -335,23 +336,24 @@ static uint32_t allwinner_sdhost_process_desc(AwSdHostState *s,
> /* Write to SD bus */
> if (is_write) {
> dma_memory_read(&s->dma_as,
> - (desc->addr & DESC_SIZE_MASK) + num_done,
> - buf, buf_bytes);
> + (desc->addr & DESC_SIZE_MASK) + num_done, buf,
> + buf_bytes, MEMTXATTRS_UNSPECIFIED);
> sdbus_write_data(&s->sdbus, buf, buf_bytes);
>
> /* Read from SD bus */
> } else {
> sdbus_read_data(&s->sdbus, buf, buf_bytes);
> dma_memory_write(&s->dma_as,
> - (desc->addr & DESC_SIZE_MASK) + num_done,
> - buf, buf_bytes);
> + (desc->addr & DESC_SIZE_MASK) + num_done, buf,
> + buf_bytes, MEMTXATTRS_UNSPECIFIED);
> }
> num_done += buf_bytes;
> }
>
> /* Clear hold flag and flush descriptor */
> desc->status &= ~DESC_STATUS_HOLD;
> - dma_memory_write(&s->dma_as, desc_addr, desc, sizeof(*desc));
> + dma_memory_write(&s->dma_as, desc_addr, desc, sizeof(*desc),
> + MEMTXATTRS_UNSPECIFIED);
>
> return num_done;
> }
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index 1785d7e1f79..987d76e72ae 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -604,8 +604,8 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
> s->blkcnt--;
> }
> }
> - dma_memory_write(s->dma_as, s->sdmasysad,
> - &s->fifo_buffer[begin], s->data_count - begin);
> + dma_memory_write(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin],
> + s->data_count - begin, MEMTXATTRS_UNSPECIFIED);
> s->sdmasysad += s->data_count - begin;
> if (s->data_count == block_size) {
> s->data_count = 0;
> @@ -626,8 +626,8 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
> s->data_count = block_size;
> boundary_count -= block_size - begin;
> }
> - dma_memory_read(s->dma_as, s->sdmasysad,
> - &s->fifo_buffer[begin], s->data_count - begin);
> + dma_memory_read(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin],
> + s->data_count - begin, MEMTXATTRS_UNSPECIFIED);
> s->sdmasysad += s->data_count - begin;
> if (s->data_count == block_size) {
> sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
> @@ -659,9 +659,11 @@ static void sdhci_sdma_transfer_single_block(SDHCIState *s)
>
> if (s->trnmod & SDHC_TRNS_READ) {
> sdbus_read_data(&s->sdbus, s->fifo_buffer, datacnt);
> - dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
> + dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt,
> + MEMTXATTRS_UNSPECIFIED);
> } else {
> - dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
> + dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt,
> + MEMTXATTRS_UNSPECIFIED);
> sdbus_write_data(&s->sdbus, s->fifo_buffer, datacnt);
> }
> s->blkcnt--;
> @@ -683,7 +685,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
> hwaddr entry_addr = (hwaddr)s->admasysaddr;
> switch (SDHC_DMA_TYPE(s->hostctl1)) {
> case SDHC_CTRL_ADMA2_32:
> - dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2));
> + dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2),
> + MEMTXATTRS_UNSPECIFIED);
> adma2 = le64_to_cpu(adma2);
> /* The spec does not specify endianness of descriptor table.
> * We currently assume that it is LE.
> @@ -694,7 +697,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
> dscr->incr = 8;
> break;
> case SDHC_CTRL_ADMA1_32:
> - dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1));
> + dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1),
> + MEMTXATTRS_UNSPECIFIED);
> adma1 = le32_to_cpu(adma1);
> dscr->addr = (hwaddr)(adma1 & 0xFFFFF000);
> dscr->attr = (uint8_t)extract32(adma1, 0, 7);
> @@ -706,10 +710,13 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
> }
> break;
> case SDHC_CTRL_ADMA2_64:
> - dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1);
> - dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2);
> + dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1,
> + MEMTXATTRS_UNSPECIFIED);
> + dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2,
> + MEMTXATTRS_UNSPECIFIED);
> dscr->length = le16_to_cpu(dscr->length);
> - dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8);
> + dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8,
> + MEMTXATTRS_UNSPECIFIED);
> dscr->addr = le64_to_cpu(dscr->addr);
> dscr->attr &= (uint8_t) ~0xC0;
> dscr->incr = 12;
> @@ -767,7 +774,8 @@ static void sdhci_do_adma(SDHCIState *s)
> }
> dma_memory_write(s->dma_as, dscr.addr,
> &s->fifo_buffer[begin],
> - s->data_count - begin);
> + s->data_count - begin,
> + MEMTXATTRS_UNSPECIFIED);
> dscr.addr += s->data_count - begin;
> if (s->data_count == block_size) {
> s->data_count = 0;
> @@ -791,7 +799,8 @@ static void sdhci_do_adma(SDHCIState *s)
> }
> dma_memory_read(s->dma_as, dscr.addr,
> &s->fifo_buffer[begin],
> - s->data_count - begin);
> + s->data_count - begin,
> + MEMTXATTRS_UNSPECIFIED);
> dscr.addr += s->data_count - begin;
> if (s->data_count == block_size) {
> sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
> diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c
> index 97688d21bf0..fe684f92b7a 100644
> --- a/hw/usb/hcd-dwc2.c
> +++ b/hw/usb/hcd-dwc2.c
> @@ -261,8 +261,8 @@ static void dwc2_handle_packet(DWC2State *s, uint32_t devadr, USBDevice *dev,
>
> if (pid != USB_TOKEN_IN) {
> trace_usb_dwc2_memory_read(hcdma, tlen);
> - if (dma_memory_read(&s->dma_as, hcdma,
> - s->usb_buf[chan], tlen) != MEMTX_OK) {
> + if (dma_memory_read(&s->dma_as, hcdma, s->usb_buf[chan], tlen,
> + MEMTXATTRS_UNSPECIFIED) != MEMTX_OK) {
> qemu_log_mask(LOG_GUEST_ERROR, "%s: dma_memory_read failed\n",
> __func__);
> }
> @@ -317,8 +317,8 @@ babble:
>
> if (pid == USB_TOKEN_IN) {
> trace_usb_dwc2_memory_write(hcdma, actual);
> - if (dma_memory_write(&s->dma_as, hcdma, s->usb_buf[chan],
> - actual) != MEMTX_OK) {
> + if (dma_memory_write(&s->dma_as, hcdma, s->usb_buf[chan], actual,
> + MEMTXATTRS_UNSPECIFIED) != MEMTX_OK) {
> qemu_log_mask(LOG_GUEST_ERROR, "%s: dma_memory_write failed\n",
> __func__);
> }
> diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
> index 2b995443fbf..03ea5279f9b 100644
> --- a/hw/usb/hcd-ehci.c
> +++ b/hw/usb/hcd-ehci.c
> @@ -383,7 +383,8 @@ static inline int get_dwords(EHCIState *ehci, uint32_t addr,
> }
>
> for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
> - dma_memory_read(ehci->as, addr, buf, sizeof(*buf));
> + dma_memory_read(ehci->as, addr, buf, sizeof(*buf),
> + MEMTXATTRS_UNSPECIFIED);
> *buf = le32_to_cpu(*buf);
> }
>
> @@ -405,7 +406,8 @@ static inline int put_dwords(EHCIState *ehci, uint32_t addr,
>
> for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
> uint32_t tmp = cpu_to_le32(*buf);
> - dma_memory_write(ehci->as, addr, &tmp, sizeof(tmp));
> + dma_memory_write(ehci->as, addr, &tmp, sizeof(tmp),
> + MEMTXATTRS_UNSPECIFIED);
> }
>
> return num;
> diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
> index bac1adf439c..3df6a141b5f 100644
> --- a/hw/usb/hcd-ohci.c
> +++ b/hw/usb/hcd-ohci.c
> @@ -452,7 +452,8 @@ static inline int get_dwords(OHCIState *ohci,
> addr += ohci->localmem_base;
>
> for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
> - if (dma_memory_read(ohci->as, addr, buf, sizeof(*buf))) {
> + if (dma_memory_read(ohci->as, addr,
> + buf, sizeof(*buf), MEMTXATTRS_UNSPECIFIED)) {
> return -1;
> }
> *buf = le32_to_cpu(*buf);
> @@ -471,7 +472,8 @@ static inline int put_dwords(OHCIState *ohci,
>
> for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
> uint32_t tmp = cpu_to_le32(*buf);
> - if (dma_memory_write(ohci->as, addr, &tmp, sizeof(tmp))) {
> + if (dma_memory_write(ohci->as, addr,
> + &tmp, sizeof(tmp), MEMTXATTRS_UNSPECIFIED)) {
> return -1;
> }
> }
> @@ -488,7 +490,8 @@ static inline int get_words(OHCIState *ohci,
> addr += ohci->localmem_base;
>
> for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
> - if (dma_memory_read(ohci->as, addr, buf, sizeof(*buf))) {
> + if (dma_memory_read(ohci->as, addr,
> + buf, sizeof(*buf), MEMTXATTRS_UNSPECIFIED)) {
> return -1;
> }
> *buf = le16_to_cpu(*buf);
> @@ -507,7 +510,8 @@ static inline int put_words(OHCIState *ohci,
>
> for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {
> uint16_t tmp = cpu_to_le16(*buf);
> - if (dma_memory_write(ohci->as, addr, &tmp, sizeof(tmp))) {
> + if (dma_memory_write(ohci->as, addr,
> + &tmp, sizeof(tmp), MEMTXATTRS_UNSPECIFIED)) {
> return -1;
> }
> }
> @@ -537,8 +541,8 @@ static inline int ohci_read_iso_td(OHCIState *ohci,
> static inline int ohci_read_hcca(OHCIState *ohci,
> dma_addr_t addr, struct ohci_hcca *hcca)
> {
> - return dma_memory_read(ohci->as, addr + ohci->localmem_base,
> - hcca, sizeof(*hcca));
> + return dma_memory_read(ohci->as, addr + ohci->localmem_base, hcca,
> + sizeof(*hcca), MEMTXATTRS_UNSPECIFIED);
> }
>
> static inline int ohci_put_ed(OHCIState *ohci,
> @@ -572,7 +576,7 @@ static inline int ohci_put_hcca(OHCIState *ohci,
> return dma_memory_write(ohci->as,
> addr + ohci->localmem_base + HCCA_WRITEBACK_OFFSET,
> (char *)hcca + HCCA_WRITEBACK_OFFSET,
> - HCCA_WRITEBACK_SIZE);
> + HCCA_WRITEBACK_SIZE, MEMTXATTRS_UNSPECIFIED);
> }
>
> /* Read/Write the contents of a TD from/to main memory. */
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 13/13] dma: Let dma_memory_map() take MemTxAttrs argument
2020-09-04 15:44 ` [PATCH 13/13] dma: Let dma_memory_map() " Philippe Mathieu-Daudé
2020-09-06 4:05 ` Richard Henderson
@ 2020-09-07 1:18 ` Li Qiang
1 sibling, 0 replies; 45+ messages in thread
From: Li Qiang @ 2020-09-07 1:18 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Qemu Developers, Peter Xu, Gerd Hoffmann, Edgar E. Iglesias,
qemu-block, Peter Chubb, Joel Stanley, Richard Henderson,
Laszlo Ersek, Eduardo Habkost, Alistair Francis,
Beniamino Galvani, Eric Auger, qemu-arm, Jan Kiszka,
Cédric Le Goater, John Snow, David Gibson, Andrew Jeffery,
Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> 于2020年9月4日周五 下午11:52写道：
>
> Let devices specify transaction attributes when calling
> dma_memory_map().
>
> Patch created mechanically using spatch with this script:
>
> @@
> expression E1, E2, E3, E4;
> @@
> - dma_memory_map(E1, E2, E3, E4)
> + dma_memory_map(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
> ---
> include/hw/pci/pci.h | 3 ++-
> include/sysemu/dma.h | 5 +++--
> dma-helpers.c | 3 ++-
> hw/display/virtio-gpu.c | 8 ++++++--
> hw/hyperv/vmbus.c | 8 +++++---
> hw/ide/ahci.c | 9 ++++++---
> hw/usb/libhw.c | 3 ++-
> hw/virtio/virtio.c | 6 ++++--
> 8 files changed, 30 insertions(+), 15 deletions(-)
>
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 0c3217e019c..a221dfb3b08 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -831,7 +831,8 @@ static inline void *pci_dma_map(PCIDevice *dev, dma_addr_t addr,
> {
> void *buf;
>
> - buf = dma_memory_map(pci_get_address_space(dev), addr, plen, dir);
> + buf = dma_memory_map(pci_get_address_space(dev), addr, plen, dir,
> + MEMTXATTRS_UNSPECIFIED);
> return buf;
> }
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index b9cb9c8944b..bb8b0a059f5 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -203,16 +203,17 @@ MemTxResult dma_memory_set(AddressSpace *as, dma_addr_t addr,
> * @addr: address within that address space
> * @len: pointer to length of buffer; updated on return
> * @dir: indicates the transfer direction
> + * @attrs: memory attributes
> */
> static inline void *dma_memory_map(AddressSpace *as,
> dma_addr_t addr, dma_addr_t *len,
> - DMADirection dir)
> + DMADirection dir, MemTxAttrs attrs)
> {
> hwaddr xlen = *len;
> void *p;
>
> p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE,
> - MEMTXATTRS_UNSPECIFIED);
> + attrs);
> *len = xlen;
> return p;
> }
> diff --git a/dma-helpers.c b/dma-helpers.c
> index 6c3b2200f16..0507a6f95b9 100644
> --- a/dma-helpers.c
> +++ b/dma-helpers.c
> @@ -143,7 +143,8 @@ static void dma_blk_cb(void *opaque, int ret)
> while (dbs->sg_cur_index < dbs->sg->nsg) {
> cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
> cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
> - mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir);
> + mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir,
> + MEMTXATTRS_UNSPECIFIED);
> /*
> * Make reads deterministic in icount mode. Windows sometimes issues
> * disk read requests with overlapping SGs. It leads
> diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
> index 5f0dd7c1500..be7f5cdee46 100644
> --- a/hw/display/virtio-gpu.c
> +++ b/hw/display/virtio-gpu.c
> @@ -648,7 +648,9 @@ int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
> hwaddr len = l;
> (*iov)[i].iov_len = l;
> (*iov)[i].iov_base = dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
> - a, &len, DMA_DIRECTION_TO_DEVICE);
> + a, &len,
> + DMA_DIRECTION_TO_DEVICE,
> + MEMTXATTRS_UNSPECIFIED);
> if (addr) {
> (*addr)[i] = a;
> }
> @@ -1049,7 +1051,9 @@ static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
> hwaddr len = res->iov[i].iov_len;
> res->iov[i].iov_base =
> dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
> - res->addrs[i], &len, DMA_DIRECTION_TO_DEVICE);
> + res->addrs[i], &len,
> + DMA_DIRECTION_TO_DEVICE,
> + MEMTXATTRS_UNSPECIFIED);
>
> if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
> /* Clean up the half-a-mapping we just created... */
> diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c
> index 75af6b83dde..56621d72e5b 100644
> --- a/hw/hyperv/vmbus.c
> +++ b/hw/hyperv/vmbus.c
> @@ -372,7 +372,8 @@ static ssize_t gpadl_iter_io(GpadlIter *iter, void *buf, uint32_t len)
>
> maddr = (iter->gpadl->gfns[idx] << TARGET_PAGE_BITS) | off_in_page;
>
> - iter->map = dma_memory_map(iter->as, maddr, &mlen, iter->dir);
> + iter->map = dma_memory_map(iter->as, maddr, &mlen, iter->dir,
> + MEMTXATTRS_UNSPECIFIED);
> if (mlen != pgleft) {
> dma_memory_unmap(iter->as, iter->map, mlen, iter->dir, 0);
> iter->map = NULL;
> @@ -488,7 +489,8 @@ int vmbus_map_sgl(VMBusChanReq *req, DMADirection dir, struct iovec *iov,
> goto err;
> }
>
> - iov[ret_cnt].iov_base = dma_memory_map(sgl->as, a, &l, dir);
> + iov[ret_cnt].iov_base = dma_memory_map(sgl->as, a, &l, dir,
> + MEMTXATTRS_UNSPECIFIED);
> if (!l) {
> ret = -EFAULT;
> goto err;
> @@ -564,7 +566,7 @@ static vmbus_ring_buffer *ringbuf_map_hdr(VMBusRingBufCommon *ringbuf)
> dma_addr_t mlen = sizeof(*rb);
>
> rb = dma_memory_map(ringbuf->as, ringbuf->rb_addr, &mlen,
> - DMA_DIRECTION_FROM_DEVICE);
> + DMA_DIRECTION_FROM_DEVICE, MEMTXATTRS_UNSPECIFIED);
> if (mlen != sizeof(*rb)) {
> dma_memory_unmap(ringbuf->as, rb, mlen,
> DMA_DIRECTION_FROM_DEVICE, 0);
> diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
> index b696c6291a3..fe1a4e2b1a2 100644
> --- a/hw/ide/ahci.c
> +++ b/hw/ide/ahci.c
> @@ -249,7 +249,8 @@ static void map_page(AddressSpace *as, uint8_t **ptr, uint64_t addr,
> dma_memory_unmap(as, *ptr, len, DMA_DIRECTION_FROM_DEVICE, len);
> }
>
> - *ptr = dma_memory_map(as, addr, &len, DMA_DIRECTION_FROM_DEVICE);
> + *ptr = dma_memory_map(as, addr, &len, DMA_DIRECTION_FROM_DEVICE,
> + MEMTXATTRS_UNSPECIFIED);
> if (len < wanted) {
> dma_memory_unmap(as, *ptr, len, DMA_DIRECTION_FROM_DEVICE, len);
> *ptr = NULL;
> @@ -938,7 +939,8 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist,
>
> /* map PRDT */
> if (!(prdt = dma_memory_map(ad->hba->as, prdt_addr, &prdt_len,
> - DMA_DIRECTION_TO_DEVICE))){
> + DMA_DIRECTION_TO_DEVICE,
> + MEMTXATTRS_UNSPECIFIED))) {
> trace_ahci_populate_sglist_no_map(ad->hba, ad->port_no);
> return -1;
> }
> @@ -1299,7 +1301,8 @@ static int handle_cmd(AHCIState *s, int port, uint8_t slot)
> tbl_addr = le64_to_cpu(cmd->tbl_addr);
> cmd_len = 0x80;
> cmd_fis = dma_memory_map(s->as, tbl_addr, &cmd_len,
> - DMA_DIRECTION_FROM_DEVICE);
> + DMA_DIRECTION_FROM_DEVICE,
> + MEMTXATTRS_UNSPECIFIED);
> if (!cmd_fis) {
> trace_handle_cmd_badfis(s, port);
> return -1;
> diff --git a/hw/usb/libhw.c b/hw/usb/libhw.c
> index 9c33a1640f7..f350eae443d 100644
> --- a/hw/usb/libhw.c
> +++ b/hw/usb/libhw.c
> @@ -36,7 +36,8 @@ int usb_packet_map(USBPacket *p, QEMUSGList *sgl)
>
> while (len) {
> dma_addr_t xlen = len;
> - mem = dma_memory_map(sgl->as, base, &xlen, dir);
> + mem = dma_memory_map(sgl->as, base, &xlen, dir,
> + MEMTXATTRS_UNSPECIFIED);
> if (!mem) {
> goto err;
> }
> diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
> index e9830252176..c951131ba39 100644
> --- a/hw/virtio/virtio.c
> +++ b/hw/virtio/virtio.c
> @@ -1320,7 +1320,8 @@ static bool virtqueue_map_desc(VirtIODevice *vdev, unsigned int *p_num_sg,
> iov[num_sg].iov_base = dma_memory_map(vdev->dma_as, pa, &len,
> is_write ?
> DMA_DIRECTION_FROM_DEVICE :
> - DMA_DIRECTION_TO_DEVICE);
> + DMA_DIRECTION_TO_DEVICE,
> + MEMTXATTRS_UNSPECIFIED);
> if (!iov[num_sg].iov_base) {
> virtio_error(vdev, "virtio: bogus descriptor or out of resources");
> goto out;
> @@ -1369,7 +1370,8 @@ static void virtqueue_map_iovec(VirtIODevice *vdev, struct iovec *sg,
> sg[i].iov_base = dma_memory_map(vdev->dma_as,
> addr[i], &len, is_write ?
> DMA_DIRECTION_FROM_DEVICE :
> - DMA_DIRECTION_TO_DEVICE);
> + DMA_DIRECTION_TO_DEVICE,
> + MEMTXATTRS_UNSPECIFIED);
> if (!sg[i].iov_base) {
> error_report("virtio: error trying to map MMIO memory");
> exit(1);
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 03/13] dma: Document address_space_map/address_space_unmap() prototypes
2020-09-04 15:44 ` [PATCH 03/13] dma: Document address_space_map/address_space_unmap() prototypes Philippe Mathieu-Daudé
2020-09-06 3:47 ` Richard Henderson
@ 2020-09-07 6:55 ` Edgar E. Iglesias
1 sibling, 0 replies; 45+ messages in thread
From: Edgar E. Iglesias @ 2020-09-07 6:55 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
qemu-devel, Peter Xu, Gerd Hoffmann, qemu-block, Peter Chubb,
Joel Stanley, David Gibson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, Richard Henderson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
On Fri, Sep 04, 2020 at 05:44:29PM +0200, Philippe Mathieu-Daudé wrote:
> Add documentation based on address_space_map / address_space_unmap.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/sysemu/dma.h | 30 +++++++++++++++++++++++++++++-
> 1 file changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
> index 80c5bc3e02d..19bc9ad1b69 100644
> --- a/include/sysemu/dma.h
> +++ b/include/sysemu/dma.h
> @@ -1,7 +1,7 @@
> /*
> * DMA helper functions
> *
> - * Copyright (c) 2009 Red Hat
> + * Copyright (c) 2009, 2020 Red Hat
> *
> * This work is licensed under the terms of the GNU General Public License
> * (GNU GPL), version 2 or later.
> @@ -125,6 +125,20 @@ static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
>
> int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
>
> +/**
> + * address_space_map: Map a physical memory region into a DMA controller
> + * virtual address
It may be easier to understand this if you change DMA controller virtual address
to host virtual address.
Either way:
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> + *
> + * May map a subset of the requested range, given by and returned in @plen.
> + * May return %NULL and set *@plen to zero(0), if resources needed to perform
> + * the mapping are exhausted.
> + * Use only for reads OR writes - not for read-modify-write operations.
> + *
> + * @as: #AddressSpace to be accessed
> + * @addr: address within that address space
> + * @len: pointer to length of buffer; updated on return
> + * @dir: indicates the transfer direction
> + */
> static inline void *dma_memory_map(AddressSpace *as,
> dma_addr_t addr, dma_addr_t *len,
> DMADirection dir)
> @@ -138,6 +152,20 @@ static inline void *dma_memory_map(AddressSpace *as,
> return p;
> }
>
> +/**
> + * address_space_unmap: Unmaps a memory region previously mapped
> + * by dma_memory_map()
> + *
> + * Will also mark the memory as dirty if @dir == %DMA_DIRECTION_FROM_DEVICE.
> + * @access_len gives the amount of memory that was actually read or written
> + * by the caller.
> + *
> + * @as: #AddressSpace used
> + * @buffer: host pointer as returned by address_space_map()
> + * @len: buffer length as returned by address_space_map()
> + * @dir: indicates the transfer direction
> + * @access_len: amount of data actually transferred
> + */
> static inline void dma_memory_unmap(AddressSpace *as,
> void *buffer, dma_addr_t len,
> DMADirection dir, dma_addr_t access_len)
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2020-09-04 15:44 ` [PATCH 13/13] dma: Let dma_memory_map() " Philippe Mathieu-Daudé
@ 2020-09-07 6:55 ` Edgar E. Iglesias
2020-09-15 17:28 ` Philippe Mathieu-Daudé
` (2 subsequent siblings)
16 siblings, 0 replies; 45+ messages in thread
From: Edgar E. Iglesias @ 2020-09-07 6:55 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
qemu-devel, Peter Xu, Gerd Hoffmann, qemu-block, Peter Chubb,
Joel Stanley, David Gibson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, Richard Henderson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Paolo Bonzini
On Fri, Sep 04, 2020 at 05:44:26PM +0200, Philippe Mathieu-Daudé wrote:
> Salvaging cleanups patches from the RFC series "Forbid DMA write
> accesses to MMIO regions" [*], propagating MemTxResult and
> adding documentation.
>
> [*] https://www.mail-archive.com/qemu-block@nongnu.org/msg72924.html
On the whole series:
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
>
> Klaus Jensen (1):
> pci: pass along the return value of dma_memory_rw
>
> Philippe Mathieu-Daudé (12):
> docs/devel/loads-stores: Add regexp for DMA functions
> dma: Document address_space_map/address_space_unmap() prototypes
> dma: Let dma_memory_set() propagate MemTxResult
> dma: Let dma_memory_rw() propagate MemTxResult
> dma: Let dma_memory_read() propagate MemTxResult
> dma: Let dma_memory_write() propagate MemTxResult
> dma: Let dma_memory_valid() take MemTxAttrs argument
> dma: Let dma_memory_set() take MemTxAttrs argument
> dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument
> dma: Let dma_memory_rw() take MemTxAttrs argument
> dma: Let dma_memory_read/write() take MemTxAttrs argument
> dma: Let dma_memory_map() take MemTxAttrs argument
>
> docs/devel/loads-stores.rst | 2 +
> include/hw/pci/pci.h | 7 +-
> include/hw/ppc/spapr_vio.h | 11 ++-
> include/sysemu/dma.h | 156 +++++++++++++++++++++++++++-------
> dma-helpers.c | 16 ++--
> hw/arm/musicpal.c | 13 +--
> hw/arm/smmu-common.c | 3 +-
> hw/arm/smmuv3.c | 14 +--
> hw/core/generic-loader.c | 3 +-
> hw/display/virtio-gpu.c | 8 +-
> hw/dma/pl330.c | 12 ++-
> hw/dma/sparc32_dma.c | 16 ++--
> hw/dma/xlnx-zynq-devcfg.c | 6 +-
> hw/dma/xlnx_dpdma.c | 10 ++-
> hw/hyperv/vmbus.c | 8 +-
> hw/i386/amd_iommu.c | 16 ++--
> hw/i386/intel_iommu.c | 28 +++---
> hw/ide/ahci.c | 9 +-
> hw/ide/macio.c | 2 +-
> hw/intc/spapr_xive.c | 3 +-
> hw/intc/xive.c | 7 +-
> hw/misc/bcm2835_property.c | 3 +-
> hw/misc/macio/mac_dbdma.c | 10 ++-
> hw/net/allwinner-sun8i-emac.c | 21 +++--
> hw/net/ftgmac100.c | 25 ++++--
> hw/net/imx_fec.c | 32 ++++---
> hw/nvram/fw_cfg.c | 12 ++-
> hw/pci-host/pnv_phb3.c | 5 +-
> hw/pci-host/pnv_phb3_msi.c | 9 +-
> hw/pci-host/pnv_phb4.c | 7 +-
> hw/sd/allwinner-sdhost.c | 14 +--
> hw/sd/sdhci.c | 35 +++++---
> hw/usb/hcd-dwc2.c | 8 +-
> hw/usb/hcd-ehci.c | 6 +-
> hw/usb/hcd-ohci.c | 28 +++---
> hw/usb/libhw.c | 3 +-
> hw/virtio/virtio.c | 6 +-
> 37 files changed, 385 insertions(+), 189 deletions(-)
>
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2020-09-07 6:55 ` [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Edgar E. Iglesias
@ 2020-09-15 17:28 ` Philippe Mathieu-Daudé
2020-09-16 13:48 ` Philippe Mathieu-Daudé
2020-09-23 15:24 ` John Snow
16 siblings, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-15 17:28 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, John Snow, Richard Henderson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
This series is fully review.
Paolo, does it belong to your tree?
On 9/4/20 5:44 PM, Philippe Mathieu-Daudé wrote:
> Salvaging cleanups patches from the RFC series "Forbid DMA write
> accesses to MMIO regions" [*], propagating MemTxResult and
> adding documentation.
>
> [*] https://www.mail-archive.com/qemu-block@nongnu.org/msg72924.html
>
> Klaus Jensen (1):
> pci: pass along the return value of dma_memory_rw
>
> Philippe Mathieu-Daudé (12):
> docs/devel/loads-stores: Add regexp for DMA functions
> dma: Document address_space_map/address_space_unmap() prototypes
> dma: Let dma_memory_set() propagate MemTxResult
> dma: Let dma_memory_rw() propagate MemTxResult
> dma: Let dma_memory_read() propagate MemTxResult
> dma: Let dma_memory_write() propagate MemTxResult
> dma: Let dma_memory_valid() take MemTxAttrs argument
> dma: Let dma_memory_set() take MemTxAttrs argument
> dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument
> dma: Let dma_memory_rw() take MemTxAttrs argument
> dma: Let dma_memory_read/write() take MemTxAttrs argument
> dma: Let dma_memory_map() take MemTxAttrs argument
>
> docs/devel/loads-stores.rst | 2 +
> include/hw/pci/pci.h | 7 +-
> include/hw/ppc/spapr_vio.h | 11 ++-
> include/sysemu/dma.h | 156 +++++++++++++++++++++++++++-------
> dma-helpers.c | 16 ++--
> hw/arm/musicpal.c | 13 +--
> hw/arm/smmu-common.c | 3 +-
> hw/arm/smmuv3.c | 14 +--
> hw/core/generic-loader.c | 3 +-
> hw/display/virtio-gpu.c | 8 +-
> hw/dma/pl330.c | 12 ++-
> hw/dma/sparc32_dma.c | 16 ++--
> hw/dma/xlnx-zynq-devcfg.c | 6 +-
> hw/dma/xlnx_dpdma.c | 10 ++-
> hw/hyperv/vmbus.c | 8 +-
> hw/i386/amd_iommu.c | 16 ++--
> hw/i386/intel_iommu.c | 28 +++---
> hw/ide/ahci.c | 9 +-
> hw/ide/macio.c | 2 +-
> hw/intc/spapr_xive.c | 3 +-
> hw/intc/xive.c | 7 +-
> hw/misc/bcm2835_property.c | 3 +-
> hw/misc/macio/mac_dbdma.c | 10 ++-
> hw/net/allwinner-sun8i-emac.c | 21 +++--
> hw/net/ftgmac100.c | 25 ++++--
> hw/net/imx_fec.c | 32 ++++---
> hw/nvram/fw_cfg.c | 12 ++-
> hw/pci-host/pnv_phb3.c | 5 +-
> hw/pci-host/pnv_phb3_msi.c | 9 +-
> hw/pci-host/pnv_phb4.c | 7 +-
> hw/sd/allwinner-sdhost.c | 14 +--
> hw/sd/sdhci.c | 35 +++++---
> hw/usb/hcd-dwc2.c | 8 +-
> hw/usb/hcd-ehci.c | 6 +-
> hw/usb/hcd-ohci.c | 28 +++---
> hw/usb/libhw.c | 3 +-
> hw/virtio/virtio.c | 6 +-
> 37 files changed, 385 insertions(+), 189 deletions(-)
>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (14 preceding siblings ...)
2020-09-15 17:28 ` Philippe Mathieu-Daudé
@ 2020-09-16 13:48 ` Philippe Mathieu-Daudé
2020-09-16 23:10 ` Edgar E. Iglesias
2020-09-23 15:24 ` John Snow
16 siblings, 1 reply; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-16 13:48 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini, Laszlo Ersek, Jason Wang,
Michael S. Tsirkin, Jan Kiszka, Eric Auger, Peter Maydell
Cc: Andrew Baumann, Peter Chubb, Eduardo Habkost, qemu-block,
Andrew Jeffery, Li Qiang, Alistair Francis, Mark Cave-Ayland,
Joel Stanley, Peter Xu, Beniamino Galvani, Cédric Le Goater,
qemu-arm, qemu-ppc, Gerd Hoffmann, Edgar E. Iglesias,
Richard Henderson, John Snow, David Gibson
On 9/4/20 5:44 PM, Philippe Mathieu-Daudé wrote:
> Salvaging cleanups patches from the RFC series "Forbid DMA write
> accesses to MMIO regions" [*], propagating MemTxResult and
> adding documentation.
>
> Philippe Mathieu-Daudé (12):
> dma: Let dma_memory_valid() take MemTxAttrs argument
> dma: Let dma_memory_set() take MemTxAttrs argument
> dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument
> dma: Let dma_memory_rw() take MemTxAttrs argument
> dma: Let dma_memory_read/write() take MemTxAttrs argument
> dma: Let dma_memory_map() take MemTxAttrs argument
Talking with Laszlo, he wonders if we shouldn't enforce setting
MemTxAttrs attrs.secure = 0 in these calls.
Is there a concept of "secure DMA controller" in QEMU?
Thanks,
Phil.
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult
2020-09-16 13:48 ` Philippe Mathieu-Daudé
@ 2020-09-16 23:10 ` Edgar E. Iglesias
0 siblings, 0 replies; 45+ messages in thread
From: Edgar E. Iglesias @ 2020-09-16 23:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
qemu-devel, Peter Xu, Gerd Hoffmann, qemu-block, Li Qiang,
Peter Chubb, Joel Stanley, David Gibson, Laszlo Ersek,
Eduardo Habkost, Alistair Francis, Beniamino Galvani, Eric Auger,
qemu-arm, Jan Kiszka, Cédric Le Goater, John Snow,
Richard Henderson, Andrew Jeffery, Andrew Baumann, qemu-ppc,
Paolo Bonzini
[-- Attachment #1: Type: text/plain, Size: 1233 bytes --]
On Wed, 16 Sep 2020, 15:48 Philippe Mathieu-Daudé, <philmd@redhat.com>
wrote:
> On 9/4/20 5:44 PM, Philippe Mathieu-Daudé wrote:
> > Salvaging cleanups patches from the RFC series "Forbid DMA write
> > accesses to MMIO regions" [*], propagating MemTxResult and
> > adding documentation.
> >
> > Philippe Mathieu-Daudé (12):
> > dma: Let dma_memory_valid() take MemTxAttrs argument
> > dma: Let dma_memory_set() take MemTxAttrs argument
> > dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument
> > dma: Let dma_memory_rw() take MemTxAttrs argument
> > dma: Let dma_memory_read/write() take MemTxAttrs argument
> > dma: Let dma_memory_map() take MemTxAttrs argument
>
> Talking with Laszlo, he wonders if we shouldn't enforce setting
> MemTxAttrs attrs.secure = 0 in these calls.
>
> Is there a concept of "secure DMA controller" in QEMU?
>
> Thanks,
>
> Phil.
>
Hi,
Yes, we have models of secure DMA devices out of tree. Actually, on the
ZynqMP and Versal SoCs, there are secure registers that can configure any
DMA device to issue secure or non-secure transactions at runtime. We just
haven't modelled all of the control regs that allow that in upstream QEMU.
Cheers,
Edgar
[-- Attachment #2: Type: text/html, Size: 1994 bytes --]
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
` (15 preceding siblings ...)
2020-09-16 13:48 ` Philippe Mathieu-Daudé
@ 2020-09-23 15:24 ` John Snow
2020-09-23 16:46 ` Philippe Mathieu-Daudé
16 siblings, 1 reply; 45+ messages in thread
From: John Snow @ 2020-09-23 15:24 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, Richard Henderson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/4/20 11:44 AM, Philippe Mathieu-Daudé wrote:
> Salvaging cleanups patches from the RFC series "Forbid DMA write
> accesses to MMIO regions" [*], propagating MemTxResult and
> adding documentation.
>
> [*] https://www.mail-archive.com/qemu-block@nongnu.org/msg72924.html
>
> Klaus Jensen (1):
> pci: pass along the return value of dma_memory_rw
>
Paolo is on PTO. Are we waiting for him to merge this?
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult
2020-09-23 15:24 ` John Snow
@ 2020-09-23 16:46 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-23 16:46 UTC (permalink / raw)
To: John Snow, qemu-devel, Paolo Bonzini
Cc: Peter Maydell, Michael S. Tsirkin, Jason Wang, Mark Cave-Ayland,
Peter Xu, Gerd Hoffmann, Edgar E. Iglesias, qemu-block,
Joel Stanley, David Gibson, Laszlo Ersek, Eduardo Habkost,
Alistair Francis, Beniamino Galvani, Eric Auger, qemu-arm,
Jan Kiszka, Cédric Le Goater, Richard Henderson,
Andrew Jeffery, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-ppc, Peter Chubb
On 9/23/20 5:24 PM, John Snow wrote:
> On 9/4/20 11:44 AM, Philippe Mathieu-Daudé wrote:
>> Salvaging cleanups patches from the RFC series "Forbid DMA write
>> accesses to MMIO regions" [*], propagating MemTxResult and
>> adding documentation.
>>
>> [*] https://www.mail-archive.com/qemu-block@nongnu.org/msg72924.html
>>
>> Klaus Jensen (1):
>> pci: pass along the return value of dma_memory_rw
>>
>
> Paolo is on PTO. Are we waiting for him to merge this?
I think so. This series now needs a rebase due to a change
in hw/display/virtio-gpu.c. I'll respin when Paolo is back
(or someone willing to queue this).
Regards,
Phil.
^ permalink raw reply [flat|nested] 45+ messages in thread
end of thread, other threads:[~2020-09-23 16:48 UTC | newest]
Thread overview: 45+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-04 15:44 [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Philippe Mathieu-Daudé
2020-09-04 15:44 ` [PATCH 01/13] pci: pass along the return value of dma_memory_rw Philippe Mathieu-Daudé
2020-09-06 3:45 ` Richard Henderson
2020-09-07 1:00 ` Li Qiang
2020-09-04 15:44 ` [PATCH 02/13] docs/devel/loads-stores: Add regexp for DMA functions Philippe Mathieu-Daudé
2020-09-06 3:45 ` Richard Henderson
2020-09-04 15:44 ` [PATCH 03/13] dma: Document address_space_map/address_space_unmap() prototypes Philippe Mathieu-Daudé
2020-09-06 3:47 ` Richard Henderson
2020-09-07 6:55 ` Edgar E. Iglesias
2020-09-04 15:44 ` [PATCH 04/13] dma: Let dma_memory_set() propagate MemTxResult Philippe Mathieu-Daudé
2020-09-06 3:55 ` Richard Henderson
2020-09-07 1:05 ` Li Qiang
2020-09-04 15:44 ` [PATCH 05/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
2020-09-06 3:57 ` Richard Henderson
2020-09-07 1:06 ` Li Qiang
2020-09-04 15:44 ` [PATCH 06/13] dma: Let dma_memory_read() " Philippe Mathieu-Daudé
2020-09-06 3:58 ` Richard Henderson
2020-09-07 1:06 ` Li Qiang
2020-09-04 15:44 ` [PATCH 07/13] dma: Let dma_memory_write() " Philippe Mathieu-Daudé
2020-09-06 3:58 ` Richard Henderson
2020-09-07 1:07 ` Li Qiang
2020-09-04 15:44 ` [PATCH 08/13] dma: Let dma_memory_valid() take MemTxAttrs argument Philippe Mathieu-Daudé
2020-09-06 3:59 ` Richard Henderson
2020-09-07 1:11 ` Li Qiang
2020-09-04 15:44 ` [PATCH 09/13] dma: Let dma_memory_set() " Philippe Mathieu-Daudé
2020-09-06 4:00 ` Richard Henderson
2020-09-07 1:13 ` Li Qiang
2020-09-04 15:44 ` [PATCH 10/13] dma: Let dma_memory_rw_relaxed() " Philippe Mathieu-Daudé
2020-09-06 4:01 ` Richard Henderson
2020-09-07 1:14 ` Li Qiang
2020-09-04 15:44 ` [PATCH 11/13] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
2020-09-06 4:02 ` Richard Henderson
2020-09-07 1:16 ` Li Qiang
2020-09-04 15:44 ` [PATCH 12/13] dma: Let dma_memory_read/write() " Philippe Mathieu-Daudé
2020-09-06 4:04 ` Richard Henderson
2020-09-07 1:17 ` Li Qiang
2020-09-04 15:44 ` [PATCH 13/13] dma: Let dma_memory_map() " Philippe Mathieu-Daudé
2020-09-06 4:05 ` Richard Henderson
2020-09-07 1:18 ` Li Qiang
2020-09-07 6:55 ` [PATCH 00/13] dma: Let the DMA API take MemTxAttrs argument and propagate MemTxResult Edgar E. Iglesias
2020-09-15 17:28 ` Philippe Mathieu-Daudé
2020-09-16 13:48 ` Philippe Mathieu-Daudé
2020-09-16 23:10 ` Edgar E. Iglesias
2020-09-23 15:24 ` John Snow
2020-09-23 16:46 ` Philippe Mathieu-Daudé
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