From: Klaus Jensen <its@irrelevant.dk>
To: qemu-devel@nongnu.org
Cc: Kevin Wolf <kwolf@redhat.com>,
Eduardo Habkost <ehabkost@redhat.com>,
qemu-block@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
Klaus Jensen <k.jensen@samsung.com>,
Gollu Appalanaidu <anaidu.gollu@samsung.com>,
Max Reitz <mreitz@redhat.com>, Klaus Jensen <its@irrelevant.dk>,
Keith Busch <kbusch@kernel.org>
Subject: [PATCH v2 13/17] hw/block/nvme: add support for sgl bit bucket descriptor
Date: Fri, 18 Sep 2020 22:36:17 +0200 [thread overview]
Message-ID: <20200918203621.602915-14-its@irrelevant.dk> (raw)
In-Reply-To: <20200918203621.602915-1-its@irrelevant.dk>
From: Gollu Appalanaidu <anaidu.gollu@samsung.com>
This adds support for SGL descriptor type 0x1 (bit bucket descriptor).
See the NVM Express v1.3d specification, Section 4.4 ("Scatter Gather
List (SGL)").
Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
hw/block/nvme.c | 33 +++++++++++++++++++++++++++------
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index e01b4b22882e..d2e211c7cbc2 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -430,6 +430,10 @@ static uint16_t nvme_map_sgl_data(NvmeCtrl *n, QEMUSGList *qsg,
uint8_t type = NVME_SGL_TYPE(segment[i].type);
switch (type) {
+ case NVME_SGL_DESCR_TYPE_BIT_BUCKET:
+ if (req->cmd.opcode == NVME_CMD_WRITE) {
+ continue;
+ }
case NVME_SGL_DESCR_TYPE_DATA_BLOCK:
break;
case NVME_SGL_DESCR_TYPE_SEGMENT:
@@ -440,6 +444,7 @@ static uint16_t nvme_map_sgl_data(NvmeCtrl *n, QEMUSGList *qsg,
}
dlen = le32_to_cpu(segment[i].len);
+
if (!dlen) {
continue;
}
@@ -460,6 +465,11 @@ static uint16_t nvme_map_sgl_data(NvmeCtrl *n, QEMUSGList *qsg,
}
trans_len = MIN(*len, dlen);
+
+ if (type == NVME_SGL_DESCR_TYPE_BIT_BUCKET) {
+ goto next;
+ }
+
addr = le64_to_cpu(segment[i].addr);
if (UINT64_MAX - addr < dlen) {
@@ -471,6 +481,7 @@ static uint16_t nvme_map_sgl_data(NvmeCtrl *n, QEMUSGList *qsg,
return status;
}
+next:
*len -= trans_len;
}
@@ -540,7 +551,8 @@ static uint16_t nvme_map_sgl(NvmeCtrl *n, QEMUSGList *qsg, QEMUIOVector *iov,
seg_len = le32_to_cpu(sgld->len);
/* check the length of the (Last) Segment descriptor */
- if (!seg_len || seg_len & 0xf) {
+ if ((!seg_len || seg_len & 0xf) &&
+ (NVME_SGL_TYPE(sgld->type) != NVME_SGL_DESCR_TYPE_BIT_BUCKET)) {
return NVME_INVALID_SGL_SEG_DESCR | NVME_DNR;
}
@@ -577,19 +589,27 @@ static uint16_t nvme_map_sgl(NvmeCtrl *n, QEMUSGList *qsg, QEMUIOVector *iov,
last_sgld = &segment[nsgld - 1];
- /* if the segment ends with a Data Block, then we are done */
- if (NVME_SGL_TYPE(last_sgld->type) == NVME_SGL_DESCR_TYPE_DATA_BLOCK) {
+ /*
+ * If the segment ends with a Data Block or Bit Bucket Descriptor Type,
+ * then we are done.
+ */
+ switch (NVME_SGL_TYPE(last_sgld->type)) {
+ case NVME_SGL_DESCR_TYPE_DATA_BLOCK:
+ case NVME_SGL_DESCR_TYPE_BIT_BUCKET:
status = nvme_map_sgl_data(n, qsg, iov, segment, nsgld, &len, req);
if (status) {
goto unmap;
}
goto out;
+
+ default:
+ break;
}
/*
- * If the last descriptor was not a Data Block, then the current
- * segment must not be a Last Segment.
+ * If the last descriptor was not a Data Block or Bit Bucket, then the
+ * current segment must not be a Last Segment.
*/
if (NVME_SGL_TYPE(sgld->type) == NVME_SGL_DESCR_TYPE_LAST_SEGMENT) {
status = NVME_INVALID_SGL_SEG_DESCR | NVME_DNR;
@@ -2654,7 +2674,8 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev)
id->nn = cpu_to_le32(n->num_namespaces);
id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROES | NVME_ONCS_TIMESTAMP |
NVME_ONCS_FEATURES);
- id->sgls = cpu_to_le32(NVME_CTRL_SGLS_SUPPORT_NO_ALIGN);
+ id->sgls = cpu_to_le32(NVME_CTRL_SGLS_SUPPORT_NO_ALIGN |
+ NVME_CTRL_SGLS_BITBUCKET);
subnqn = g_strdup_printf("nqn.2019-08.org.qemu:%s", n->params.serial);
strpadcpy((char *)id->subnqn, sizeof(id->subnqn), subnqn, '\0');
--
2.28.0
next prev parent reply other threads:[~2020-09-18 20:56 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-18 20:36 [PATCH v2 00/17] hw/block/nvme: multiple namespaces support Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 01/17] hw/block/nvme: fix typo in trace event Klaus Jensen
2020-09-21 15:49 ` Philippe Mathieu-Daudé
2020-09-18 20:36 ` [PATCH v2 02/17] pci: pass along the return value of dma_memory_rw Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 03/17] hw/block/nvme: handle dma errors Klaus Jensen
2020-09-21 16:50 ` Keith Busch
2020-09-21 19:47 ` Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 04/17] hw/block/nvme: commonize nvme_rw error handling Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 05/17] hw/block/nvme: alignment style fixes Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 06/17] hw/block/nvme: add a lba to bytes helper Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 07/17] hw/block/nvme: fix endian conversion Klaus Jensen
2020-09-21 15:51 ` Philippe Mathieu-Daudé
2020-09-18 20:36 ` [PATCH v2 08/17] hw/block/nvme: add symbolic command name to trace events Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 09/17] hw/block/nvme: refactor aio submission Klaus Jensen
2020-09-21 15:20 ` Keith Busch
2020-09-21 17:56 ` Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 10/17] hw/block/nvme: default request status to success Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 11/17] hw/block/nvme: harden cmb access Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 12/17] hw/block/nvme: add support for scatter gather lists Klaus Jensen
2020-09-18 20:36 ` Klaus Jensen [this message]
2020-09-18 20:36 ` [PATCH v2 14/17] hw/block/nvme: refactor identify active namespace id list Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 15/17] hw/block/nvme: support multiple namespaces Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 16/17] pci: allocate pci id for nvme Klaus Jensen
2020-09-18 20:36 ` [PATCH v2 17/17] hw/block/nvme: change controller pci id Klaus Jensen
2020-09-21 19:26 ` [PATCH v2 00/17] hw/block/nvme: multiple namespaces support Keith Busch
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