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From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Cornelia Huck <cohuck@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Thomas Huth <thuth@redhat.com>,
	David Hildenbrand <david@redhat.com>
Subject: [PATCH v1 11/20] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED
Date: Wed, 30 Sep 2020 16:55:14 +0200	[thread overview]
Message-ID: <20200930145523.71087-12-david@redhat.com> (raw)
In-Reply-To: <20200930145523.71087-1-david@redhat.com>

64 bit -> 128 bit, there is only a single final element.

Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/helper.h           |  1 +
 target/s390x/translate_vx.c.inc | 21 ++++++++++++++++-----
 target/s390x/vec_fpu_helper.c   | 13 +++++++++++++
 3 files changed, 30 insertions(+), 5 deletions(-)

diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index ae9f855b05..e643672ec4 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -308,6 +308,7 @@ DEF_HELPER_FLAGS_4(gvec_vfi64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vfi128, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vfll32s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
+DEF_HELPER_FLAGS_4(gvec_vfll64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_4(gvec_vflr64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
 DEF_HELPER_FLAGS_5(gvec_vfm32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc
index f6aed65ff5..ff697f3470 100644
--- a/target/s390x/translate_vx.c.inc
+++ b/target/s390x/translate_vx.c.inc
@@ -2807,16 +2807,27 @@ static DisasJumpType op_vfll(DisasContext *s, DisasOps *o)
 {
     const uint8_t fpf = get_field(s, m3);
     const uint8_t m4 = get_field(s, m4);
-    gen_helper_gvec_2_ptr *fn = gen_helper_gvec_vfll32;
+    const bool se = extract32(m4, 3, 1);
+    gen_helper_gvec_2_ptr *fn = NULL;
 
-    if (fpf != FPF_SHORT || extract32(m4, 0, 3)) {
+    switch (fpf) {
+    case FPF_SHORT:
+        fn = se ? gen_helper_gvec_vfll32s : gen_helper_gvec_vfll32;
+        break;
+    case FPF_LONG:
+        if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+            fn = gen_helper_gvec_vfll64;
+        }
+        break;
+    default:
+        break;
+    }
+
+    if (!fn || extract32(m4, 0, 3)) {
         gen_program_exception(s, PGM_SPECIFICATION);
         return DISAS_NORETURN;
     }
 
-    if (extract32(m4, 3, 1)) {
-        fn = gen_helper_gvec_vfll32s;
-    }
     gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env,
                    0, fn);
     return DISAS_NEXT;
diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
index 9bc7f5c8d7..5ded2ccbcd 100644
--- a/target/s390x/vec_fpu_helper.c
+++ b/target/s390x/vec_fpu_helper.c
@@ -602,6 +602,19 @@ void HELPER(gvec_vfll32s)(void *v1, const void *v2, CPUS390XState *env,
     vfll32(v1, v2, env, true, GETPC());
 }
 
+void HELPER(gvec_vfll64)(void *v1, const void *v2, CPUS390XState *env,
+                         uint32_t desc)
+{
+    /* load from even element */
+    float128 ret = float64_to_float128(s390_vec_read_float64(v2, 0),
+                                       &env->fpu_status);
+    uint8_t vxc, vec_exc = 0;
+
+    vxc = check_ieee_exc(env, 0, false, &vec_exc);
+    handle_ieee_exc(env, vxc, vec_exc, GETPC());
+    s390_vec_write_float128(v1, 0, ret);
+}
+
 static void vflr64(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
                    bool s, bool XxC, uint8_t erm, uintptr_t retaddr)
 {
-- 
2.26.2



  parent reply	other threads:[~2020-09-30 15:06 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30 14:55 [PATCH v1 00/20] s390x/tcg: Implement Vector enhancements facility and switch to z14 David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 01/20] softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag) David Hildenbrand
2020-09-30 16:10   ` Alex Bennée
2020-10-01 12:40     ` David Hildenbrand
2020-10-01 13:15       ` Alex Bennée
2021-05-05 14:54         ` David Hildenbrand
2021-05-10  9:57           ` Alex Bennée
2021-05-10 10:00             ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 02/20] s390x/tcg: Implement VECTOR BIT PERMUTE David Hildenbrand
2020-10-01 15:17   ` Richard Henderson
2020-10-01 17:28     ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 03/20] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL David Hildenbrand
2020-10-01 15:26   ` Richard Henderson
2020-10-01 17:30     ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 04/20] s390x/tcg: Implement 32/128 bit for VECTOR FP ADD David Hildenbrand
2020-10-01 15:45   ` Richard Henderson
2020-10-01 16:08   ` Richard Henderson
2020-10-01 17:08     ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 05/20] s390x/tcg: Implement 32/128 bit for VECTOR FP DIVIDE David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 06/20] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 07/20] s390x/tcg: Implement 32/128 bit for VECTOR FP SUBTRACT David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 08/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR David Hildenbrand
2020-10-01 15:52   ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 09/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE * David Hildenbrand
2020-10-01 16:12   ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 10/20] s390x/tcg: Implement 32/128 bit for VECTOR LOAD FP INTEGER David Hildenbrand
2020-09-30 14:55 ` David Hildenbrand [this message]
2020-10-01 16:19   ` [PATCH v1 11/20] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED Richard Henderson
2020-09-30 14:55 ` [PATCH v1 12/20] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED David Hildenbrand
2020-10-01 16:21   ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 13/20] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION David Hildenbrand
2020-10-01 16:24   ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 14/20] s390x/tcg: Implement 32/128 bit for VECTOR FP SQUARE ROOT David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 15/20] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE David Hildenbrand
2020-10-01 16:30   ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 16/20] s390x/tcg: Implement 32/128bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 17/20] s390x/tcg: Implement VECTOR FP NEGATIVE " David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 18/20] s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) David Hildenbrand
2020-10-01 16:49   ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 19/20] s390x/tcg: We support Vector enhancements facility David Hildenbrand
2020-10-01 16:50   ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 20/20] s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 David Hildenbrand
2020-10-01 16:52   ` Richard Henderson
2020-09-30 15:35 ` [PATCH v1 00/20] s390x/tcg: Implement Vector enhancements facility and switch to z14 no-reply
2020-10-01 15:07 ` Richard Henderson
2020-10-07 13:09   ` David Hildenbrand
2021-05-05 10:55 ` David Hildenbrand

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