From: Richard Henderson <richard.henderson@linaro.org>
To: David Hildenbrand <david@redhat.com>, qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Cornelia Huck <cohuck@redhat.com>,
Thomas Huth <thuth@redhat.com>
Subject: Re: [PATCH v1 08/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR
Date: Thu, 1 Oct 2020 10:52:15 -0500 [thread overview]
Message-ID: <e87d0716-2e62-33dc-a5b6-6e29d19d225b@linaro.org> (raw)
In-Reply-To: <20200930145523.71087-9-david@redhat.com>
On 9/30/20 9:55 AM, David Hildenbrand wrote:
> @@ -2601,19 +2601,41 @@ static DisasJumpType op_wfc(DisasContext *s, DisasOps *o)
> {
> const uint8_t fpf = get_field(s, m3);
> const uint8_t m4 = get_field(s, m4);
> + gen_helper_gvec_2_ptr *fn = NULL;
>
> - if (fpf != FPF_LONG || m4) {
> + switch (fpf) {
> + case FPF_SHORT:
> + if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
> + fn = gen_helper_gvec_wfk32;
> + if (s->fields.op2 == 0xcb) {
Hoist and name this comparision (e.g. bool signal = ...).
> -static int wfc64(const S390Vector *v1, const S390Vector *v2,
> - CPUS390XState *env, bool signal, uintptr_t retaddr)
> -{
> - /* only the zero-indexed elements are compared */
> - const float64 a = s390_vec_read_element64(v1, 0);
> - const float64 b = s390_vec_read_element64(v2, 0);
> - uint8_t vxc, vec_exc = 0;
> - int cmp;
> -
> - if (signal) {
> - cmp = float64_compare(a, b, &env->fpu_status);
> - } else {
> - cmp = float64_compare_quiet(a, b, &env->fpu_status);
> - }
> - vxc = check_ieee_exc(env, 0, false, &vec_exc);
> - handle_ieee_exc(env, vxc, vec_exc, retaddr);
> -
> - return float_comp_to_cc(env, cmp);
> +#define DEF_WFC(BITS) \
> +static int wfc##BITS(const S390Vector *v1, const S390Vector *v2, \
> + CPUS390XState *env, bool signal, uintptr_t retaddr) \
> +{ \
> + /* only the zero-indexed elements are compared */ \
> + const float##BITS a = s390_vec_read_float##BITS(v1, 0); \
> + const float##BITS b = s390_vec_read_float##BITS(v2, 0); \
> + uint8_t vxc, vec_exc = 0; \
> + int cmp; \
> + \
> + if (signal) { \
> + cmp = float##BITS##_compare(a, b, &env->fpu_status); \
> + } else { \
> + cmp = float##BITS##_compare_quiet(a, b, &env->fpu_status); \
> + } \
> + vxc = check_ieee_exc(env, 0, false, &vec_exc); \
> + handle_ieee_exc(env, vxc, vec_exc, retaddr); \
> + \
> + return float_comp_to_cc(env, cmp); \
> }
> +DEF_WFC(32)
> +DEF_WFC(64)
> +DEF_WFC(128)
So, same issue here vs debugging.
If you keep this macroized, I don't see the value in two levels of macros...
> +#define DEF_GVEC_WFC(BITS) \
> +void HELPER(gvec_wfc##BITS)(const void *v1, const void *v2, CPUS390XState *env,\
> + uint32_t desc) \
> +{ \
> + env->cc_op = wfc##BITS(v1, v2, env, false, GETPC()); \
> }
> +DEF_GVEC_WFC(32)
> +DEF_GVEC_WFC(64)
> +DEF_GVEC_WFC(128)
>
> +#define DEF_GVEC_WFK(BITS) \
> +void HELPER(gvec_wfk##BITS)(const void *v1, const void *v2, CPUS390XState *env,\
> + uint32_t desc) \
> +{ \
> + env->cc_op = wfc##BITS(v1, v2, env, true, GETPC()); \
> }
> +DEF_GVEC_WFK(32)
> +DEF_GVEC_WFK(64)
> +DEF_GVEC_WFK(128)
These could be folded in to the first macro via parameters.
r~
next prev parent reply other threads:[~2020-10-01 16:14 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 14:55 [PATCH v1 00/20] s390x/tcg: Implement Vector enhancements facility and switch to z14 David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 01/20] softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag) David Hildenbrand
2020-09-30 16:10 ` Alex Bennée
2020-10-01 12:40 ` David Hildenbrand
2020-10-01 13:15 ` Alex Bennée
2021-05-05 14:54 ` David Hildenbrand
2021-05-10 9:57 ` Alex Bennée
2021-05-10 10:00 ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 02/20] s390x/tcg: Implement VECTOR BIT PERMUTE David Hildenbrand
2020-10-01 15:17 ` Richard Henderson
2020-10-01 17:28 ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 03/20] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL David Hildenbrand
2020-10-01 15:26 ` Richard Henderson
2020-10-01 17:30 ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 04/20] s390x/tcg: Implement 32/128 bit for VECTOR FP ADD David Hildenbrand
2020-10-01 15:45 ` Richard Henderson
2020-10-01 16:08 ` Richard Henderson
2020-10-01 17:08 ` David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 05/20] s390x/tcg: Implement 32/128 bit for VECTOR FP DIVIDE David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 06/20] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 07/20] s390x/tcg: Implement 32/128 bit for VECTOR FP SUBTRACT David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 08/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR David Hildenbrand
2020-10-01 15:52 ` Richard Henderson [this message]
2020-09-30 14:55 ` [PATCH v1 09/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE * David Hildenbrand
2020-10-01 16:12 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 10/20] s390x/tcg: Implement 32/128 bit for VECTOR LOAD FP INTEGER David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 11/20] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED David Hildenbrand
2020-10-01 16:19 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 12/20] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED David Hildenbrand
2020-10-01 16:21 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 13/20] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION David Hildenbrand
2020-10-01 16:24 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 14/20] s390x/tcg: Implement 32/128 bit for VECTOR FP SQUARE ROOT David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 15/20] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE David Hildenbrand
2020-10-01 16:30 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 16/20] s390x/tcg: Implement 32/128bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 17/20] s390x/tcg: Implement VECTOR FP NEGATIVE " David Hildenbrand
2020-09-30 14:55 ` [PATCH v1 18/20] s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) David Hildenbrand
2020-10-01 16:49 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 19/20] s390x/tcg: We support Vector enhancements facility David Hildenbrand
2020-10-01 16:50 ` Richard Henderson
2020-09-30 14:55 ` [PATCH v1 20/20] s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 David Hildenbrand
2020-10-01 16:52 ` Richard Henderson
2020-09-30 15:35 ` [PATCH v1 00/20] s390x/tcg: Implement Vector enhancements facility and switch to z14 no-reply
2020-10-01 15:07 ` Richard Henderson
2020-10-07 13:09 ` David Hildenbrand
2021-05-05 10:55 ` David Hildenbrand
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