From: Luc Michel <luc@lmichel.fr>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Luc Michel" <luc@lmichel.fr>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Andrew Baumann" <Andrew.Baumann@microsoft.com>,
"Paul Zimmerman" <pauldzim@gmail.com>,
"Niek Linnenbank" <nieklinnenbank@gmail.com>,
qemu-arm@nongnu.org, "Havard Skinnemoen" <hskinnemoen@google.com>
Subject: [PATCH v2 11/15] hw/misc/bcm2835_cprman: implement clock mux behaviour
Date: Mon, 5 Oct 2020 21:56:08 +0200 [thread overview]
Message-ID: <20201005195612.1999165-12-luc@lmichel.fr> (raw)
In-Reply-To: <20201005195612.1999165-1-luc@lmichel.fr>
A clock mux can be configured to select one of its 10 sources through
the CM_CTL register. It also embeds yet another clock divider, composed
of an integer part and a fractional part. The number of bits of each
part is mux dependent.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luc Michel <luc@lmichel.fr>
---
hw/misc/bcm2835_cprman.c | 44 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
index a470ce2026..7d59423367 100644
--- a/hw/misc/bcm2835_cprman.c
+++ b/hw/misc/bcm2835_cprman.c
@@ -229,19 +229,61 @@ static const TypeInfo cprman_pll_channel_info = {
};
/* clock mux */
+static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
+{
+ return FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, ENABLE);
+}
+
static void clock_mux_update(CprmanClockMuxState *mux)
{
- clock_update(mux->out, 0);
+ uint64_t freq;
+ uint32_t div, src = FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, SRC);
+ bool enabled = clock_mux_is_enabled(mux);
+
+ *mux->reg_cm = FIELD_DP32(*mux->reg_cm, CM_CLOCKx_CTL, BUSY, enabled);
+
+ if (!enabled) {
+ clock_update(mux->out, 0);
+ return;
+ }
+
+ freq = clock_get_hz(mux->srcs[src]);
+
+ if (mux->int_bits == 0 && mux->frac_bits == 0) {
+ clock_update_hz(mux->out, freq);
+ return;
+ }
+
+ /*
+ * The divider has an integer and a fractional part. The size of each part
+ * varies with the muxes (int_bits and frac_bits). Both parts are
+ * concatenated, with the integer part always starting at bit 12.
+ */
+ div = mux->reg_cm[1] >> (R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits);
+ div &= (1 << (mux->int_bits + mux->frac_bits)) - 1;
+
+ if (!div) {
+ clock_update(mux->out, 0);
+ }
+
+ freq = muldiv64(freq, 1 << mux->frac_bits, div);
+
+ clock_update_hz(mux->out, freq);
}
static void clock_mux_src_update(void *opaque)
{
CprmanClockMuxState **backref = opaque;
CprmanClockMuxState *s = *backref;
+ CprmanClockMuxSource src = backref - s->backref;
+
+ if (FIELD_EX32(*s->reg_cm, CM_CLOCKx_CTL, SRC) != src) {
+ return;
+ }
clock_mux_update(s);
}
static void clock_mux_init(Object *obj)
--
2.28.0
next prev parent reply other threads:[~2020-10-05 20:23 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-05 19:55 [PATCH v2 00/15] raspi: add the bcm2835 cprman clock manager Luc Michel
2020-10-05 19:55 ` [PATCH v2 01/15] hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro Luc Michel
2020-10-05 19:55 ` [PATCH v2 02/15] hw/core/clock: trace clock values in Hz instead of ns Luc Michel
2020-10-05 19:56 ` [PATCH v2 03/15] hw/core/clock: add the clock_new helper function Luc Michel
2020-10-06 9:10 ` Philippe Mathieu-Daudé
2020-10-05 19:56 ` [PATCH v2 04/15] hw/arm/raspi: fix CPRMAN base address Luc Michel
2020-10-05 19:56 ` [PATCH v2 05/15] hw/arm/raspi: add a skeleton implementation of the CPRMAN Luc Michel
2020-10-05 19:56 ` [PATCH v2 06/15] hw/misc/bcm2835_cprman: add a PLL skeleton implementation Luc Michel
2020-10-05 19:56 ` [PATCH v2 07/15] hw/misc/bcm2835_cprman: implement PLLs behaviour Luc Michel
2020-10-05 19:56 ` [PATCH v2 08/15] hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation Luc Michel
2020-10-05 19:56 ` [PATCH v2 09/15] hw/misc/bcm2835_cprman: implement PLL channels behaviour Luc Michel
2020-10-06 9:07 ` Philippe Mathieu-Daudé
2020-10-05 19:56 ` [PATCH v2 10/15] hw/misc/bcm2835_cprman: add a clock mux skeleton implementation Luc Michel
2020-10-06 8:40 ` Philippe Mathieu-Daudé
2020-10-10 11:33 ` Luc Michel
2020-10-10 11:50 ` Luc Michel
2020-10-05 19:56 ` Luc Michel [this message]
2020-10-06 9:04 ` [PATCH v2 11/15] hw/misc/bcm2835_cprman: implement clock mux behaviour Philippe Mathieu-Daudé
2020-10-10 13:09 ` Luc Michel
2020-10-05 19:56 ` [PATCH v2 12/15] hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer Luc Michel
2020-10-05 19:56 ` [PATCH v2 13/15] hw/misc/bcm2835_cprman: add sane reset values to the registers Luc Michel
2020-10-19 15:39 ` Philippe Mathieu-Daudé
2020-10-05 19:56 ` [PATCH v2 14/15] hw/char/pl011: add a clock input Luc Michel
2020-10-05 19:56 ` [PATCH v2 15/15] hw/arm/bcm2835_peripherals: connect the UART clock Luc Michel
2020-10-06 9:05 ` Philippe Mathieu-Daudé
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