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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Luc Michel <luc@lmichel.fr>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Havard Skinnemoen <hskinnemoen@google.com>,
	Andrew Baumann <Andrew.Baumann@microsoft.com>,
	Paul Zimmerman <pauldzim@gmail.com>,
	Niek Linnenbank <nieklinnenbank@gmail.com>,
	qemu-arm@nongnu.org
Subject: Re: [PATCH v2 13/15] hw/misc/bcm2835_cprman: add sane reset values to the registers
Date: Mon, 19 Oct 2020 17:39:54 +0200	[thread overview]
Message-ID: <63f92fe1-e786-4b24-64a2-18c5a3d78e47@amsat.org> (raw)
In-Reply-To: <20201005195612.1999165-14-luc@lmichel.fr>

On 10/5/20 9:56 PM, Luc Michel wrote:
> Those reset values have been extracted from a Raspberry Pi 3 model B
> v1.2, using the 2020-08-20 version of raspios. The dump was done using
> the debugfs interface of the CPRMAN driver in Linux (under
> '/sys/kernel/debug/clk'). Each exposed clock tree stage (PLLs, channels
> and muxes) can be observed by reading the 'regdump' file (e.g.
> 'plla/regdump').
> 
> Those values are set by the Raspberry Pi firmware at boot time (Linux
> expects them to be set when it boots up).
> 
> Some stages are not exposed by the Linux driver (e.g. the PLL B). For
> those, the reset values are unknown and left to 0 which implies a
> disabled output.
> 
> Once booted in QEMU, the final clock tree is very similar to the one
> visible on real hardware. The differences come from some unimplemented
> devices for which the driver simply disable the corresponding clock.
> 
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Luc Michel <luc@lmichel.fr>
> ---
>   include/hw/misc/bcm2835_cprman_internals.h | 269 +++++++++++++++++++++
>   hw/misc/bcm2835_cprman.c                   |  31 +++
>   2 files changed, 300 insertions(+)

I haven't verified the dumped values with real hardware,
but for the rest this patch shouldn't introduce regression,
and it helps to boot up to Linux kernel 5.7, so:

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  reply	other threads:[~2020-10-19 15:41 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-05 19:55 [PATCH v2 00/15] raspi: add the bcm2835 cprman clock manager Luc Michel
2020-10-05 19:55 ` [PATCH v2 01/15] hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro Luc Michel
2020-10-05 19:55 ` [PATCH v2 02/15] hw/core/clock: trace clock values in Hz instead of ns Luc Michel
2020-10-05 19:56 ` [PATCH v2 03/15] hw/core/clock: add the clock_new helper function Luc Michel
2020-10-06  9:10   ` Philippe Mathieu-Daudé
2020-10-05 19:56 ` [PATCH v2 04/15] hw/arm/raspi: fix CPRMAN base address Luc Michel
2020-10-05 19:56 ` [PATCH v2 05/15] hw/arm/raspi: add a skeleton implementation of the CPRMAN Luc Michel
2020-10-05 19:56 ` [PATCH v2 06/15] hw/misc/bcm2835_cprman: add a PLL skeleton implementation Luc Michel
2020-10-05 19:56 ` [PATCH v2 07/15] hw/misc/bcm2835_cprman: implement PLLs behaviour Luc Michel
2020-10-05 19:56 ` [PATCH v2 08/15] hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation Luc Michel
2020-10-05 19:56 ` [PATCH v2 09/15] hw/misc/bcm2835_cprman: implement PLL channels behaviour Luc Michel
2020-10-06  9:07   ` Philippe Mathieu-Daudé
2020-10-05 19:56 ` [PATCH v2 10/15] hw/misc/bcm2835_cprman: add a clock mux skeleton implementation Luc Michel
2020-10-06  8:40   ` Philippe Mathieu-Daudé
2020-10-10 11:33     ` Luc Michel
2020-10-10 11:50       ` Luc Michel
2020-10-05 19:56 ` [PATCH v2 11/15] hw/misc/bcm2835_cprman: implement clock mux behaviour Luc Michel
2020-10-06  9:04   ` Philippe Mathieu-Daudé
2020-10-10 13:09     ` Luc Michel
2020-10-05 19:56 ` [PATCH v2 12/15] hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer Luc Michel
2020-10-05 19:56 ` [PATCH v2 13/15] hw/misc/bcm2835_cprman: add sane reset values to the registers Luc Michel
2020-10-19 15:39   ` Philippe Mathieu-Daudé [this message]
2020-10-05 19:56 ` [PATCH v2 14/15] hw/char/pl011: add a clock input Luc Michel
2020-10-05 19:56 ` [PATCH v2 15/15] hw/arm/bcm2835_peripherals: connect the UART clock Luc Michel
2020-10-06  9:05   ` Philippe Mathieu-Daudé

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