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* [PATCH 00/10] Fix line over 80 characters warning
@ 2020-10-19 20:30 Gan Qixin
  2020-10-19 20:30 ` [PATCH 01/10] hw/virtio/:split some lines containing more than 80 characters Gan Qixin
                   ` (11 more replies)
  0 siblings, 12 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

Hi all,
    I used scripts/checkpatch.pl to find that many files in the hw directory 
contain lines with more than 80 characters. Therefore, I splited some lines to
fix this warning. 

Thanks,
Gan Qixin

Gan Qixin (10):
  hw/virtio/:split some lines containing more than 80 characters
  hw/core/:split some lines containing more than 80 characters
  hw/ide/:split some lines containing more than 80 characters
  hw/intc/:split some lines containing more than 80 characters
  hw/misc/:split some lines containing more than 80 characters
  hw/pci/:split some lines containing more than 80 characters
  hw/pci-host/:split some lines containing more than 80 characters
  hw/char/:split some lines containing more than 80 characters
  hw/input/:split some lines containing more than 80 characters
  hw/riscv/:split some lines containing more than 80 characters

 hw/char/ibex_uart.c              | 12 ++++---
 hw/char/omap_uart.c              |  3 +-
 hw/char/parallel.c               | 12 ++++---
 hw/char/serial.c                 | 57 ++++++++++++++++++++++----------
 hw/char/virtio-serial-bus.c      |  3 +-
 hw/core/bus.c                    |  3 +-
 hw/core/loader.c                 | 17 ++++++----
 hw/core/machine-hmp-cmds.c       |  6 ++--
 hw/core/machine.c                |  3 +-
 hw/core/qdev-properties-system.c |  4 +--
 hw/ide/ahci.c                    | 10 +++---
 hw/ide/atapi.c                   |  9 ++---
 hw/ide/cmd646.c                  |  3 +-
 hw/ide/core.c                    | 21 ++++++++----
 hw/ide/piix.c                    |  3 +-
 hw/ide/via.c                     |  3 +-
 hw/input/hid.c                   |  3 +-
 hw/input/milkymist-softusb.c     | 16 +++++----
 hw/input/pxa2xx_keypad.c         |  3 +-
 hw/input/virtio-input.c          |  3 +-
 hw/intc/apic.c                   |  3 +-
 hw/intc/arm_gic.c                |  5 +--
 hw/intc/arm_gic_common.c         |  3 +-
 hw/intc/ioapic.c                 |  3 +-
 hw/intc/xics.c                   |  3 +-
 hw/intc/xics_kvm.c               |  3 +-
 hw/misc/aspeed_sdmc.c            | 10 +++---
 hw/misc/bcm2835_mphi.c           |  3 +-
 hw/misc/edu.c                    |  3 +-
 hw/misc/omap_gpmc.c              |  3 +-
 hw/misc/omap_sdrc.c              |  3 +-
 hw/misc/pci-testdev.c            |  3 +-
 hw/misc/sifive_test.c            |  4 +--
 hw/pci-host/gpex-acpi.c          | 18 +++++-----
 hw/pci-host/pam.c                |  4 +--
 hw/pci-host/ppce500.c            |  8 +++--
 hw/pci-host/q35.c                | 11 +++---
 hw/pci-host/versatile.c          |  5 +--
 hw/pci/msi.c                     |  3 +-
 hw/pci/msix.c                    |  8 ++---
 hw/pci/pci.c                     | 31 +++++++++++------
 hw/pci/pci_bridge.c              |  3 +-
 hw/pci/pcie.c                    | 11 +++---
 hw/pci/pcie_host.c               |  4 +--
 hw/riscv/opentitan.c             |  6 ++--
 hw/riscv/sifive_e.c              |  6 ++--
 hw/riscv/sifive_u.c              | 12 ++++---
 hw/virtio/vhost-backend.c        |  3 +-
 hw/virtio/vhost-user-fs.c        |  6 ++--
 hw/virtio/vhost-user.c           | 10 +++---
 hw/virtio/virtio-balloon.c       |  6 ++--
 hw/virtio/virtio-bus.c           |  3 +-
 hw/virtio/virtio-crypto.c        |  3 +-
 hw/virtio/virtio-pci.c           |  4 +--
 hw/virtio/virtio-pci.h           |  8 +++--
 hw/virtio/virtio-rng.c           |  3 +-
 hw/virtio/virtio.c               | 14 +++++---
 57 files changed, 273 insertions(+), 160 deletions(-)

-- 
2.23.0



^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH 01/10] hw/virtio/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 02/10] hw/core/:split " Gan Qixin
                   ` (10 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/virtio/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/virtio/vhost-backend.c  |  3 ++-
 hw/virtio/vhost-user-fs.c  |  6 ++++--
 hw/virtio/vhost-user.c     | 10 +++++-----
 hw/virtio/virtio-balloon.c |  6 ++++--
 hw/virtio/virtio-bus.c     |  3 ++-
 hw/virtio/virtio-crypto.c  |  3 ++-
 hw/virtio/virtio-pci.c     |  4 ++--
 hw/virtio/virtio-pci.h     |  8 +++++---
 hw/virtio/virtio-rng.c     |  3 ++-
 hw/virtio/virtio.c         | 14 +++++++++-----
 10 files changed, 37 insertions(+), 23 deletions(-)

diff --git a/hw/virtio/vhost-backend.c b/hw/virtio/vhost-backend.c
index 88c8ecc9e0..588a1f64fe 100644
--- a/hw/virtio/vhost-backend.c
+++ b/hw/virtio/vhost-backend.c
@@ -85,7 +85,8 @@ static int vhost_kernel_scsi_clear_endpoint(struct vhost_dev *dev,
     return vhost_kernel_call(dev, VHOST_SCSI_CLEAR_ENDPOINT, target);
 }
 
-static int vhost_kernel_scsi_get_abi_version(struct vhost_dev *dev, int *version)
+static int vhost_kernel_scsi_get_abi_version(struct vhost_dev *dev,
+                                             int *version)
 {
     return vhost_kernel_call(dev, VHOST_SCSI_GET_ABI_VERSION, version);
 }
diff --git a/hw/virtio/vhost-user-fs.c b/hw/virtio/vhost-user-fs.c
index 1bc5d03a00..a17a5ac236 100644
--- a/hw/virtio/vhost-user-fs.c
+++ b/hw/virtio/vhost-user-fs.c
@@ -209,12 +209,14 @@ static void vuf_device_realize(DeviceState *dev, Error **errp)
                 sizeof(struct virtio_fs_config));
 
     /* Hiprio queue */
-    fs->hiprio_vq = virtio_add_queue(vdev, fs->conf.queue_size, vuf_handle_output);
+    fs->hiprio_vq = virtio_add_queue(vdev, fs->conf.queue_size,
+                                     vuf_handle_output);
 
     /* Request queues */
     fs->req_vqs = g_new(VirtQueue *, fs->conf.num_request_queues);
     for (i = 0; i < fs->conf.num_request_queues; i++) {
-        fs->req_vqs[i] = virtio_add_queue(vdev, fs->conf.queue_size, vuf_handle_output);
+        fs->req_vqs[i] = virtio_add_queue(vdev, fs->conf.queue_size,
+                                          vuf_handle_output);
     }
 
     /* 1 high prio queue, plus the number configured */
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 9c5b4f7fbc..a3134cd07b 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -755,8 +755,8 @@ static int send_add_regions(struct vhost_dev *dev,
                         reg_fd_idx, reg_idx);
                 } else {
                     error_report("%s: invalid postcopy reply for region. "
-                                 "Got guest physical address %" PRIX64 ", expected "
-                                 "%" PRIX64, __func__, reply_gpa,
+                                 "Got guest physical address %" PRIX64
+                                 ", expected %" PRIX64, __func__, reply_gpa,
                                  dev->mem->regions[reg_idx].guest_phys_addr);
                     return -1;
                 }
@@ -1872,9 +1872,9 @@ static int vhost_user_backend_init(struct vhost_dev *dev, void *opaque)
 
             if (ram_slots < u->user->memory_slots) {
                 error_report("The backend specified a max ram slots limit "
-                             "of %" PRIu64", when the prior validated limit was %d. "
-                             "This limit should never decrease.", ram_slots,
-                             u->user->memory_slots);
+                             "of %" PRIu64", when the prior validated limit "
+                             "was %d. This limit should never decrease.",
+                             ram_slots, u->user->memory_slots);
                 return -1;
             }
 
diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c
index b22b5beda3..c10aa16cf0 100644
--- a/hw/virtio/virtio-balloon.c
+++ b/hw/virtio/virtio-balloon.c
@@ -212,7 +212,8 @@ static void balloon_stats_destroy_timer(VirtIOBalloon *s)
 
 static void balloon_stats_change_timer(VirtIOBalloon *s, int64_t secs)
 {
-    timer_mod(s->stats_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + secs * 1000);
+    timer_mod(s->stats_timer,
+              qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + secs * 1000);
 }
 
 static void balloon_stats_poll_cb(void *opaque)
@@ -425,7 +426,8 @@ static void virtio_balloon_handle_output(VirtIODevice *vdev, VirtQueue *vq)
                     balloon_inflate_page(s, section.mr,
                                          section.offset_within_region, &pbp);
                 } else if (vq == s->dvq) {
-                    balloon_deflate_page(s, section.mr, section.offset_within_region);
+                    balloon_deflate_page(s, section.mr,
+                                         section.offset_within_region);
                 } else {
                     g_assert_not_reached();
                 }
diff --git a/hw/virtio/virtio-bus.c b/hw/virtio/virtio-bus.c
index d6332d45c3..66f8ab0baf 100644
--- a/hw/virtio/virtio-bus.c
+++ b/hw/virtio/virtio-bus.c
@@ -221,7 +221,8 @@ int virtio_bus_start_ioeventfd(VirtioBusState *bus)
     if (!bus->ioeventfd_grabbed) {
         r = vdc->start_ioeventfd(vdev);
         if (r < 0) {
-            error_report("%s: failed. Fallback to userspace (slower).", __func__);
+            error_report("%s: failed. Fallback to userspace (slower).",
+                         __func__);
             return r;
         }
     }
diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c
index 54f9bbb789..6d3616ea98 100644
--- a/hw/virtio/virtio-crypto.c
+++ b/hw/virtio/virtio-crypto.c
@@ -798,7 +798,8 @@ static void virtio_crypto_device_realize(DeviceState *dev, Error **errp)
         return;
     } else if (cryptodev_backend_is_used(vcrypto->cryptodev)) {
         error_setg(errp, "can't use already used cryptodev backend: %s",
-                   object_get_canonical_path_component(OBJECT(vcrypto->conf.cryptodev)));
+                   object_get_canonical_path_component(
+                       OBJECT(vcrypto->conf.cryptodev)));
         return;
     }
 
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 36524a5728..de6704f8c7 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1887,8 +1887,8 @@ static void virtio_pci_reset(DeviceState *qdev)
 }
 
 static Property virtio_pci_properties[] = {
-    DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
-                    VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
+    DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy,
+                    flags, VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
     DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
                     VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
     DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h
index 06e2af12de..d9049c2c44 100644
--- a/hw/virtio/virtio-pci.h
+++ b/hw/virtio/virtio-pci.h
@@ -201,8 +201,9 @@ typedef struct VirtioPCIDeviceTypeInfo {
      * If disable-legacy=auto, (non-)transitional mode is selected
      * depending on the bus where the device is plugged.
      *
-     * Implements both INTERFACE_PCIE_DEVICE and INTERFACE_CONVENTIONAL_PCI_DEVICE,
-     * but PCI Express is supported only in non-transitional mode.
+     * Implements both INTERFACE_PCIE_DEVICE and
+     * INTERFACE_CONVENTIONAL_PCI_DEVICE, but PCI Express is supported only in
+     * non-transitional mode.
      *
      * The only type implemented by QEMU 3.1 and older.
      */
@@ -210,7 +211,8 @@ typedef struct VirtioPCIDeviceTypeInfo {
     /*
      * The transitional device type.  Optional.
      *
-     * Implements both INTERFACE_PCIE_DEVICE and INTERFACE_CONVENTIONAL_PCI_DEVICE.
+     * Implements both INTERFACE_PCIE_DEVICE and
+     * INTERFACE_CONVENTIONAL_PCI_DEVICE.
      */
     const char *transitional_name;
     /*
diff --git a/hw/virtio/virtio-rng.c b/hw/virtio/virtio-rng.c
index 2886c0ce2a..9515ce87de 100644
--- a/hw/virtio/virtio-rng.c
+++ b/hw/virtio/virtio-rng.c
@@ -257,7 +257,8 @@ static Property virtio_rng_properties[] = {
      */
     DEFINE_PROP_UINT64("max-bytes", VirtIORNG, conf.max_bytes, INT64_MAX),
     DEFINE_PROP_UINT32("period", VirtIORNG, conf.period_ms, 1 << 16),
-    DEFINE_PROP_LINK("rng", VirtIORNG, conf.rng, TYPE_RNG_BACKEND, RngBackend *),
+    DEFINE_PROP_LINK("rng", VirtIORNG, conf.rng, TYPE_RNG_BACKEND,
+                     RngBackend *),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 6f8f865aff..66c5011748 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -309,7 +309,8 @@ static inline uint16_t vring_avail_idx(VirtQueue *vq)
         return 0;
     }
 
-    vq->shadow_avail_idx = virtio_lduw_phys_cached(vq->vdev, &caches->avail, pa);
+    vq->shadow_avail_idx = virtio_lduw_phys_cached(vq->vdev,
+                                                   &caches->avail, pa);
     return vq->shadow_avail_idx;
 }
 
@@ -1065,7 +1066,8 @@ static void virtqueue_split_get_avail_bytes(VirtQueue *vq,
                 goto done;
             }
 
-            rc = virtqueue_split_read_next_desc(vdev, &desc, desc_cache, max, &i);
+            rc = virtqueue_split_read_next_desc(vdev, &desc,
+                                                desc_cache, max, &i);
         } while (rc == VIRTQUEUE_READ_DESC_MORE);
 
         if (rc == VIRTQUEUE_READ_DESC_ERROR) {
@@ -1388,7 +1390,8 @@ void virtqueue_map(VirtIODevice *vdev, VirtQueueElement *elem)
                                                                         false);
 }
 
-static void *virtqueue_alloc_element(size_t sz, unsigned out_num, unsigned in_num)
+static void *virtqueue_alloc_element(size_t sz, unsigned out_num,
+                                     unsigned in_num)
 {
     VirtQueueElement *elem;
     size_t in_addr_ofs = QEMU_ALIGN_UP(sz, __alignof__(elem->in_addr[0]));
@@ -3558,7 +3561,7 @@ static void virtio_queue_host_notifier_aio_poll_end(EventNotifier *n)
 }
 
 void virtio_queue_aio_set_host_notifier_handler(VirtQueue *vq, AioContext *ctx,
-                                                VirtIOHandleAIOOutput handle_output)
+                                            VirtIOHandleAIOOutput handle_output)
 {
     if (handle_output) {
         vq->handle_aio_output = handle_output;
@@ -3716,7 +3719,8 @@ static void virtio_device_instance_finalize(Object *obj)
 static Property virtio_properties[] = {
     DEFINE_VIRTIO_COMMON_FEATURES(VirtIODevice, host_features),
     DEFINE_PROP_BOOL("use-started", VirtIODevice, use_started, true),
-    DEFINE_PROP_BOOL("use-disabled-flag", VirtIODevice, use_disabled_flag, true),
+    DEFINE_PROP_BOOL("use-disabled-flag", VirtIODevice,
+                     use_disabled_flag, true),
     DEFINE_PROP_BOOL("x-disable-legacy-check", VirtIODevice,
                      disable_legacy_check, false),
     DEFINE_PROP_END_OF_LIST(),
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 02/10] hw/core/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
  2020-10-19 20:30 ` [PATCH 01/10] hw/virtio/:split some lines containing more than 80 characters Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 03/10] hw/ide/:split " Gan Qixin
                   ` (9 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/core/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/core/bus.c                    |  3 ++-
 hw/core/loader.c                 | 17 +++++++++++------
 hw/core/machine-hmp-cmds.c       |  6 ++++--
 hw/core/machine.c                |  3 ++-
 hw/core/qdev-properties-system.c |  4 ++--
 5 files changed, 21 insertions(+), 12 deletions(-)

diff --git a/hw/core/bus.c b/hw/core/bus.c
index a0483859ae..9b2dc7e25c 100644
--- a/hw/core/bus.c
+++ b/hw/core/bus.c
@@ -158,7 +158,8 @@ void qbus_create_inplace(void *bus, size_t size, const char *typename,
     qbus_init(bus, parent, name);
 }
 
-BusState *qbus_create(const char *typename, DeviceState *parent, const char *name)
+BusState *qbus_create(const char *typename, DeviceState *parent,
+                      const char *name)
 {
     BusState *bus;
 
diff --git a/hw/core/loader.c b/hw/core/loader.c
index 8bbb1797a4..50839d93e3 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -211,14 +211,18 @@ static void bswap_ahdr(struct exec *e)
 #define N_TXTOFF(x)							\
     (N_MAGIC(x) == ZMAGIC ? _N_HDROFF((x)) + sizeof (struct exec) :	\
      (N_MAGIC(x) == QMAGIC ? 0 : sizeof (struct exec)))
-#define N_TXTADDR(x, target_page_size) (N_MAGIC(x) == QMAGIC ? target_page_size : 0)
-#define _N_SEGMENT_ROUND(x, target_page_size) (((x) + target_page_size - 1) & ~(target_page_size - 1))
+#define N_TXTADDR(x, target_page_size) \
+    (N_MAGIC(x) == QMAGIC ? target_page_size : 0)
+#define _N_SEGMENT_ROUND(x, target_page_size) \
+    (((x) + target_page_size - 1) & ~(target_page_size - 1))
 
-#define _N_TXTENDADDR(x, target_page_size) (N_TXTADDR(x, target_page_size)+(x).a_text)
+#define _N_TXTENDADDR(x, target_page_size) \
+    (N_TXTADDR(x, target_page_size) + (x).a_text)
 
 #define N_DATADDR(x, target_page_size) \
-    (N_MAGIC(x)==OMAGIC? (_N_TXTENDADDR(x, target_page_size)) \
-     : (_N_SEGMENT_ROUND (_N_TXTENDADDR(x, target_page_size), target_page_size)))
+    (N_MAGIC(x) == OMAGIC ? (_N_TXTENDADDR(x, target_page_size)) \
+     : (_N_SEGMENT_ROUND(_N_TXTENDADDR(x, target_page_size), \
+    target_page_size)))
 
 
 int load_aout(const char *filename, hwaddr addr, int max_sz,
@@ -1190,7 +1194,8 @@ int rom_check_and_register_reset(void)
         }
         section = memory_region_find(rom->mr ? rom->mr : get_system_memory(),
                                      rom->addr, 1);
-        rom->isrom = int128_nz(section.size) && memory_region_is_rom(section.mr);
+        rom->isrom = int128_nz(section.size)
+                     && memory_region_is_rom(section.mr);
         memory_region_unref(section.mr);
     }
     qemu_register_reset(rom_reset, NULL);
diff --git a/hw/core/machine-hmp-cmds.c b/hw/core/machine-hmp-cmds.c
index 6357be9c6b..65280d53bc 100644
--- a/hw/core/machine-hmp-cmds.c
+++ b/hw/core/machine-hmp-cmds.c
@@ -73,7 +73,8 @@ void hmp_hotpluggable_cpus(Monitor *mon, const QDict *qdict)
             monitor_printf(mon, "    node-id: \"%" PRIu64 "\"\n", c->node_id);
         }
         if (c->has_socket_id) {
-            monitor_printf(mon, "    socket-id: \"%" PRIu64 "\"\n", c->socket_id);
+            monitor_printf(mon, "    socket-id: \"%" PRIu64 "\"\n",
+                           c->socket_id);
         }
         if (c->has_die_id) {
             monitor_printf(mon, "    die-id: \"%" PRIu64 "\"\n", c->die_id);
@@ -82,7 +83,8 @@ void hmp_hotpluggable_cpus(Monitor *mon, const QDict *qdict)
             monitor_printf(mon, "    core-id: \"%" PRIu64 "\"\n", c->core_id);
         }
         if (c->has_thread_id) {
-            monitor_printf(mon, "    thread-id: \"%" PRIu64 "\"\n", c->thread_id);
+            monitor_printf(mon, "    thread-id: \"%" PRIu64 "\"\n",
+                           c->thread_id);
         }
 
         l = l->next;
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 7e2f4ec08e..055473c23a 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -317,7 +317,8 @@ static char *machine_get_dt_compatible(Object *obj, Error **errp)
     return g_strdup(ms->dt_compatible);
 }
 
-static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
+static void machine_set_dt_compatible(Object *obj,
+                                      const char *value, Error **errp)
 {
     MachineState *ms = MACHINE(obj);
 
diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c
index 49bdd12581..c4f7170a06 100644
--- a/hw/core/qdev-properties-system.c
+++ b/hw/core/qdev-properties-system.c
@@ -418,8 +418,8 @@ static void set_netdev(Object *obj, Visitor *v, const char *name,
     }
 
     if (queues > MAX_QUEUE_NUM) {
-        error_setg(errp, "queues of backend '%s'(%d) exceeds QEMU limitation(%d)",
-                   str, queues, MAX_QUEUE_NUM);
+        error_setg(errp, "queues of backend '%s'(%d) exceeds"
+                   "QEMU limitation(%d)", str, queues, MAX_QUEUE_NUM);
         goto out;
     }
 
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 03/10] hw/ide/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
  2020-10-19 20:30 ` [PATCH 01/10] hw/virtio/:split some lines containing more than 80 characters Gan Qixin
  2020-10-19 20:30 ` [PATCH 02/10] hw/core/:split " Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 04/10] hw/intc/:split " Gan Qixin
                   ` (8 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/ide/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/ide/ahci.c   | 10 ++++++----
 hw/ide/atapi.c  |  9 +++++----
 hw/ide/cmd646.c |  3 ++-
 hw/ide/core.c   | 21 ++++++++++++++-------
 hw/ide/piix.c   |  3 ++-
 hw/ide/via.c    |  3 ++-
 6 files changed, 31 insertions(+), 18 deletions(-)

diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 680304a24c..83bbc7e3df 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1252,7 +1252,8 @@ static void handle_reg_h2d_fis(AHCIState *s, int port,
     if (opts & AHCI_CMD_ATAPI) {
         memcpy(ide_state->io_buffer, &cmd_fis[AHCI_COMMAND_TABLE_ACMD], 0x10);
         if (trace_event_get_state_backends(TRACE_HANDLE_REG_H2D_FIS_DUMP)) {
-            char *pretty_fis = ahci_pretty_buffer_fis(ide_state->io_buffer, 0x10);
+            char *pretty_fis = ahci_pretty_buffer_fis(ide_state->io_buffer,
+                                                      0x10);
             trace_handle_reg_h2d_fis_dump(s, port, pretty_fis);
             g_free(pretty_fis);
         }
@@ -1356,9 +1357,10 @@ static void ahci_pio_transfer(const IDEDMA *dma)
      * The device only sets the 'I' bit in the PIO Setup FIS for device->host
      * requests (see "DPIOI1" in the SATA spec), or for host->device DRQs after
      * the first (see "DPIOO1").  The latter is consistent with the spec's
-     * description of the PACKET protocol, where the command part of ATAPI requests
-     * ("DPKT0") has the 'I' bit clear, while the data part of PIO ATAPI requests
-     * ("DPKT4a" and "DPKT7") has the 'I' bit set for both directions for all DRQs.
+     * description of the PACKET protocol, where the command part of ATAPI
+     * requests ("DPKT0") has the 'I' bit clear, while the data part of PIO
+     * ATAPI requests ("DPKT4a" and "DPKT7") has the 'I' bit set for both
+     * directions for all DRQs.
      */
     pio_fis_i = ad->done_first_drq || (!is_atapi && !is_write);
     ahci_write_fis_pio(ad, size, pio_fis_i);
diff --git a/hw/ide/atapi.c b/hw/ide/atapi.c
index 14a2b0bb2f..7f346d5d2a 100644
--- a/hw/ide/atapi.c
+++ b/hw/ide/atapi.c
@@ -378,7 +378,8 @@ static void ide_atapi_cmd_read_dma_cb(void *opaque, int ret)
 
     if (s->packet_transfer_size <= 0) {
         s->status = READY_STAT | SEEK_STAT;
-        s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
+        s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO |
+                      ATAPI_INT_REASON_CD;
         ide_set_irq(s->bus);
         goto eot;
     }
@@ -1232,9 +1233,9 @@ enum {
     ALLOW_UA = 0x01,
 
     /*
-     * Commands flagged with CHECK_READY can only execute if a medium is present.
-     * Otherwise they report the Not Ready Condition. (See MMC-5, section
-     * 4.1.8)
+     * Commands flagged with CHECK_READY can only execute if a medium is
+     * present. Otherwise they report the Not Ready Condition. (See MMC-5,
+     * section 4.1.8)
      */
     CHECK_READY = 0x02,
 
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index c254631485..c41990f393 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -144,7 +144,8 @@ static void bmdma_write(void *opaque, hwaddr addr,
         cmd646_update_irq(pci_dev);
         break;
     case 2:
-        bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
+        bm->status = (val & 0x60) | (bm->status & 1) |
+                     (bm->status & ~val & 0x06);
         break;
     case 3:
         if (bm == &bm->pci_dev->bmdma[0]) {
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 693b352d5e..b784fff88f 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -2017,7 +2017,8 @@ static const struct {
     [WIN_READ_ONCE]               = { cmd_read_pio, HD_CFA_OK },
     [WIN_READ_EXT]                = { cmd_read_pio, HD_CFA_OK },
     [WIN_READDMA_EXT]             = { cmd_read_dma, HD_CFA_OK },
-    [WIN_READ_NATIVE_MAX_EXT]     = { cmd_read_native_max, HD_CFA_OK | SET_DSC },
+    [WIN_READ_NATIVE_MAX_EXT]     = { cmd_read_native_max, HD_CFA_OK |
+                                      SET_DSC },
     [WIN_MULTREAD_EXT]            = { cmd_read_multiple, HD_CFA_OK },
     [WIN_WRITE]                   = { cmd_write_pio, HD_CFA_OK },
     [WIN_WRITE_ONCE]              = { cmd_write_pio, HD_CFA_OK },
@@ -2037,7 +2038,8 @@ static const struct {
     [WIN_IDLEIMMEDIATE2]          = { cmd_nop, HD_CFA_OK },
     [WIN_STANDBY2]                = { cmd_nop, HD_CFA_OK },
     [WIN_SETIDLE2]                = { cmd_nop, HD_CFA_OK },
-    [WIN_CHECKPOWERMODE2]         = { cmd_check_power_mode, HD_CFA_OK | SET_DSC },
+    [WIN_CHECKPOWERMODE2]         = { cmd_check_power_mode, HD_CFA_OK |
+                                      SET_DSC },
     [WIN_SLEEPNOW2]               = { cmd_nop, HD_CFA_OK },
     [WIN_PACKETCMD]               = { cmd_packet, CD_OK },
     [WIN_PIDENTIFY]               = { cmd_identify_packet, CD_OK },
@@ -2046,7 +2048,8 @@ static const struct {
     [CFA_ERASE_SECTORS]           = { cmd_cfa_erase_sectors, CFA_OK | SET_DSC },
     [WIN_MULTREAD]                = { cmd_read_multiple, HD_CFA_OK },
     [WIN_MULTWRITE]               = { cmd_write_multiple, HD_CFA_OK },
-    [WIN_SETMULT]                 = { cmd_set_multiple_mode, HD_CFA_OK | SET_DSC },
+    [WIN_SETMULT]                 = { cmd_set_multiple_mode, HD_CFA_OK |
+                                      SET_DSC },
     [WIN_READDMA]                 = { cmd_read_dma, HD_CFA_OK },
     [WIN_READDMA_ONCE]            = { cmd_read_dma, HD_CFA_OK },
     [WIN_WRITEDMA]                = { cmd_write_dma, HD_CFA_OK },
@@ -2056,15 +2059,19 @@ static const struct {
     [WIN_IDLEIMMEDIATE]           = { cmd_nop, HD_CFA_OK },
     [WIN_STANDBY]                 = { cmd_nop, HD_CFA_OK },
     [WIN_SETIDLE1]                = { cmd_nop, HD_CFA_OK },
-    [WIN_CHECKPOWERMODE1]         = { cmd_check_power_mode, HD_CFA_OK | SET_DSC },
+    [WIN_CHECKPOWERMODE1]         = { cmd_check_power_mode, HD_CFA_OK |
+                                      SET_DSC },
     [WIN_SLEEPNOW1]               = { cmd_nop, HD_CFA_OK },
     [WIN_FLUSH_CACHE]             = { cmd_flush_cache, ALL_OK },
     [WIN_FLUSH_CACHE_EXT]         = { cmd_flush_cache, HD_CFA_OK },
     [WIN_IDENTIFY]                = { cmd_identify, ALL_OK },
     [WIN_SETFEATURES]             = { cmd_set_features, ALL_OK | SET_DSC },
-    [IBM_SENSE_CONDITION]         = { cmd_ibm_sense_condition, CFA_OK | SET_DSC },
-    [CFA_WEAR_LEVEL]              = { cmd_cfa_erase_sectors, HD_CFA_OK | SET_DSC },
-    [WIN_READ_NATIVE_MAX]         = { cmd_read_native_max, HD_CFA_OK | SET_DSC },
+    [IBM_SENSE_CONDITION]         = { cmd_ibm_sense_condition, CFA_OK |
+                                      SET_DSC },
+    [CFA_WEAR_LEVEL]              = { cmd_cfa_erase_sectors, HD_CFA_OK |
+                                      SET_DSC },
+    [WIN_READ_NATIVE_MAX]         = { cmd_read_native_max, HD_CFA_OK |
+                                      SET_DSC },
 };
 
 static bool ide_cmd_permitted(IDEState *s, uint32_t cmd)
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index b402a93636..2b154d0344 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -75,7 +75,8 @@ static void bmdma_write(void *opaque, hwaddr addr,
         bmdma_cmd_writeb(bm, val);
         break;
     case 2:
-        bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
+        bm->status = (val & 0x60) | (bm->status & 1) |
+                     (bm->status & ~val & 0x06);
         break;
     }
 }
diff --git a/hw/ide/via.c b/hw/ide/via.c
index be09912b33..694d5e55a2 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -74,7 +74,8 @@ static void bmdma_write(void *opaque, hwaddr addr,
         bmdma_cmd_writeb(bm, val);
         break;
     case 2:
-        bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
+        bm->status = (val & 0x60) | (bm->status & 1) |
+                     (bm->status & ~val & 0x06);
         break;
     default:;
     }
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 04/10] hw/intc/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (2 preceding siblings ...)
  2020-10-19 20:30 ` [PATCH 03/10] hw/ide/:split " Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 05/10] hw/misc/:split " Gan Qixin
                   ` (7 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/intc/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/intc/apic.c           | 3 ++-
 hw/intc/arm_gic.c        | 5 +++--
 hw/intc/arm_gic_common.c | 3 ++-
 hw/intc/ioapic.c         | 3 ++-
 hw/intc/xics.c           | 3 ++-
 hw/intc/xics_kvm.c       | 3 ++-
 6 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index b6a05e5439..89c2558f78 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -426,7 +426,8 @@ static void apic_eoi(APICCommonState *s)
     if (isrv < 0)
         return;
     apic_reset_bit(s->isr, isrv);
-    if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && apic_get_bit(s->tmr, isrv)) {
+    if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) &&
+        apic_get_bit(s->tmr, isrv)) {
         ioapic_eoi_broadcast(isrv);
     }
     apic_sync_vapic(s, SYNC_FROM_VAPIC | SYNC_TO_VAPIC);
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index c60dc6b5e6..7580ef25c1 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -1976,8 +1976,9 @@ static MemTxResult gic_hyp_write(void *opaque, int cpu, hwaddr addr,
     return MEMTX_OK;
 }
 
-static MemTxResult gic_thiscpu_hyp_read(void *opaque, hwaddr addr, uint64_t *data,
-                                    unsigned size, MemTxAttrs attrs)
+static MemTxResult gic_thiscpu_hyp_read(void *opaque, hwaddr addr,
+                                        uint64_t *data, unsigned size,
+                                        MemTxAttrs attrs)
 {
     GICState *s = (GICState *)opaque;
 
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index 7b44d5625b..337ef239be 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -87,7 +87,8 @@ static const VMStateDescription vmstate_gic_virt_state = {
         /* Virtual CPU interfaces */
         VMSTATE_UINT32_SUB_ARRAY(cpu_ctlr, GICState, GIC_NCPU, GIC_NCPU),
         VMSTATE_UINT16_SUB_ARRAY(priority_mask, GICState, GIC_NCPU, GIC_NCPU),
-        VMSTATE_UINT16_SUB_ARRAY(running_priority, GICState, GIC_NCPU, GIC_NCPU),
+        VMSTATE_UINT16_SUB_ARRAY(running_priority, GICState, GIC_NCPU,
+                                 GIC_NCPU),
         VMSTATE_UINT16_SUB_ARRAY(current_pending, GICState, GIC_NCPU, GIC_NCPU),
         VMSTATE_UINT8_SUB_ARRAY(bpr, GICState, GIC_NCPU, GIC_NCPU),
         VMSTATE_UINT8_SUB_ARRAY(abpr, GICState, GIC_NCPU, GIC_NCPU),
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index bca71b5934..68d5548fd9 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -237,7 +237,8 @@ void ioapic_eoi_broadcast(int vector)
             entry = s->ioredtbl[n];
 
             if ((entry & IOAPIC_VECTOR_MASK) != vector ||
-                ((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) != IOAPIC_TRIGGER_LEVEL) {
+                ((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) !=
+                IOAPIC_TRIGGER_LEVEL) {
                 continue;
             }
 
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 68f9d44feb..c1bee454b5 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -322,7 +322,8 @@ static void icp_realize(DeviceState *dev, Error **errp)
         break;
 
     default:
-        error_setg(errp, "XICS interrupt controller does not support this CPU bus model");
+        error_setg(errp, "XICS interrupt controller does not support this "
+                   "CPU bus model");
         return;
     }
 
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 68bb1914b9..a8a2327062 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -400,7 +400,8 @@ int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers,
     /* Create the KVM XICS device */
     rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
     if (rc < 0) {
-        error_setg_errno(&local_err, -rc, "Error on KVM_CREATE_DEVICE for XICS");
+        error_setg_errno(&local_err, -rc,
+                         "Error on KVM_CREATE_DEVICE for XICS");
         goto fail;
     }
 
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 05/10] hw/misc/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (3 preceding siblings ...)
  2020-10-19 20:30 ` [PATCH 04/10] hw/intc/:split " Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 06/10] hw/pci/:split " Gan Qixin
                   ` (6 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/misc/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/misc/aspeed_sdmc.c  | 10 ++++++----
 hw/misc/bcm2835_mphi.c |  3 ++-
 hw/misc/edu.c          |  3 ++-
 hw/misc/omap_gpmc.c    |  3 ++-
 hw/misc/omap_sdrc.c    |  3 ++-
 hw/misc/pci-testdev.c  |  3 ++-
 hw/misc/sifive_test.c  |  4 ++--
 7 files changed, 18 insertions(+), 11 deletions(-)

diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 08f856cbda..2d9f6b5892 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -310,7 +310,8 @@ static void aspeed_2400_sdmc_write(AspeedSDMCState *s, uint32_t reg,
                                    uint32_t data)
 {
     if (reg == R_PROT) {
-        s->regs[reg] = (data == PROT_KEY_UNLOCK) ? PROT_UNLOCKED : PROT_SOFTLOCKED;
+        s->regs[reg] = (data ==
+                        PROT_KEY_UNLOCK) ? PROT_UNLOCKED : PROT_SOFTLOCKED;
         return;
     }
 
@@ -368,7 +369,8 @@ static void aspeed_2500_sdmc_write(AspeedSDMCState *s, uint32_t reg,
                                    uint32_t data)
 {
     if (reg == R_PROT) {
-        s->regs[reg] = (data == PROT_KEY_UNLOCK) ? PROT_UNLOCKED : PROT_SOFTLOCKED;
+        s->regs[reg] = (data == PROT_KEY_UNLOCK) ? PROT_UNLOCKED :
+                        PROT_SOFTLOCKED;
         return;
     }
 
@@ -448,8 +450,8 @@ static void aspeed_2600_sdmc_write(AspeedSDMCState *s, uint32_t reg,
     }
 
     if (s->regs[R_PROT] == PROT_HARDLOCKED) {
-        qemu_log_mask(LOG_GUEST_ERROR, "%s: SDMC is locked until system reset!\n",
-                __func__);
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "%s: SDMC is locked until system reset!\n", __func__);
         return;
     }
 
diff --git a/hw/misc/bcm2835_mphi.c b/hw/misc/bcm2835_mphi.c
index 0428e10ba5..4c417770e4 100644
--- a/hw/misc/bcm2835_mphi.c
+++ b/hw/misc/bcm2835_mphi.c
@@ -148,7 +148,8 @@ static void mphi_init(Object *obj)
     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
     BCM2835MphiState *s = BCM2835_MPHI(obj);
 
-    memory_region_init_io(&s->iomem, obj, &mphi_mmio_ops, s, "mphi", MPHI_MMIO_SIZE);
+    memory_region_init_io(&s->iomem, obj, &mphi_mmio_ops, s,
+                          "mphi", MPHI_MMIO_SIZE);
     sysbus_init_mmio(sbd, &s->iomem);
 }
 
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index e935c418d4..5c933d1261 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -129,7 +129,8 @@ static dma_addr_t edu_clamp_addr(const EduState *edu, dma_addr_t addr)
     dma_addr_t res = addr & edu->dma_mask;
 
     if (addr != res) {
-        printf("EDU: clamping DMA %#.16"PRIx64" to %#.16"PRIx64"!\n", addr, res);
+        printf("EDU: clamping DMA 0x%.16"PRIx64" to 0x%.16"PRIx64"!\n",
+               addr, res);
     }
 
     return res;
diff --git a/hw/misc/omap_gpmc.c b/hw/misc/omap_gpmc.c
index 10de7a5523..e721fdde1f 100644
--- a/hw/misc/omap_gpmc.c
+++ b/hw/misc/omap_gpmc.c
@@ -830,7 +830,8 @@ struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu,
     int cs;
     struct omap_gpmc_s *s = g_new0(struct omap_gpmc_s, 1);
 
-    memory_region_init_io(&s->iomem, NULL, &omap_gpmc_ops, s, "omap-gpmc", 0x1000);
+    memory_region_init_io(&s->iomem, NULL, &omap_gpmc_ops, s,
+                          "omap-gpmc", 0x1000);
     memory_region_add_subregion(get_system_memory(), base, &s->iomem);
 
     s->irq = irq;
diff --git a/hw/misc/omap_sdrc.c b/hw/misc/omap_sdrc.c
index f2f72f6810..438e9ce2ba 100644
--- a/hw/misc/omap_sdrc.c
+++ b/hw/misc/omap_sdrc.c
@@ -161,7 +161,8 @@ struct omap_sdrc_s *omap_sdrc_init(MemoryRegion *sysmem,
 
     omap_sdrc_reset(s);
 
-    memory_region_init_io(&s->iomem, NULL, &omap_sdrc_ops, s, "omap.sdrc", 0x1000);
+    memory_region_init_io(&s->iomem, NULL, &omap_sdrc_ops,
+                          s, "omap.sdrc", 0x1000);
     memory_region_add_subregion(sysmem, base, &s->iomem);
 
     return s;
diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c
index 03845c8de3..ac21f918a2 100644
--- a/hw/misc/pci-testdev.c
+++ b/hw/misc/pci-testdev.c
@@ -277,7 +277,8 @@ static void pci_testdev_realize(PCIDevice *pci_dev, Error **errp)
         test->hdr = g_malloc0(test->bufsize);
         memcpy(test->hdr->name, name, strlen(name) + 1);
         g_free(name);
-        test->hdr->offset = cpu_to_le32(IOTEST_SIZE(i) + i * IOTEST_ACCESS_WIDTH);
+        test->hdr->offset = cpu_to_le32(IOTEST_SIZE(i) +
+                            i * IOTEST_ACCESS_WIDTH);
         test->match_data = strcmp(IOTEST_TEST(i), "wildcard-eventfd");
         if (fastmmio && IOTEST_IS_MEM(i) && !test->match_data) {
             test->size = 0;
diff --git a/hw/misc/sifive_test.c b/hw/misc/sifive_test.c
index 2deb2072cc..2ffcb3b532 100644
--- a/hw/misc/sifive_test.c
+++ b/hw/misc/sifive_test.c
@@ -50,8 +50,8 @@ static void sifive_test_write(void *opaque, hwaddr addr,
             break;
         }
     }
-    qemu_log_mask(LOG_GUEST_ERROR, "%s: write: addr=0x%x val=0x%016" PRIx64 "\n",
-                  __func__, (int)addr, val64);
+    qemu_log_mask(LOG_GUEST_ERROR, "%s: write: addr=0x%x val=0x%016" PRIx64
+                  "\n", __func__, (int)addr, val64);
 }
 
 static const MemoryRegionOps sifive_test_ops = {
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 06/10] hw/pci/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (4 preceding siblings ...)
  2020-10-19 20:30 ` [PATCH 05/10] hw/misc/:split " Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 07/10] hw/pci-host/:split " Gan Qixin
                   ` (5 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/pci/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/pci/msi.c        |  3 ++-
 hw/pci/msix.c       |  8 ++++----
 hw/pci/pci.c        | 31 ++++++++++++++++++++-----------
 hw/pci/pci_bridge.c |  3 ++-
 hw/pci/pcie.c       | 11 ++++++-----
 hw/pci/pcie_host.c  |  4 ++--
 6 files changed, 36 insertions(+), 24 deletions(-)

diff --git a/hw/pci/msi.c b/hw/pci/msi.c
index 47d2b0f33c..7adea829cb 100644
--- a/hw/pci/msi.c
+++ b/hw/pci/msi.c
@@ -47,7 +47,8 @@
  * supporting such, so removing the capability is not required, and
  * it seems cleaner to have a given device look the same for all boards.
  *
- * TODO: some existing controllers violate the above rule. Identify and fix them.
+ * TODO: some existing controllers violate the above rule. Identify and fix
+ * them.
  */
 bool msi_nonbroken;
 
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
index 67e34f34d6..7498af09c2 100644
--- a/hw/pci/msix.c
+++ b/hw/pci/msix.c
@@ -334,11 +334,11 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries,
 
     msix_mask_all(dev, nentries);
 
-    memory_region_init_io(&dev->msix_table_mmio, OBJECT(dev), &msix_table_mmio_ops, dev,
-                          "msix-table", table_size);
+    memory_region_init_io(&dev->msix_table_mmio, OBJECT(dev),
+                          &msix_table_mmio_ops, dev, "msix-table", table_size);
     memory_region_add_subregion(table_bar, table_offset, &dev->msix_table_mmio);
-    memory_region_init_io(&dev->msix_pba_mmio, OBJECT(dev), &msix_pba_mmio_ops, dev,
-                          "msix-pba", pba_size);
+    memory_region_init_io(&dev->msix_pba_mmio, OBJECT(dev),
+                          &msix_pba_mmio_ops, dev, "msix-pba", pba_size);
     memory_region_add_subregion(pba_bar, pba_offset, &dev->msix_pba_mmio);
 
     return 0;
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 100c9381c2..96d1b88d79 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -1391,7 +1391,8 @@ uint32_t pci_default_read_config(PCIDevice *d,
     return le32_to_cpu(val);
 }
 
-void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int l)
+void pci_default_write_config(PCIDevice *d, uint32_t addr,
+                              uint32_t val_in, int l)
 {
     int i, was_irq_disabled = pci_irq_disabled(d);
     uint32_t val = val_in;
@@ -1691,9 +1692,11 @@ static PciMemoryRegionList *qmp_query_pci_regions(const PCIDevice *dev)
         } else {
             region->value->type = g_strdup("memory");
             region->value->has_prefetch = true;
-            region->value->prefetch = !!(r->type & PCI_BASE_ADDRESS_MEM_PREFETCH);
+            region->value->prefetch = !!(r->type &
+                                         PCI_BASE_ADDRESS_MEM_PREFETCH);
             region->value->has_mem_type_64 = true;
-            region->value->mem_type_64 = !!(r->type & PCI_BASE_ADDRESS_MEM_TYPE_64);
+            region->value->mem_type_64 = !!(r->type &
+                                            PCI_BASE_ADDRESS_MEM_TYPE_64);
         }
 
         region->value->bar = i;
@@ -1738,10 +1741,13 @@ static PciBridgeInfo *qmp_query_pci_bridge(PCIDevice *dev, PCIBus *bus,
     range->limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
 
     if (dev->config[PCI_SECONDARY_BUS] != 0) {
-        PCIBus *child_bus = pci_find_bus_nr(bus, dev->config[PCI_SECONDARY_BUS]);
+        PCIBus *child_bus =
+                   pci_find_bus_nr(bus, dev->config[PCI_SECONDARY_BUS]);
         if (child_bus) {
             info->has_devices = true;
-            info->devices = qmp_query_pci_devices(child_bus, dev->config[PCI_SECONDARY_BUS]);
+            info->devices =
+                qmp_query_pci_devices(child_bus,
+                                      dev->config[PCI_SECONDARY_BUS]);
         }
     }
 
@@ -1986,9 +1992,9 @@ PCIDevice *pci_vga_init(PCIBus *bus)
 static bool pci_secondary_bus_in_range(PCIDevice *dev, int bus_num)
 {
     return !(pci_get_word(dev->config + PCI_BRIDGE_CONTROL) &
-             PCI_BRIDGE_CTL_BUS_RESET) /* Don't walk the bus if it's reset. */ &&
-        dev->config[PCI_SECONDARY_BUS] <= bus_num &&
-        bus_num <= dev->config[PCI_SUBORDINATE_BUS];
+             PCI_BRIDGE_CTL_BUS_RESET) /* Don't walk the bus if it's reset. */
+             && dev->config[PCI_SECONDARY_BUS] <= bus_num
+             && bus_num <= dev->config[PCI_SUBORDINATE_BUS];
 }
 
 /* Whether a given bus number is in a range of a root bus */
@@ -2050,7 +2056,8 @@ static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num)
 }
 
 void pci_for_each_bus_depth_first(PCIBus *bus,
-                                  void *(*begin)(PCIBus *bus, void *parent_state),
+                                  void *(*begin)(PCIBus *bus,
+                                  void *parent_state),
                                   void (*end)(PCIBus *bus, void *state),
                                   void *parent_state)
 {
@@ -2363,7 +2370,8 @@ static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom,
     if (vmsd) {
         snprintf(name, sizeof(name), "%s.rom", vmsd->name);
     } else {
-        snprintf(name, sizeof(name), "%s.rom", object_get_typename(OBJECT(pdev)));
+        snprintf(name, sizeof(name), "%s.rom",
+                 object_get_typename(OBJECT(pdev)));
     }
     pdev->has_rom = true;
     memory_region_init_rom(&pdev->rom, OBJECT(pdev), name, size, &error_fatal);
@@ -2729,7 +2737,8 @@ static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
 
     if (pc->is_bridge) {
         pcibus_t base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
-        pcibus_t limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
+        pcibus_t limit = pci_bridge_get_limit(dev,
+                                              PCI_BASE_ADDRESS_MEM_PREFETCH);
 
         base = MAX(base, 0x1ULL << 32);
 
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 3789c17edc..4124f3c156 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -379,7 +379,8 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename)
     sec_bus->parent_dev = dev;
     sec_bus->map_irq = br->map_irq ? br->map_irq : pci_swizzle_map_irq_fn;
     sec_bus->address_space_mem = &br->address_space_mem;
-    memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", UINT64_MAX);
+    memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci",
+                       UINT64_MAX);
     sec_bus->address_space_io = &br->address_space_io;
     memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io",
                        4 * GiB);
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 5b48bae0f6..344d013c95 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -644,10 +644,10 @@ void pcie_cap_slot_write_config(PCIDevice *dev,
     if (ranges_overlap(addr, len, pos + PCI_EXP_SLTSTA, 2)) {
         /*
          * Guests tend to clears all bits during init.
-         * If they clear bits that weren't set this is racy and will lose events:
-         * not a big problem for manual button presses, but a problem for us.
-         * As a work-around, detect this and revert status to what it was
-         * before the write.
+         * If they clear bits that weren't set this is racy and will lose
+         * events: not a big problem for manual button presses, but a problem
+         * for us. As a work-around, detect this and revert status to what it
+         * was before the write.
          *
          * Note: in theory this can be detected as a duplicate button press
          * which cancels the previous press. Does not seem to happen in
@@ -658,7 +658,8 @@ void pcie_cap_slot_write_config(PCIDevice *dev,
                           PCI_EXP_SLTSTA_CC)
 
         if (val & ~old_slt_sta & PCIE_SLOT_EVENTS) {
-            sltsta = (sltsta & ~PCIE_SLOT_EVENTS) | (old_slt_sta & PCIE_SLOT_EVENTS);
+            sltsta = (sltsta & ~PCIE_SLOT_EVENTS) |
+                     (old_slt_sta & PCIE_SLOT_EVENTS);
             pci_set_word(exp_cap + PCI_EXP_SLTSTA, sltsta);
         }
         hotplug_event_clear(dev);
diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c
index 3534006f99..9a3f09fb25 100644
--- a/hw/pci/pcie_host.c
+++ b/hw/pci/pcie_host.c
@@ -79,8 +79,8 @@ static void pcie_host_init(Object *obj)
     PCIExpressHost *e = PCIE_HOST_BRIDGE(obj);
 
     e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
-    memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio",
-                          PCIE_MMCFG_SIZE_MAX);
+    memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e,
+                          "pcie-mmcfg-mmio", PCIE_MMCFG_SIZE_MAX);
 }
 
 void pcie_host_mmcfg_unmap(PCIExpressHost *e)
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 07/10] hw/pci-host/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (5 preceding siblings ...)
  2020-10-19 20:30 ` [PATCH 06/10] hw/pci/:split " Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 08/10] hw/char/:split " Gan Qixin
                   ` (4 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/pci-host/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/pci-host/gpex-acpi.c | 18 ++++++++----------
 hw/pci-host/pam.c       |  4 ++--
 hw/pci-host/ppce500.c   |  8 +++++---
 hw/pci-host/q35.c       | 11 +++++++----
 hw/pci-host/versatile.c |  5 +++--
 5 files changed, 25 insertions(+), 21 deletions(-)

diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index dbb350a837..a7cf59018d 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -64,12 +64,11 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
                             nr_pcie_buses));
     if (cfg->mmio32.size) {
         aml_append(rbuf,
-                   aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
-                                    AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
-                                    cfg->mmio32.base,
+                   aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
+                                    AML_MAX_FIXED, AML_NON_CACHEABLE,
+                                    AML_READ_WRITE, 0x0000, cfg->mmio32.base,
                                     cfg->mmio32.base + cfg->mmio32.size - 1,
-                                    0x0000,
-                                    cfg->mmio32.size));
+                                    0x0000, cfg->mmio32.size));
     }
     if (cfg->pio.size) {
         aml_append(rbuf,
@@ -81,12 +80,11 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
     }
     if (cfg->mmio64.size) {
         aml_append(rbuf,
-                   aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
-                                    AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
-                                    cfg->mmio64.base,
+                   aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED,
+                                    AML_MAX_FIXED, AML_NON_CACHEABLE,
+                                    AML_READ_WRITE, 0x0000, cfg->mmio64.base,
                                     cfg->mmio64.base + cfg->mmio64.size - 1,
-                                    0x0000,
-                                    cfg->mmio64.size));
+                                    0x0000, cfg->mmio64.size));
     }
     aml_append(dev, aml_name_decl("_CRS", rbuf));
 
diff --git a/hw/pci-host/pam.c b/hw/pci-host/pam.c
index a496205783..6253406abd 100644
--- a/hw/pci-host/pam.c
+++ b/hw/pci-host/pam.c
@@ -45,8 +45,8 @@ void init_pam(DeviceState *dev, MemoryRegion *ram_memory,
     memory_region_set_readonly(&mem->alias[1], true);
 
     /* XXX: should distinguish read/write cases */
-    memory_region_init_alias(&mem->alias[0], OBJECT(dev), "pam-pci", pci_address_space,
-                             start, size);
+    memory_region_init_alias(&mem->alias[0], OBJECT(dev), "pam-pci",
+                             pci_address_space, start, size);
     memory_region_init_alias(&mem->alias[2], OBJECT(dev), "pam-pci", ram_memory,
                              start, size);
 
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index 9517aab913..d3e8e77236 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -423,8 +423,9 @@ static void e500_pcihost_bridge_realize(PCIDevice *d, Error **errp)
     PPCE500CCSRState *ccsr = CCSR(container_get(qdev_get_machine(),
                                   "/e500-ccsr"));
 
-    memory_region_init_alias(&b->bar0, OBJECT(ccsr), "e500-pci-bar0", &ccsr->ccsr_space,
-                             0, int128_get64(ccsr->ccsr_space.size));
+    memory_region_init_alias(&b->bar0, OBJECT(ccsr), "e500-pci-bar0",
+                             &ccsr->ccsr_space, 0,
+                             int128_get64(ccsr->ccsr_space.size));
     pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &b->bar0);
 }
 
@@ -474,7 +475,8 @@ static void e500_pcihost_realize(DeviceState *dev, Error **errp)
 
     pci_create_simple(b, 0, "e500-host-bridge");
 
-    memory_region_init(&s->container, OBJECT(h), "pci-container", PCIE500_ALL_SIZE);
+    memory_region_init(&s->container, OBJECT(h), "pci-container",
+                       PCIE500_ALL_SIZE);
     memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_be_ops, h,
                           "pci-conf-idx", 4);
     memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, h,
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index b67cb9c29f..8c4031dda7 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -573,14 +573,17 @@ static void mch_realize(PCIDevice *d, Error **errp)
 
     /* if *disabled* show SMRAM to all CPUs */
     memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region",
-                             mch->pci_address_space, MCH_HOST_BRIDGE_SMRAM_C_BASE,
+                             mch->pci_address_space,
+                             MCH_HOST_BRIDGE_SMRAM_C_BASE,
                              MCH_HOST_BRIDGE_SMRAM_C_SIZE);
-    memory_region_add_subregion_overlap(mch->system_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE,
+    memory_region_add_subregion_overlap(mch->system_memory,
+                                        MCH_HOST_BRIDGE_SMRAM_C_BASE,
                                         &mch->smram_region, 1);
     memory_region_set_enabled(&mch->smram_region, true);
 
-    memory_region_init_alias(&mch->open_high_smram, OBJECT(mch), "smram-open-high",
-                             mch->ram_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE,
+    memory_region_init_alias(&mch->open_high_smram, OBJECT(mch),
+                             "smram-open-high", mch->ram_memory,
+                             MCH_HOST_BRIDGE_SMRAM_C_BASE,
                              MCH_HOST_BRIDGE_SMRAM_C_SIZE);
     memory_region_add_subregion_overlap(mch->system_memory, 0xfeda0000,
                                         &mch->open_high_smram, 1);
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 3553277f94..1dab38e695 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -454,8 +454,9 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
      * offsets are guest controllable via the IMAP registers.
      */
     for (i = 0; i < 3; i++) {
-        memory_region_init_alias(&s->pci_mem_window[i], OBJECT(s), "pci-vbp-window",
-                                 &s->pci_mem_space, 0, s->mem_win_size[i]);
+        memory_region_init_alias(&s->pci_mem_window[i], OBJECT(s),
+                                 "pci-vbp-window", &s->pci_mem_space, 0,
+                                 s->mem_win_size[i]);
         sysbus_init_mmio(sbd, &s->pci_mem_window[i]);
     }
 
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 08/10] hw/char/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (6 preceding siblings ...)
  2020-10-19 20:30 ` [PATCH 07/10] hw/pci-host/:split " Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 09/10] hw/input/:split " Gan Qixin
                   ` (3 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/char/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/char/ibex_uart.c         | 12 +++++---
 hw/char/omap_uart.c         |  3 +-
 hw/char/parallel.c          | 12 +++++---
 hw/char/serial.c            | 57 ++++++++++++++++++++++++++-----------
 hw/char/virtio-serial-bus.c |  3 +-
 5 files changed, 60 insertions(+), 27 deletions(-)

diff --git a/hw/char/ibex_uart.c b/hw/char/ibex_uart.c
index cc49a35013..9e363d72ee 100644
--- a/hw/char/ibex_uart.c
+++ b/hw/char/ibex_uart.c
@@ -36,25 +36,29 @@
 
 static void ibex_uart_update_irqs(IbexUartState *s)
 {
-    if (s->uart_intr_state & s->uart_intr_enable & R_INTR_STATE_TX_WATERMARK_MASK) {
+    if (s->uart_intr_state & s->uart_intr_enable &
+        R_INTR_STATE_TX_WATERMARK_MASK) {
         qemu_set_irq(s->tx_watermark, 1);
     } else {
         qemu_set_irq(s->tx_watermark, 0);
     }
 
-    if (s->uart_intr_state & s->uart_intr_enable & R_INTR_STATE_RX_WATERMARK_MASK) {
+    if (s->uart_intr_state & s->uart_intr_enable &
+        R_INTR_STATE_RX_WATERMARK_MASK) {
         qemu_set_irq(s->rx_watermark, 1);
     } else {
         qemu_set_irq(s->rx_watermark, 0);
     }
 
-    if (s->uart_intr_state & s->uart_intr_enable & R_INTR_STATE_TX_EMPTY_MASK) {
+    if (s->uart_intr_state & s->uart_intr_enable &
+        R_INTR_STATE_TX_EMPTY_MASK) {
         qemu_set_irq(s->tx_empty, 1);
     } else {
         qemu_set_irq(s->tx_empty, 0);
     }
 
-    if (s->uart_intr_state & s->uart_intr_enable & R_INTR_STATE_RX_OVERFLOW_MASK) {
+    if (s->uart_intr_state & s->uart_intr_enable &
+        R_INTR_STATE_RX_OVERFLOW_MASK) {
         qemu_set_irq(s->rx_overflow, 1);
     } else {
         qemu_set_irq(s->rx_overflow, 0);
diff --git a/hw/char/omap_uart.c b/hw/char/omap_uart.c
index e8da933378..e45f5bf117 100644
--- a/hw/char/omap_uart.c
+++ b/hw/char/omap_uart.c
@@ -168,7 +168,8 @@ struct omap_uart_s *omap2_uart_init(MemoryRegion *sysmem,
     struct omap_uart_s *s = omap_uart_init(base, irq,
                     fclk, iclk, txdma, rxdma, label, chr);
 
-    memory_region_init_io(&s->iomem, NULL, &omap_uart_ops, s, "omap.uart", 0x100);
+    memory_region_init_io(&s->iomem, NULL, &omap_uart_ops, s,
+                          "omap.uart", 0x100);
 
     s->ta = ta;
 
diff --git a/hw/char/parallel.c b/hw/char/parallel.c
index 8b418abf71..b1f6a0572b 100644
--- a/hw/char/parallel.c
+++ b/hw/char/parallel.c
@@ -73,7 +73,8 @@
 #define PARA_CTR_AUTOLF	0x02	/* Auto linefeed complement */
 #define PARA_CTR_STROBE	0x01	/* Strobe complement */
 
-#define PARA_CTR_SIGNAL (PARA_CTR_SELECT|PARA_CTR_INIT|PARA_CTR_AUTOLF|PARA_CTR_STROBE)
+#define PARA_CTR_SIGNAL (PARA_CTR_SELECT | PARA_CTR_INIT | PARA_CTR_AUTOLF | \
+                         PARA_CTR_STROBE)
 
 typedef struct ParallelState {
     MemoryRegion iomem;
@@ -294,7 +295,8 @@ static uint32_t parallel_ioport_read_sw(void *opaque, uint32_t addr)
     case PARA_REG_STS:
         ret = s->status;
         s->irq_pending = 0;
-        if ((s->status & PARA_STS_BUSY) == 0 && (s->control & PARA_CTR_STROBE) == 0) {
+        if ((s->status & PARA_STS_BUSY) == 0 &&
+            (s->control & PARA_CTR_STROBE) == 0) {
             /* XXX Fixme: wait 5 microseconds */
             if (s->status & PARA_STS_ACK)
                 s->status &= ~PARA_STS_ACK;
@@ -397,7 +399,8 @@ parallel_ioport_eppdata_read_hw2(void *opaque, uint32_t addr)
     struct ParallelIOArg ioarg = {
         .buffer = &eppdata, .count = sizeof(eppdata)
     };
-    if ((s->control & (PARA_CTR_DIR|PARA_CTR_SIGNAL)) != (PARA_CTR_DIR|PARA_CTR_INIT)) {
+    if ((s->control & (PARA_CTR_DIR | PARA_CTR_SIGNAL)) !=
+        (PARA_CTR_DIR | PARA_CTR_INIT)) {
         /* Controls not correct for EPP data cycle, so do nothing */
         pdebug("re%04x s\n", eppdata);
         return eppdata;
@@ -425,7 +428,8 @@ parallel_ioport_eppdata_read_hw4(void *opaque, uint32_t addr)
     struct ParallelIOArg ioarg = {
         .buffer = &eppdata, .count = sizeof(eppdata)
     };
-    if ((s->control & (PARA_CTR_DIR|PARA_CTR_SIGNAL)) != (PARA_CTR_DIR|PARA_CTR_INIT)) {
+    if ((s->control & (PARA_CTR_DIR | PARA_CTR_SIGNAL)) !=
+        (PARA_CTR_DIR | PARA_CTR_INIT)) {
         /* Controls not correct for EPP data cycle, so do nothing */
         pdebug("re%08x s\n", eppdata);
         return eppdata;
diff --git a/hw/char/serial.c b/hw/char/serial.c
index 97f71879ff..cbc662e077 100644
--- a/hw/char/serial.c
+++ b/hw/char/serial.c
@@ -86,7 +86,10 @@
 #define UART_LSR_DR	0x01	/* Receiver data ready */
 #define UART_LSR_INT_ANY 0x1E	/* Any of the lsr-interrupt-triggering status bits */
 
-/* Interrupt trigger levels. The byte-counts are for 16550A - in newer UARTs the byte-count for each ITL is higher. */
+/*
+ * Interrupt trigger levels. The byte-counts are for 16550A - in newer UARTs the
+ * byte-count for each ITL is higher.
+ */
 
 #define UART_FCR_ITL_1      0x00 /* 1 byte ITL */
 #define UART_FCR_ITL_2      0x40 /* 4 bytes ITL */
@@ -195,10 +198,14 @@ static void serial_update_msl(SerialState *s)
 
     omsr = s->msr;
 
-    s->msr = (flags & CHR_TIOCM_CTS) ? s->msr | UART_MSR_CTS : s->msr & ~UART_MSR_CTS;
-    s->msr = (flags & CHR_TIOCM_DSR) ? s->msr | UART_MSR_DSR : s->msr & ~UART_MSR_DSR;
-    s->msr = (flags & CHR_TIOCM_CAR) ? s->msr | UART_MSR_DCD : s->msr & ~UART_MSR_DCD;
-    s->msr = (flags & CHR_TIOCM_RI) ? s->msr | UART_MSR_RI : s->msr & ~UART_MSR_RI;
+    s->msr = (flags & CHR_TIOCM_CTS) ? s->msr | UART_MSR_CTS :
+              s->msr & ~UART_MSR_CTS;
+    s->msr = (flags & CHR_TIOCM_DSR) ? s->msr | UART_MSR_DSR :
+              s->msr & ~UART_MSR_DSR;
+    s->msr = (flags & CHR_TIOCM_CAR) ? s->msr | UART_MSR_DCD :
+              s->msr & ~UART_MSR_DCD;
+    s->msr = (flags & CHR_TIOCM_RI) ? s->msr | UART_MSR_RI :
+              s->msr & ~UART_MSR_RI;
 
     if (s->msr != omsr) {
          /* Set delta bits */
@@ -209,8 +216,11 @@ static void serial_update_msl(SerialState *s)
          serial_update_irq(s);
     }
 
-    /* The real 16550A apparently has a 250ns response latency to line status changes.
-       We'll be lazy and poll only every 10ms, and only poll it at all if MSI interrupts are turned on */
+    /*
+     * The real 16550A apparently has a 250ns response latency to line status
+     * changes. We'll be lazy and poll only every 10ms, and only poll it at all
+     * if MSI interrupts are turned on
+     */
 
     if (s->poll_msl) {
         timer_mod(s->modem_status_poll, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
@@ -369,8 +379,10 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
         } else {
             uint8_t changed = (s->ier ^ val) & 0x0f;
             s->ier = val & 0x0f;
-            /* If the backend device is a real serial port, turn polling of the modem
-             * status lines on physical port on or off depending on UART_IER_MSI state.
+            /*
+             * If the backend device is a real serial port, turn polling of the
+             * modem status lines on physical port on or off depending on
+             * UART_IER_MSI state.
              */
             if ((changed & UART_IER_MSI) && s->poll_msl >= 0) {
                 if (s->ier & UART_IER_MSI) {
@@ -386,9 +398,9 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
              * if LSR.THRE=1, even if it had been masked before by reading IIR.
              * This is not in the datasheet, but Windows relies on it.  It is
              * unclear if THRE has to be resampled every time THRI becomes
-             * 1, or only on the rising edge.  Bochs does the latter, and Windows
-             * always toggles IER to all zeroes and back to all ones, so do the
-             * same.
+             * 1, or only on the rising edge.  Bochs does the latter, and
+             * Windows always toggles IER to all zeroes and back to all ones,
+             * so do the same.
              *
              * If IER.THRI is zero, thr_ipending is not used.  Set it to zero
              * so that the thr_ipending subsection is not migrated.
@@ -407,7 +419,10 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
         }
         break;
     case 2:
-        /* Did the enable/disable flag change? If so, make sure FIFOs get flushed */
+        /*
+         * Did the enable/disable flag change? If so, make sure FIFOs get
+         * flushed
+         */
         if ((val ^ s->fcr) & UART_FCR_FE) {
             val |= UART_FCR_XFR | UART_FCR_RFR;
         }
@@ -452,9 +467,14 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
 
             if (s->poll_msl >= 0 && old_mcr != s->mcr) {
                 serial_update_tiocm(s);
-                /* Update the modem status after a one-character-send wait-time, since there may be a response
-                   from the device/computer at the other end of the serial line */
-                timer_mod(s->modem_status_poll, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->char_transmit_time);
+                /*
+                 * Update the modem status after a one-character-send wait-time,
+                 * since there may be a response from the device/computer at the
+                 * other end of the serial line
+                 */
+                timer_mod(s->modem_status_poll,
+                          qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
+                          s->char_transmit_time);
             }
         }
         break;
@@ -584,7 +604,10 @@ static void serial_receive_break(SerialState *s)
     serial_update_irq(s);
 }
 
-/* There's data in recv_fifo and s->rbr has not been read for 4 char transmit times */
+/*
+ * There's data in recv_fifo and s->rbr has not been read for 4 char transmit
+ * times
+ */
 static void fifo_timeout_int (void *opaque) {
     SerialState *s = opaque;
     if (s->recv_fifo.num) {
diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c
index cf08ef9728..5921377c51 100644
--- a/hw/char/virtio-serial-bus.c
+++ b/hw/char/virtio-serial-bus.c
@@ -1085,7 +1085,8 @@ static void virtio_serial_device_realize(DeviceState *dev, Error **errp)
         vser->ovqs[i] = virtio_add_queue(vdev, 128, handle_output);
     }
 
-    vser->ports_map = g_malloc0((DIV_ROUND_UP(vser->serial.max_virtserial_ports, 32))
+    vser->ports_map = g_malloc0((DIV_ROUND_UP(vser->serial.max_virtserial_ports,
+                                              32))
         * sizeof(vser->ports_map[0]));
     /*
      * Reserve location 0 for a console port for backward compat
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 09/10] hw/input/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (7 preceding siblings ...)
  2020-10-19 20:30 ` [PATCH 08/10] hw/char/:split " Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-19 20:30 ` [PATCH 10/10] hw/riscv/:split " Gan Qixin
                   ` (2 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/input/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/input/hid.c               |  3 ++-
 hw/input/milkymist-softusb.c | 16 ++++++++++------
 hw/input/pxa2xx_keypad.c     |  3 ++-
 hw/input/virtio-input.c      |  3 ++-
 4 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/hw/input/hid.c b/hw/input/hid.c
index 89239b5634..f3074e3b07 100644
--- a/hw/input/hid.c
+++ b/hw/input/hid.c
@@ -100,7 +100,8 @@ void hid_set_next_idle(HIDState *hs)
         uint64_t expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
                                NANOSECONDS_PER_SECOND * hs->idle * 4 / 1000;
         if (!hs->idle_timer) {
-            hs->idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, hid_idle_timer, hs);
+            hs->idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, hid_idle_timer,
+                                          hs);
         }
         timer_mod_ns(hs->idle_timer, expire_time);
     } else {
diff --git a/hw/input/milkymist-softusb.c b/hw/input/milkymist-softusb.c
index 5acd7a6f7d..7f7a87be28 100644
--- a/hw/input/milkymist-softusb.c
+++ b/hw/input/milkymist-softusb.c
@@ -259,13 +259,15 @@ static void milkymist_softusb_realize(DeviceState *dev, Error **errp)
     sysbus_init_mmio(sbd, &s->regs_region);
 
     /* register pmem and dmem */
-    memory_region_init_ram_nomigrate(&s->pmem, OBJECT(s), "milkymist-softusb.pmem",
-                           s->pmem_size, &error_fatal);
+    memory_region_init_ram_nomigrate(&s->pmem, OBJECT(s),
+                                     "milkymist-softusb.pmem", s->pmem_size,
+                                     &error_fatal);
     vmstate_register_ram_global(&s->pmem);
     s->pmem_ptr = memory_region_get_ram_ptr(&s->pmem);
     sysbus_init_mmio(sbd, &s->pmem);
-    memory_region_init_ram_nomigrate(&s->dmem, OBJECT(s), "milkymist-softusb.dmem",
-                           s->dmem_size, &error_fatal);
+    memory_region_init_ram_nomigrate(&s->dmem, OBJECT(s),
+                                     "milkymist-softusb.dmem", s->dmem_size,
+                                     &error_fatal);
     vmstate_register_ram_global(&s->dmem);
     s->dmem_ptr = memory_region_get_ram_ptr(&s->dmem);
     sysbus_init_mmio(sbd, &s->dmem);
@@ -289,8 +291,10 @@ static const VMStateDescription vmstate_milkymist_softusb = {
 };
 
 static Property milkymist_softusb_properties[] = {
-    DEFINE_PROP_UINT32("pmem_size", MilkymistSoftUsbState, pmem_size, 0x00001000),
-    DEFINE_PROP_UINT32("dmem_size", MilkymistSoftUsbState, dmem_size, 0x00002000),
+    DEFINE_PROP_UINT32("pmem_size", MilkymistSoftUsbState,
+                       pmem_size, 0x00001000),
+    DEFINE_PROP_UINT32("dmem_size", MilkymistSoftUsbState,
+                       dmem_size, 0x00002000),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/hw/input/pxa2xx_keypad.c b/hw/input/pxa2xx_keypad.c
index 7f2f739fb3..7999fc2430 100644
--- a/hw/input/pxa2xx_keypad.c
+++ b/hw/input/pxa2xx_keypad.c
@@ -101,7 +101,8 @@ struct PXA2xxKeyPadState {
     uint32_t    kpkdi;
 };
 
-static void pxa27x_keypad_find_pressed_key(PXA2xxKeyPadState *kp, int *row, int *col)
+static void pxa27x_keypad_find_pressed_key(PXA2xxKeyPadState *kp, int *row,
+                                           int *col)
 {
     int i;
     for (i = 0; i < 4; i++)
diff --git a/hw/input/virtio-input.c b/hw/input/virtio-input.c
index 54bcb46c74..c7fa659e92 100644
--- a/hw/input/virtio-input.c
+++ b/hw/input/virtio-input.c
@@ -61,7 +61,8 @@ void virtio_input_send(VirtIOInput *vinput, virtio_input_event *event)
     for (i = 0; i < vinput->qindex; i++) {
         elem = vinput->queue[i].elem;
         len = iov_from_buf(elem->in_sg, elem->in_num,
-                           0, &vinput->queue[i].event, sizeof(virtio_input_event));
+                           0, &vinput->queue[i].event,
+                           sizeof(virtio_input_event));
         virtqueue_push(vinput->evt, elem, len);
         g_free(elem);
     }
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 10/10] hw/riscv/:split some lines containing more than 80 characters
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (8 preceding siblings ...)
  2020-10-19 20:30 ` [PATCH 09/10] hw/input/:split " Gan Qixin
@ 2020-10-19 20:30 ` Gan Qixin
  2020-10-20 11:13 ` [PATCH 00/10] Fix line over 80 characters warning Daniel P. Berrangé
  2020-10-20 11:14 ` Peter Maydell
  11 siblings, 0 replies; 15+ messages in thread
From: Gan Qixin @ 2020-10-19 20:30 UTC (permalink / raw)
  To: qemu-devel, qemu-trivial
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, f4bug,
	alistair.francis, Gan Qixin, kuhn.chenqun, david

By using scripts/checkpatch.pl, it is found that many files in hw/riscv/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/riscv/opentitan.c |  6 ++++--
 hw/riscv/sifive_e.c  |  6 ++++--
 hw/riscv/sifive_u.c  | 12 ++++++++----
 3 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 0531bd879b..f587d5993e 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -121,7 +121,8 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
         memmap[IBEX_DEV_ROM].base, &s->rom);
 
     /* Flash memory */
-    memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc), "riscv.lowrisc.ibex.flash",
+    memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc),
+                           "riscv.lowrisc.ibex.flash",
                            memmap[IBEX_DEV_FLASH].size, &error_fatal);
     memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base,
                                 &s->flash_mem);
@@ -172,7 +173,8 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
     create_unimplemented_device("riscv.lowrisc.ibex.pinmux",
         memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size);
     create_unimplemented_device("riscv.lowrisc.ibex.alert_handler",
-        memmap[IBEX_DEV_ALERT_HANDLER].base, memmap[IBEX_DEV_ALERT_HANDLER].size);
+        memmap[IBEX_DEV_ALERT_HANDLER].base,
+        memmap[IBEX_DEV_ALERT_HANDLER].size);
     create_unimplemented_device("riscv.lowrisc.ibex.nmi_gen",
         memmap[IBEX_DEV_NMI_GEN].base, memmap[IBEX_DEV_NMI_GEN].size);
     create_unimplemented_device("riscv.lowrisc.ibex.usbdev",
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index fcfac16816..80ef2f857e 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -111,7 +111,8 @@ static void sifive_e_machine_init(MachineState *machine)
         reset_vec[i] = cpu_to_le32(reset_vec[i]);
     }
     rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
-                          memmap[SIFIVE_E_DEV_MROM].base, &address_space_memory);
+                          memmap[SIFIVE_E_DEV_MROM].base,
+                          &address_space_memory);
 
     if (machine->kernel_filename) {
         riscv_load_kernel(machine->kernel_filename, NULL);
@@ -227,7 +228,8 @@ static void sifive_e_soc_realize(DeviceState *dev, Error **errp)
     }
 
     /* Map GPIO registers */
-    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, memmap[SIFIVE_E_DEV_GPIO0].base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0,
+                    memmap[SIFIVE_E_DEV_GPIO0].base);
 
     /* Pass all GPIOs to the SOC layer so they are available to the board */
     qdev_pass_gpios(DEVICE(&s->gpio), dev, NULL);
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 6ad975d692..2c06d1a319 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -528,7 +528,8 @@ static void sifive_u_machine_init(MachineState *machine)
         reset_vec[i] = cpu_to_le32(reset_vec[i]);
     }
     rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
-                          memmap[SIFIVE_U_DEV_MROM].base, &address_space_memory);
+                          memmap[SIFIVE_U_DEV_MROM].base,
+                          &address_space_memory);
 
     riscv_rom_copy_firmware_info(memmap[SIFIVE_U_DEV_MROM].base,
                                  memmap[SIFIVE_U_DEV_MROM].size,
@@ -542,7 +543,8 @@ static bool sifive_u_machine_get_start_in_flash(Object *obj, Error **errp)
     return s->start_in_flash;
 }
 
-static void sifive_u_machine_set_start_in_flash(Object *obj, bool value, Error **errp)
+static void sifive_u_machine_set_start_in_flash(Object *obj, bool value,
+                                                Error **errp)
 {
     SiFiveUState *s = RISCV_U_MACHINE(obj);
 
@@ -731,13 +733,15 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp)
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->prci), errp)) {
         return;
     }
-    sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0, memmap[SIFIVE_U_DEV_PRCI].base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0,
+                    memmap[SIFIVE_U_DEV_PRCI].base);
 
     qdev_prop_set_uint32(DEVICE(&s->gpio), "ngpio", 16);
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
         return;
     }
-    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, memmap[SIFIVE_U_DEV_GPIO].base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0,
+                    memmap[SIFIVE_U_DEV_GPIO].base);
 
     /* Pass all GPIOs to the SOC layer so they are available to the board */
     qdev_pass_gpios(DEVICE(&s->gpio), dev, NULL);
-- 
2.23.0



^ permalink raw reply related	[flat|nested] 15+ messages in thread

* Re: [PATCH 00/10] Fix line over 80 characters warning
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (9 preceding siblings ...)
  2020-10-19 20:30 ` [PATCH 10/10] hw/riscv/:split " Gan Qixin
@ 2020-10-20 11:13 ` Daniel P. Berrangé
  2020-10-20 12:24   ` ganqixin
  2020-10-20 11:14 ` Peter Maydell
  11 siblings, 1 reply; 15+ messages in thread
From: Daniel P. Berrangé @ 2020-10-20 11:13 UTC (permalink / raw)
  To: Gan Qixin
  Cc: lvivier, peter.maydell, zhang.zhanghailiang, mst, qemu-trivial,
	qemu-devel, f4bug, alistair.francis, kuhn.chenqun, david

On Tue, Oct 20, 2020 at 04:30:13AM +0800, Gan Qixin wrote:
> Hi all,
>     I used scripts/checkpatch.pl to find that many files in the hw directory 
> contain lines with more than 80 characters. Therefore, I splited some lines to
> fix this warning.

Do we really need to still fix ourselves to a 80 col limit in the
year 2020 ?

Linux increased their max line length to 100 chars and even set
checkpatch.pl to not complain about that limit unless --strict
is given.

80 chars is fine as a "wish list" target, but IMHO the code often
benefits more from exceeding 80 chars, and not wrapping.

Regards,
Daniel
-- 
|: https://berrange.com      -o-    https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org         -o-            https://fstop138.berrange.com :|
|: https://entangle-photo.org    -o-    https://www.instagram.com/dberrange :|



^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 00/10] Fix line over 80 characters warning
  2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
                   ` (10 preceding siblings ...)
  2020-10-20 11:13 ` [PATCH 00/10] Fix line over 80 characters warning Daniel P. Berrangé
@ 2020-10-20 11:14 ` Peter Maydell
  2020-10-20 12:24   ` ganqixin
  11 siblings, 1 reply; 15+ messages in thread
From: Peter Maydell @ 2020-10-20 11:14 UTC (permalink / raw)
  To: Gan Qixin
  Cc: Laurent Vivier, zhanghailiang, Michael S. Tsirkin, QEMU Trivial,
	Philippe Mathieu-Daudé,
	QEMU Developers, Alistair Francis, Chenqun (kuhn),
	David Gibson

On Tue, 20 Oct 2020 at 12:03, Gan Qixin <ganqixin@huawei.com> wrote:
>
> Hi all,
>     I used scripts/checkpatch.pl to find that many files in the hw directory
> contain lines with more than 80 characters. Therefore, I splited some lines to
> fix this warning.

I personally have come round to the idea that we should instead
adjust checkpatch so that it doesn't have a hard 80 character
complaint limit.

Compare the kernel coding style change:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=bdc48fa11e46f867ea4d75fa59ee87a7f48be144

whose rationale I agree with. We should *prefer* 80 character
wrapping, but there are some places where an 85-character
line is much more readable and sensible style than inserting
a line break just to please checkpatch.

thanks
-- PMM


^ permalink raw reply	[flat|nested] 15+ messages in thread

* RE: [PATCH 00/10] Fix line over 80 characters warning
  2020-10-20 11:14 ` Peter Maydell
@ 2020-10-20 12:24   ` ganqixin
  0 siblings, 0 replies; 15+ messages in thread
From: ganqixin @ 2020-10-20 12:24 UTC (permalink / raw)
  To: Peter Maydell
  Cc: Laurent Vivier, Zhanghailiang, Michael S. Tsirkin, QEMU Trivial,
	Philippe Mathieu-Daudé,
	QEMU Developers, Alistair Francis, Chenqun (kuhn),
	David Gibson



> -----Original Message-----
> From: Peter Maydell [mailto:peter.maydell@linaro.org]
> Sent: Tuesday, October 20, 2020 7:15 PM
> To: ganqixin <ganqixin@huawei.com>
> Cc: QEMU Developers <qemu-devel@nongnu.org>; QEMU Trivial
> <qemu-trivial@nongnu.org>; Michael S. Tsirkin <mst@redhat.com>; Philippe
> Mathieu-Daudé <f4bug@amsat.org>; Laurent Vivier <lvivier@redhat.com>;
> David Gibson <david@gibson.dropbear.id.au>; Alistair Francis
> <alistair.francis@wdc.com>; Chenqun (kuhn) <kuhn.chenqun@huawei.com>;
> Zhanghailiang <zhang.zhanghailiang@huawei.com>
> Subject: Re: [PATCH 00/10] Fix line over 80 characters warning
> 
> On Tue, 20 Oct 2020 at 12:03, Gan Qixin <ganqixin@huawei.com> wrote:
> >
> > Hi all,
> >     I used scripts/checkpatch.pl to find that many files in the hw
> > directory contain lines with more than 80 characters. Therefore, I
> > splited some lines to fix this warning.
> 
> I personally have come round to the idea that we should instead adjust
> checkpatch so that it doesn't have a hard 80 character complaint limit.
> 

Hi Peter,
  It sounds like a good idea, I think I can try to modify checkpatch.pl by referring to the Linux patch.

Thanks,
Gan Qixin

> Compare the kernel coding style change:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=
> bdc48fa11e46f867ea4d75fa59ee87a7f48be144
> 
> whose rationale I agree with. We should *prefer* 80 character wrapping, but
> there are some places where an 85-character line is much more readable and
> sensible style than inserting a line break just to please checkpatch.
> 
> thanks
> -- PMM

^ permalink raw reply	[flat|nested] 15+ messages in thread

* RE: [PATCH 00/10] Fix line over 80 characters warning
  2020-10-20 11:13 ` [PATCH 00/10] Fix line over 80 characters warning Daniel P. Berrangé
@ 2020-10-20 12:24   ` ganqixin
  0 siblings, 0 replies; 15+ messages in thread
From: ganqixin @ 2020-10-20 12:24 UTC (permalink / raw)
  To: Daniel P. Berrangé
  Cc: lvivier, peter.maydell, Zhanghailiang, mst, qemu-trivial,
	qemu-devel, f4bug, alistair.francis, Chenqun (kuhn),
	david



> -----Original Message-----
> From: Daniel P. Berrangé [mailto:berrange@redhat.com]
> Sent: Tuesday, October 20, 2020 7:14 PM
> To: ganqixin <ganqixin@huawei.com>
> Cc: qemu-devel@nongnu.org; qemu-trivial@nongnu.org; lvivier@redhat.com;
> peter.maydell@linaro.org; Zhanghailiang <zhang.zhanghailiang@huawei.com>;
> mst@redhat.com; f4bug@amsat.org; alistair.francis@wdc.com; Chenqun
> (kuhn) <kuhn.chenqun@huawei.com>; david@gibson.dropbear.id.au
> Subject: Re: [PATCH 00/10] Fix line over 80 characters warning
> 
> On Tue, Oct 20, 2020 at 04:30:13AM +0800, Gan Qixin wrote:
> > Hi all,
> >     I used scripts/checkpatch.pl to find that many files in the hw
> > directory contain lines with more than 80 characters. Therefore, I
> > splited some lines to fix this warning.
> 
> Do we really need to still fix ourselves to a 80 col limit in the year 2020 ?
> 
> Linux increased their max line length to 100 chars and even set checkpatch.pl
> to not complain about that limit unless --strict is given.
> 
> 80 chars is fine as a "wish list" target, but IMHO the code often benefits more
> from exceeding 80 chars, and not wrapping.
> 

Hi Daniel,
  Yes, you are right! I also found this problem when I try to fix these warning. In some cases, the 80-character limit doesn't necessarily make code more readable. 

Thanks,
Gan Qixin

> Regards,
> Daniel
> --
> |: https://berrange.com      -o-
> https://www.flickr.com/photos/dberrange :|
> |: https://libvirt.org         -o-
> https://fstop138.berrange.com :|
> |: https://entangle-photo.org    -o-
> https://www.instagram.com/dberrange :|


^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2020-10-20 12:26 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-19 20:30 [PATCH 00/10] Fix line over 80 characters warning Gan Qixin
2020-10-19 20:30 ` [PATCH 01/10] hw/virtio/:split some lines containing more than 80 characters Gan Qixin
2020-10-19 20:30 ` [PATCH 02/10] hw/core/:split " Gan Qixin
2020-10-19 20:30 ` [PATCH 03/10] hw/ide/:split " Gan Qixin
2020-10-19 20:30 ` [PATCH 04/10] hw/intc/:split " Gan Qixin
2020-10-19 20:30 ` [PATCH 05/10] hw/misc/:split " Gan Qixin
2020-10-19 20:30 ` [PATCH 06/10] hw/pci/:split " Gan Qixin
2020-10-19 20:30 ` [PATCH 07/10] hw/pci-host/:split " Gan Qixin
2020-10-19 20:30 ` [PATCH 08/10] hw/char/:split " Gan Qixin
2020-10-19 20:30 ` [PATCH 09/10] hw/input/:split " Gan Qixin
2020-10-19 20:30 ` [PATCH 10/10] hw/riscv/:split " Gan Qixin
2020-10-20 11:13 ` [PATCH 00/10] Fix line over 80 characters warning Daniel P. Berrangé
2020-10-20 12:24   ` ganqixin
2020-10-20 11:14 ` Peter Maydell
2020-10-20 12:24   ` ganqixin

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