From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: Cathy Zhang <cathy.zhang@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Eduardo Habkost <ehabkost@redhat.com>,
Richard Henderson <rth@twiddle.net>
Subject: [PULL 11/17] x86/cpu: Add AVX512_FP16 cpu feature
Date: Thu, 17 Dec 2020 13:46:14 -0500 [thread overview]
Message-ID: <20201217184620.3945917-12-ehabkost@redhat.com> (raw)
In-Reply-To: <20201217184620.3945917-1-ehabkost@redhat.com>
From: Cathy Zhang <cathy.zhang@intel.com>
AVX512 Half-precision floating point (FP16) has better performance
compared to FP32 if the presicion or magnitude requirements are met.
It's defined as CPUID.(EAX=7,ECX=0):EDX[bit 23].
Refer to
https://software.intel.com/content/www/us/en/develop/download/\
intel-architecture-instruction-set-extensions-programming-reference.html
Signed-off-by: Cathy Zhang <cathy.zhang@intel.com>
Message-Id: <20201216224002.32677-1-cathy.zhang@intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target/i386/cpu.h | 2 ++
target/i386/cpu.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ee03263800..9b2ced97ea 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -784,6 +784,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_EDX_SERIALIZE (1U << 14)
/* TSX Suspend Load Address Tracking instruction */
#define CPUID_7_0_EDX_TSX_LDTRK (1U << 16)
+/* AVX512_FP16 instruction */
+#define CPUID_7_0_EDX_AVX512_FP16 (1U << 23)
/* Speculation Control */
#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26)
/* Single Thread Indirect Branch Predictors */
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 45b0588af3..608e9cacf9 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -979,7 +979,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
"avx512-vp2intersect", NULL, "md-clear", NULL,
NULL, NULL, "serialize", NULL,
"tsx-ldtrk", NULL, NULL /* pconfig */, NULL,
- NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, "avx512-fp16",
NULL, NULL, "spec-ctrl", "stibp",
NULL, "arch-capabilities", "core-capability", "ssbd",
},
--
2.28.0
next prev parent reply other threads:[~2020-12-17 18:53 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-17 18:46 [PULL 00/17] x86 queue, 2020-12-17 Eduardo Habkost
2020-12-17 18:46 ` [PULL 01/17] i386: move kvm accel files into kvm/ Eduardo Habkost
2020-12-17 18:46 ` [PULL 02/17] i386: move whpx accel files into whpx/ Eduardo Habkost
2020-12-17 18:46 ` [PULL 03/17] i386: move hax accel files into hax/ Eduardo Habkost
2020-12-17 18:46 ` [PULL 04/17] i386: hvf: remove stale MAINTAINERS entry for old hvf stubs Eduardo Habkost
2020-12-17 18:46 ` [PULL 05/17] i386: move TCG accel files into tcg/ Eduardo Habkost
2020-12-17 18:46 ` [PULL 06/17] i386: move cpu dump out of helper.c into cpu-dump.c Eduardo Habkost
2020-12-17 18:46 ` [PULL 07/17] i386: move hyperv_vendor_id initialization to x86_cpu_realizefn() Eduardo Habkost
2020-12-17 22:33 ` Claudio Fontana
2020-12-17 22:53 ` Eduardo Habkost
2020-12-17 23:34 ` Claudio Fontana
2020-12-17 23:47 ` Eduardo Habkost
2020-12-18 0:07 ` Claudio Fontana
2020-12-18 1:05 ` Eduardo Habkost
2020-12-18 8:50 ` Claudio Fontana
2020-12-17 18:46 ` [PULL 08/17] i386: move hyperv_interface_id " Eduardo Habkost
2020-12-17 18:46 ` [PULL 09/17] i386: move hyperv_version_id " Eduardo Habkost
2020-12-17 18:46 ` [PULL 10/17] i386: move hyperv_limits " Eduardo Habkost
2020-12-17 18:46 ` Eduardo Habkost [this message]
2020-12-17 18:46 ` [PULL 12/17] i386: move TCG cpu class initialization to tcg/ Eduardo Habkost
2020-12-17 18:46 ` [PULL 13/17] i386: tcg: remove inline from cpu_load_eflags Eduardo Habkost
2020-12-17 18:46 ` [PULL 14/17] tcg: cpu_exec_{enter,exit} helpers Eduardo Habkost
2020-12-17 18:46 ` [PULL 15/17] tcg: make CPUClass.cpu_exec_* optional Eduardo Habkost
2020-12-17 18:46 ` [PULL 16/17] tcg: Make CPUClass.debug_excp_handler optional Eduardo Habkost
2020-12-17 18:46 ` [PULL 17/17] cpu: Remove unnecessary noop methods Eduardo Habkost
2020-12-17 20:48 ` [PULL 00/17] x86 queue, 2020-12-17 Peter Maydell
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