From: Gan Qixin <ganqixin@huawei.com>
To: <qemu-devel@nongnu.org>, <qemu-trivial@nongnu.org>
Cc: zhang.zhanghailiang@huawei.com,
Euler Robot <euler.robot@huawei.com>,
Richard Henderson <richard.henderson@linaro.org>,
Gan Qixin <ganqixin@huawei.com>,
Paolo Bonzini <pbonzini@redhat.com>,
kuhn.chenqun@huawei.com
Subject: [PATCH] util/cacheflush: Fix error generated by clang
Date: Fri, 15 Jan 2021 15:56:56 +0800 [thread overview]
Message-ID: <20210115075656.717957-1-ganqixin@huawei.com> (raw)
When compiling qemu-fuzz-i386 on aarch64 host, clang reported the following
error:
../util/cacheflush.c:38:44: error: value size does not match register size
specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0));
^
../util/cacheflush.c:38:24: note: use constraint modifier "w"
asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0));
^~
%w0
Modify the type of save_ctr_el0 to uint64_t to fix it.
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
---
util/cacheflush.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/util/cacheflush.c b/util/cacheflush.c
index 6a20723902..933355b0c9 100644
--- a/util/cacheflush.c
+++ b/util/cacheflush.c
@@ -32,7 +32,7 @@ void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
* We want to save the whole contents of CTR_EL0, so that we
* have more than the linesize, but also IDC and DIC.
*/
-static unsigned int save_ctr_el0;
+static uint64_t save_ctr_el0;
static void __attribute__((constructor)) init_ctr_el0(void)
{
asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0));
@@ -46,9 +46,9 @@ void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
{
const unsigned CTR_IDC = 1u << 28;
const unsigned CTR_DIC = 1u << 29;
- const unsigned int ctr_el0 = save_ctr_el0;
- const uintptr_t icache_lsize = 4 << extract32(ctr_el0, 0, 4);
- const uintptr_t dcache_lsize = 4 << extract32(ctr_el0, 16, 4);
+ const uint64_t ctr_el0 = save_ctr_el0;
+ const uintptr_t icache_lsize = 4 << extract64(ctr_el0, 0, 4);
+ const uintptr_t dcache_lsize = 4 << extract64(ctr_el0, 16, 4);
uintptr_t p;
/*
--
2.27.0
next reply other threads:[~2021-01-15 8:00 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-15 7:56 Gan Qixin [this message]
2021-01-15 16:39 ` [PATCH] util/cacheflush: Fix error generated by clang Richard Henderson
2021-01-17 16:43 ` Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210115075656.717957-1-ganqixin@huawei.com \
--to=ganqixin@huawei.com \
--cc=euler.robot@huawei.com \
--cc=kuhn.chenqun@huawei.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-trivial@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=zhang.zhanghailiang@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).