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From: Claudio Fontana <cfontana@suse.de>
To: "Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>
Cc: Laurent Vivier <lvivier@redhat.com>,
	Thomas Huth <thuth@redhat.com>,
	qemu-devel@nongnu.org, Roman Bolshakov <r.bolshakov@yadro.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Claudio Fontana <cfontana@suse.de>
Subject: [PATCH v14 12/22] physmem: make watchpoint checking code TCG-only
Date: Thu, 28 Jan 2021 10:28:04 +0100
Message-ID: <20210128092814.8676-13-cfontana@suse.de> (raw)
In-Reply-To: <20210128092814.8676-1-cfontana@suse.de>

cpu_check_watchpoint, watchpoint_address_matches are TCG-only.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
 softmmu/physmem.c | 141 +++++++++++++++++++++++-----------------------
 1 file changed, 72 insertions(+), 69 deletions(-)

diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index cdcd197656..ef94e32583 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -840,6 +840,7 @@ void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
     }
 }
 
+#ifdef CONFIG_TCG
 /* Return true if this watchpoint address matches the specified
  * access (ie the address range covered by the watchpoint overlaps
  * partially or completely with the address range covered by the
@@ -873,6 +874,77 @@ int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
     return ret;
 }
 
+/* Generate a debug exception if a watchpoint has been hit.  */
+void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
+                          MemTxAttrs attrs, int flags, uintptr_t ra)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+    CPUWatchpoint *wp;
+
+    assert(tcg_enabled());
+    if (cpu->watchpoint_hit) {
+        /*
+         * We re-entered the check after replacing the TB.
+         * Now raise the debug interrupt so that it will
+         * trigger after the current instruction.
+         */
+        qemu_mutex_lock_iothread();
+        cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
+        qemu_mutex_unlock_iothread();
+        return;
+    }
+
+    addr = cc->adjust_watchpoint_address(cpu, addr, len);
+    QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
+        if (watchpoint_address_matches(wp, addr, len)
+            && (wp->flags & flags)) {
+            if (replay_running_debug()) {
+                /*
+                 * Don't process the watchpoints when we are
+                 * in a reverse debugging operation.
+                 */
+                replay_breakpoint();
+                return;
+            }
+            if (flags == BP_MEM_READ) {
+                wp->flags |= BP_WATCHPOINT_HIT_READ;
+            } else {
+                wp->flags |= BP_WATCHPOINT_HIT_WRITE;
+            }
+            wp->hitaddr = MAX(addr, wp->vaddr);
+            wp->hitattrs = attrs;
+            if (!cpu->watchpoint_hit) {
+                if (wp->flags & BP_CPU &&
+                    !cc->debug_check_watchpoint(cpu, wp)) {
+                    wp->flags &= ~BP_WATCHPOINT_HIT;
+                    continue;
+                }
+                cpu->watchpoint_hit = wp;
+
+                mmap_lock();
+                tb_check_watchpoint(cpu, ra);
+                if (wp->flags & BP_STOP_BEFORE_ACCESS) {
+                    cpu->exception_index = EXCP_DEBUG;
+                    mmap_unlock();
+                    cpu_loop_exit_restore(cpu, ra);
+                } else {
+                    /* Force execution of one insn next time.  */
+                    cpu->cflags_next_tb = 1 | curr_cflags();
+                    mmap_unlock();
+                    if (ra) {
+                        cpu_restore_state(cpu, ra, true);
+                    }
+                    cpu_loop_exit_noexc(cpu);
+                }
+            }
+        } else {
+            wp->flags &= ~BP_WATCHPOINT_HIT;
+        }
+    }
+}
+
+#endif /* CONFIG_TCG */
+
 /* Called from RCU critical section */
 static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
 {
@@ -2355,75 +2427,6 @@ ram_addr_t qemu_ram_addr_from_host(void *ptr)
     return block->offset + offset;
 }
 
-/* Generate a debug exception if a watchpoint has been hit.  */
-void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
-                          MemTxAttrs attrs, int flags, uintptr_t ra)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-    CPUWatchpoint *wp;
-
-    assert(tcg_enabled());
-    if (cpu->watchpoint_hit) {
-        /*
-         * We re-entered the check after replacing the TB.
-         * Now raise the debug interrupt so that it will
-         * trigger after the current instruction.
-         */
-        qemu_mutex_lock_iothread();
-        cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
-        qemu_mutex_unlock_iothread();
-        return;
-    }
-
-    addr = cc->adjust_watchpoint_address(cpu, addr, len);
-    QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
-        if (watchpoint_address_matches(wp, addr, len)
-            && (wp->flags & flags)) {
-            if (replay_running_debug()) {
-                /*
-                 * Don't process the watchpoints when we are
-                 * in a reverse debugging operation.
-                 */
-                replay_breakpoint();
-                return;
-            }
-            if (flags == BP_MEM_READ) {
-                wp->flags |= BP_WATCHPOINT_HIT_READ;
-            } else {
-                wp->flags |= BP_WATCHPOINT_HIT_WRITE;
-            }
-            wp->hitaddr = MAX(addr, wp->vaddr);
-            wp->hitattrs = attrs;
-            if (!cpu->watchpoint_hit) {
-                if (wp->flags & BP_CPU &&
-                    !cc->debug_check_watchpoint(cpu, wp)) {
-                    wp->flags &= ~BP_WATCHPOINT_HIT;
-                    continue;
-                }
-                cpu->watchpoint_hit = wp;
-
-                mmap_lock();
-                tb_check_watchpoint(cpu, ra);
-                if (wp->flags & BP_STOP_BEFORE_ACCESS) {
-                    cpu->exception_index = EXCP_DEBUG;
-                    mmap_unlock();
-                    cpu_loop_exit_restore(cpu, ra);
-                } else {
-                    /* Force execution of one insn next time.  */
-                    cpu->cflags_next_tb = 1 | curr_cflags();
-                    mmap_unlock();
-                    if (ra) {
-                        cpu_restore_state(cpu, ra, true);
-                    }
-                    cpu_loop_exit_noexc(cpu);
-                }
-            }
-        } else {
-            wp->flags &= ~BP_WATCHPOINT_HIT;
-        }
-    }
-}
-
 static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
                                  MemTxAttrs attrs, void *buf, hwaddr len);
 static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
-- 
2.26.2



  parent reply index

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-28  9:27 [PATCH v14 00/22] i386 cleanup PART 2 Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 01/22] cpu: Introduce TCGCpuOperations struct Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 02/22] target/riscv: remove CONFIG_TCG, as it is always TCG Claudio Fontana
2021-01-28 18:34   ` Alex Bennée
2021-01-28  9:27 ` [PATCH v14 03/22] accel/tcg: split TCG-only code from cpu_exec_realizefn Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 04/22] cpu: Move synchronize_from_tb() to tcg_ops Claudio Fontana
2021-01-28 18:58   ` Alex Bennée
2021-01-28 23:01     ` Richard Henderson
2021-01-28  9:27 ` [PATCH v14 05/22] cpu: Move cpu_exec_* " Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 06/22] cpu: Move tlb_fill " Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 07/22] cpu: Move debug_excp_handler " Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 08/22] target/arm: do not use cc->do_interrupt for KVM directly Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 09/22] cpu: move cc->do_interrupt to tcg_ops Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 10/22] cpu: move cc->transaction_failed " Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 11/22] cpu: move do_unaligned_access " Claudio Fontana
2021-01-28  9:28 ` Claudio Fontana [this message]
2021-01-28 19:09   ` [PATCH v14 12/22] physmem: make watchpoint checking code TCG-only Alex Bennée
2021-01-28  9:28 ` [PATCH v14 13/22] cpu: move adjust_watchpoint_address to tcg_ops Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 14/22] cpu: move debug_check_watchpoint " Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 15/22] cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass Claudio Fontana
2021-01-29  0:31   ` Richard Henderson
2021-01-29  9:00     ` Claudio Fontana
2021-01-29 19:19       ` Richard Henderson
2021-01-29 19:36         ` Eduardo Habkost
2021-01-30  9:40           ` Claudio Fontana
2021-02-02 10:01     ` Claudio Fontana
2021-02-02 10:27       ` Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 16/22] accel: extend AccelState and AccelClass to user-mode Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 17/22] accel: replace struct CpusAccel with AccelOpsClass Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 18/22] accel: introduce AccelCPUClass extending CPUClass Claudio Fontana
2021-01-28 13:03   ` Philippe Mathieu-Daudé
2021-01-28 13:22     ` Claudio Fontana
2021-01-28 16:08       ` Alex Bennée
2021-01-28 16:29         ` Philippe Mathieu-Daudé
2021-01-29  0:13           ` Richard Henderson
2021-01-30 10:53             ` Claudio Fontana
2021-01-30 19:01               ` Richard Henderson
2021-02-01  9:15                 ` Alex Bennée
2021-02-01  9:22                   ` Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 19/22] i386: split cpu accelerators from cpu.c, using AccelCPUClass Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 20/22] cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefn Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 21/22] hw/core/cpu: call qemu_init_vcpu in cpu_common_realizefn Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 22/22] accel: introduce new accessor functions Claudio Fontana
2021-01-29  0:22 ` [PATCH v14 00/22] i386 cleanup PART 2 Richard Henderson

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