From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: <qemu-devel@nongnu.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Thomas Huth <thuth@redhat.com>,
Ben Widawsky <ben.widawsky@intel.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Vishal Verma <vishal.l.verma@intel.com>,
f.fangjian@huawei.com, Chris Browy <cbrowy@avery-design.com>,
f4bug@amsat.org, linuxarm@openeuler.org, jcm@redhat.com,
Prashant V Agarwal <agpr123@gmail.com>,
Igor Mammedov <imammedo@redhat.com>,
Dan Williams <dan.j.williams@intel.com>,
Richard Henderson <richard.henderson@linaro.org>,
alex.bennee@linaro.org
Subject: [RFC PATCH 2/3] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl
Date: Mon, 1 Feb 2021 23:26:54 +0800 [thread overview]
Message-ID: <20210201152655.31027-3-Jonathan.Cameron@huawei.com> (raw)
In-Reply-To: <20210201152655.31027-1-Jonathan.Cameron@huawei.com>
Code based on i386/pc enablement.
There is a small amount of directly cut and paste code so it may
make sense to unify that at some stage.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/arm/Kconfig | 1 +
hw/arm/virt-acpi-build.c | 27 +++++++++++++++++++++++++++
hw/arm/virt.c | 3 ++-
3 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 0a242e4c5d..c43862bb23 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -27,6 +27,7 @@ config ARM_VIRT
select ACPI_HW_REDUCED
select ACPI_NVDIMM
select ACPI_APEI
+ select ACPI_CXL
config CHEETAH
bool
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 9d9ee24053..ce7fd908d2 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -39,11 +39,13 @@
#include "hw/acpi/aml-build.h"
#include "hw/acpi/utils.h"
#include "hw/acpi/pci.h"
+#include "hw/acpi/cxl.h"
#include "hw/acpi/memory_hotplug.h"
#include "hw/acpi/generic_event_device.h"
#include "hw/acpi/tpm.h"
#include "hw/pci/pcie_host.h"
#include "hw/pci/pci.h"
+#include "hw/pci/pci_bus.h"
#include "hw/pci-host/gpex.h"
#include "hw/arm/virt.h"
#include "hw/mem/nvdimm.h"
@@ -155,11 +157,27 @@ static void acpi_dsdt_add_virtio(Aml *scope,
}
}
+/* Move the i386 definition somewhere common? */
+static void build_acpi0017(Aml *table)
+{
+ Aml *dev;
+ Aml *scope;
+
+ scope = aml_scope("_SB");
+ dev = aml_device("CXLM");
+ aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0017")));
+
+ aml_append(scope, dev);
+ aml_append(table, scope);
+}
+
static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
uint32_t irq, bool use_highmem, bool highmem_ecam,
VirtMachineState *vms)
{
int ecam_id = VIRT_ECAM_ID(highmem_ecam);
+ bool cxl_present = false;
+ PCIBus *bus = vms->bus;
struct GPEXConfig cfg = {
.mmio32 = memmap[VIRT_PCIE_MMIO],
.pio = memmap[VIRT_PCIE_PIO],
@@ -173,6 +191,14 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
}
acpi_dsdt_add_gpex(scope, &cfg);
+ QLIST_FOREACH(bus, &vms->bus->child, sibling) {
+ if (pci_bus_is_cxl(bus)) {
+ cxl_present = true;
+ }
+ }
+ if (cxl_present) {
+ build_acpi0017(scope);
+ }
}
static void acpi_dsdt_add_gpio(Aml *scope, const MemMapEntry *gpio_memmap,
@@ -724,6 +750,7 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables)
build_slit(tables_blob, tables->linker, ms);
}
}
+ cxl_build_cedt(table_offsets, tables_blob, tables->linker);
if (ms->nvdimms_state->is_enabled) {
nvdimm_build_acpi(table_offsets, tables_blob, tables->linker,
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a3ac20744b..4d760beea9 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -78,6 +78,7 @@
#include "hw/acpi/generic_event_device.h"
#include "hw/virtio/virtio-iommu.h"
#include "hw/char/pl011.h"
+#include "hw/cxl/cxl.h"
#include "qemu/guest-random.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
@@ -2481,7 +2482,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
hc->unplug_request = virt_machine_device_unplug_request_cb;
hc->unplug = virt_machine_device_unplug_cb;
mc->nvdimm_supported = true;
- mc->cxl_supported = false;
+ mc->cxl_supported = true;
mc->auto_enable_numa_with_memhp = true;
mc->auto_enable_numa_with_memdev = true;
mc->default_ram_id = "mach-virt.ram";
--
2.19.1
next prev parent reply other threads:[~2021-02-01 15:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 15:26 [RFC PATCH 0/3] hw/arm/virt: CXL enablement including gpex-acpi Jonathan Cameron
2021-02-01 15:26 ` [RFC PATCH 1/3] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl Jonathan Cameron
2021-02-01 15:26 ` Jonathan Cameron [this message]
2021-02-01 15:26 ` [RFC PATCH 3/3] hw/cxl/cxl-device-utils: Allow incorrect read lengths Jonathan Cameron
2021-02-03 16:10 ` Ben Widawsky
2021-02-03 17:26 ` Jonathan Cameron
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