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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 20/40] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
Date: Tue, 16 Feb 2021 16:16:38 +0000	[thread overview]
Message-ID: <20210216161658.29881-21-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210216161658.29881-1-peter.maydell@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

This is the prctl bit that controls whether syscalls accept tagged
addresses.  See Documentation/arm64/tagged-address-abi.rst in the
linux kernel.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 linux-user/aarch64/target_syscall.h |  4 ++++
 target/arm/cpu-param.h              |  3 +++
 target/arm/cpu.h                    | 31 +++++++++++++++++++++++++++++
 linux-user/syscall.c                | 24 ++++++++++++++++++++++
 4 files changed, 62 insertions(+)

diff --git a/linux-user/aarch64/target_syscall.h b/linux-user/aarch64/target_syscall.h
index 3194e6b0093..820601dfcc8 100644
--- a/linux-user/aarch64/target_syscall.h
+++ b/linux-user/aarch64/target_syscall.h
@@ -30,4 +30,8 @@ struct target_pt_regs {
 # define TARGET_PR_PAC_APDBKEY   (1 << 3)
 # define TARGET_PR_PAC_APGAKEY   (1 << 4)
 
+#define TARGET_PR_SET_TAGGED_ADDR_CTRL 55
+#define TARGET_PR_GET_TAGGED_ADDR_CTRL 56
+# define TARGET_PR_TAGGED_ADDR_ENABLE  (1UL << 0)
+
 #endif /* AARCH64_TARGET_SYSCALL_H */
diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h
index 00e7d9e9377..7f38d33b8ea 100644
--- a/target/arm/cpu-param.h
+++ b/target/arm/cpu-param.h
@@ -20,6 +20,9 @@
 
 #ifdef CONFIG_USER_ONLY
 #define TARGET_PAGE_BITS 12
+# ifdef TARGET_AARCH64
+#  define TARGET_TAGGED_ADDRESSES
+# endif
 #else
 /*
  * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index f240275407b..72a0819eb8c 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -721,6 +721,11 @@ typedef struct CPUARMState {
     const struct arm_boot_info *boot_info;
     /* Store GICv3CPUState to access from this struct */
     void *gicv3state;
+
+#ifdef TARGET_TAGGED_ADDRESSES
+    /* Linux syscall tagged address support */
+    bool tagged_addr_enable;
+#endif
 } CPUARMState;
 
 static inline void set_feature(CPUARMState *env, int feature)
@@ -3604,6 +3609,32 @@ static inline MemTxAttrs *typecheck_memtxattrs(MemTxAttrs *x)
  */
 #define PAGE_BTI  PAGE_TARGET_1
 
+#ifdef TARGET_TAGGED_ADDRESSES
+/**
+ * cpu_untagged_addr:
+ * @cs: CPU context
+ * @x: tagged address
+ *
+ * Remove any address tag from @x.  This is explicitly related to the
+ * linux syscall TIF_TAGGED_ADDR setting, not TBI in general.
+ *
+ * There should be a better place to put this, but we need this in
+ * include/exec/cpu_ldst.h, and not some place linux-user specific.
+ */
+static inline target_ulong cpu_untagged_addr(CPUState *cs, target_ulong x)
+{
+    ARMCPU *cpu = ARM_CPU(cs);
+    if (cpu->env.tagged_addr_enable) {
+        /*
+         * TBI is enabled for userspace but not kernelspace addresses.
+         * Only clear the tag if bit 55 is clear.
+         */
+        x &= sextract64(x, 0, 56);
+    }
+    return x;
+}
+#endif
+
 /*
  * Naming convention for isar_feature functions:
  * Functions which test 32-bit ID registers should have _aa32_ in
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 3d0411da57e..cf0b39461b6 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -10993,6 +10993,30 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
                 }
             }
             return -TARGET_EINVAL;
+        case TARGET_PR_SET_TAGGED_ADDR_CTRL:
+            {
+                abi_ulong valid_mask = TARGET_PR_TAGGED_ADDR_ENABLE;
+                CPUARMState *env = cpu_env;
+
+                if ((arg2 & ~valid_mask) || arg3 || arg4 || arg5) {
+                    return -TARGET_EINVAL;
+                }
+                env->tagged_addr_enable = arg2 & TARGET_PR_TAGGED_ADDR_ENABLE;
+                return 0;
+            }
+        case TARGET_PR_GET_TAGGED_ADDR_CTRL:
+            {
+                abi_long ret = 0;
+                CPUARMState *env = cpu_env;
+
+                if (arg2 || arg3 || arg4 || arg5) {
+                    return -TARGET_EINVAL;
+                }
+                if (env->tagged_addr_enable) {
+                    ret |= TARGET_PR_TAGGED_ADDR_ENABLE;
+                }
+                return ret;
+            }
 #endif /* AARCH64 */
         case PR_GET_SECCOMP:
         case PR_SET_SECCOMP:
-- 
2.20.1



  parent reply	other threads:[~2021-02-16 16:41 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-16 16:16 [PULL 00/40] target-arm queue Peter Maydell
2021-02-16 16:16 ` [PULL 01/40] tcg: Introduce target-specific page data for user-only Peter Maydell
2021-02-16 16:16 ` [PULL 02/40] linux-user: Introduce PAGE_ANON Peter Maydell
2021-04-06 14:45   ` Laurent Vivier
2021-02-16 16:16 ` [PULL 03/40] exec: Use uintptr_t for guest_base Peter Maydell
2021-02-16 16:16 ` [PULL 04/40] exec: Use uintptr_t in cpu_ldst.h Peter Maydell
2021-02-16 16:16 ` [PULL 05/40] exec: Improve types for guest_addr_valid Peter Maydell
2021-02-16 16:16 ` [PULL 06/40] linux-user: Check for overflow in access_ok Peter Maydell
2021-02-16 16:16 ` [PULL 07/40] linux-user: Tidy VERIFY_READ/VERIFY_WRITE Peter Maydell
2021-02-16 16:16 ` [PULL 08/40] bsd-user: " Peter Maydell
2021-02-16 16:16 ` [PULL 09/40] linux-user: Do not use guest_addr_valid for h2g_valid Peter Maydell
2021-02-16 16:16 ` [PULL 10/40] linux-user: Fix guest_addr_valid vs reserved_va Peter Maydell
2021-02-16 16:16 ` [PULL 11/40] exec: Introduce cpu_untagged_addr Peter Maydell
2021-02-16 16:16 ` [PULL 12/40] exec: Use cpu_untagged_addr in g2h; split out g2h_untagged Peter Maydell
2021-02-16 16:16 ` [PULL 13/40] linux-user: Explicitly untag memory management syscalls Peter Maydell
2021-02-16 16:16 ` [PULL 14/40] linux-user: Use guest_range_valid in access_ok Peter Maydell
2021-02-16 16:16 ` [PULL 15/40] exec: Rename guest_{addr,range}_valid to *_untagged Peter Maydell
2021-02-16 16:16 ` [PULL 16/40] linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged Peter Maydell
2021-02-16 16:16 ` [PULL 17/40] linux-user: Move lock_user et al out of line Peter Maydell
2021-02-16 16:16 ` [PULL 18/40] linux-user: Fix types in uaccess.c Peter Maydell
2021-02-19  9:21   ` Laurent Vivier
2021-03-10 15:48     ` Peter Maydell
2021-03-10 16:34       ` Laurent Vivier
2021-03-11 13:25         ` Richard Henderson
2021-02-16 16:16 ` [PULL 19/40] linux-user: Handle tags in lock_user/unlock_user Peter Maydell
2021-02-16 16:16 ` Peter Maydell [this message]
2021-02-16 16:16 ` [PULL 21/40] target/arm: Improve gen_top_byte_ignore Peter Maydell
2021-02-16 16:16 ` [PULL 22/40] target/arm: Use the proper TBI settings for linux-user Peter Maydell
2021-02-16 16:16 ` [PULL 23/40] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG Peter Maydell
2021-02-16 16:16 ` [PULL 24/40] linux-user/aarch64: Implement PROT_MTE Peter Maydell
2021-02-16 16:16 ` [PULL 25/40] target/arm: Split out syndrome.h from internals.h Peter Maydell
2021-02-16 16:16 ` [PULL 26/40] linux-user/aarch64: Pass syndrome to EXC_*_ABORT Peter Maydell
2021-03-12 11:09   ` Laurent Vivier
2021-03-19 19:19     ` Laurent Vivier
2021-03-19 20:24       ` Richard Henderson
2021-02-16 16:16 ` [PULL 27/40] linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault Peter Maydell
2021-02-16 16:16 ` [PULL 28/40] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error Peter Maydell
2021-02-16 16:16 ` [PULL 29/40] target/arm: Add allocation tag storage for user mode Peter Maydell
2021-02-16 16:16 ` [PULL 30/40] target/arm: Enable MTE for user-only Peter Maydell
2021-02-16 16:16 ` [PULL 31/40] tests/tcg/aarch64: Add mte smoke tests Peter Maydell
2021-02-16 16:16 ` [PULL 32/40] hw/i2c: Implement NPCM7XX SMBus Module Single Mode Peter Maydell
2021-02-16 16:16 ` [PULL 33/40] hw/arm: Add I2C sensors for NPCM750 eval board Peter Maydell
2021-02-16 16:16 ` [PULL 34/40] hw/arm: Add I2C sensors and EEPROM for GSJ machine Peter Maydell
2021-02-16 16:16 ` [PULL 35/40] hw/i2c: Add a QTest for NPCM7XX SMBus Device Peter Maydell
2021-02-16 16:16 ` [PULL 36/40] hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode Peter Maydell
2021-02-16 16:16 ` [PULL 37/40] MAINTAINERS: add myself maintainer for the clock framework Peter Maydell
2021-02-16 16:16 ` [PULL 38/40] hw/net: Add npcm7xx emc model Peter Maydell
2021-02-16 16:16 ` [PULL 39/40] hw/arm: " Peter Maydell
2021-02-16 16:16 ` [PULL 40/40] tests/qtests: Add npcm7xx emc model test Peter Maydell
2021-02-16 17:01 ` [PULL 00/40] target-arm queue no-reply

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