From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 39/40] hw/arm: Add npcm7xx emc model
Date: Tue, 16 Feb 2021 16:16:57 +0000 [thread overview]
Message-ID: <20210216161658.29881-40-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210216161658.29881-1-peter.maydell@linaro.org>
From: Doug Evans <dje@google.com>
This is a 10/100 ethernet device that has several features.
Only the ones needed by the Linux driver have been implemented.
See npcm7xx_emc.c for a list of unimplemented features.
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Avi Fishman <avi.fishman@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Doug Evans <dje@google.com>
Message-id: 20210213002520.1374134-3-dje@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
docs/system/arm/nuvoton.rst | 3 ++-
include/hw/arm/npcm7xx.h | 2 ++
hw/arm/npcm7xx.c | 50 +++++++++++++++++++++++++++++++++++--
3 files changed, 52 insertions(+), 3 deletions(-)
diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst
index 34fc799b2df..f9fb9224da9 100644
--- a/docs/system/arm/nuvoton.rst
+++ b/docs/system/arm/nuvoton.rst
@@ -44,6 +44,7 @@ Supported devices
* Analog to Digital Converter (ADC)
* Pulse Width Modulation (PWM)
* SMBus controller (SMBF)
+ * Ethernet controller (EMC)
Missing devices
---------------
@@ -57,7 +58,7 @@ Missing devices
* Shared memory (SHM)
* eSPI slave interface
- * Ethernet controllers (GMAC and EMC)
+ * Ethernet controller (GMAC)
* USB device (USBD)
* Peripheral SPI controller (PSPI)
* SD/MMC host
diff --git a/include/hw/arm/npcm7xx.h b/include/hw/arm/npcm7xx.h
index cea1bd1f620..d32849a456b 100644
--- a/include/hw/arm/npcm7xx.h
+++ b/include/hw/arm/npcm7xx.h
@@ -26,6 +26,7 @@
#include "hw/misc/npcm7xx_gcr.h"
#include "hw/misc/npcm7xx_pwm.h"
#include "hw/misc/npcm7xx_rng.h"
+#include "hw/net/npcm7xx_emc.h"
#include "hw/nvram/npcm7xx_otp.h"
#include "hw/timer/npcm7xx_timer.h"
#include "hw/ssi/npcm7xx_fiu.h"
@@ -90,6 +91,7 @@ typedef struct NPCM7xxState {
EHCISysBusState ehci;
OHCISysBusState ohci;
NPCM7xxFIUState fiu[2];
+ NPCM7xxEMCState emc[2];
} NPCM7xxState;
#define TYPE_NPCM7XX "npcm7xx"
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index f8950f94708..9bd1e83f021 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -82,6 +82,8 @@ enum NPCM7xxInterrupt {
NPCM7XX_UART1_IRQ,
NPCM7XX_UART2_IRQ,
NPCM7XX_UART3_IRQ,
+ NPCM7XX_EMC1RX_IRQ = 15,
+ NPCM7XX_EMC1TX_IRQ,
NPCM7XX_TIMER0_IRQ = 32, /* Timer Module 0 */
NPCM7XX_TIMER1_IRQ,
NPCM7XX_TIMER2_IRQ,
@@ -120,6 +122,8 @@ enum NPCM7xxInterrupt {
NPCM7XX_SMBUS15_IRQ,
NPCM7XX_PWM0_IRQ = 93, /* PWM module 0 */
NPCM7XX_PWM1_IRQ, /* PWM module 1 */
+ NPCM7XX_EMC2RX_IRQ = 114,
+ NPCM7XX_EMC2TX_IRQ,
NPCM7XX_GPIO0_IRQ = 116,
NPCM7XX_GPIO1_IRQ,
NPCM7XX_GPIO2_IRQ,
@@ -188,6 +192,12 @@ static const hwaddr npcm7xx_smbus_addr[] = {
0xf008f000,
};
+/* Register base address for each EMC Module */
+static const hwaddr npcm7xx_emc_addr[] = {
+ 0xf0825000,
+ 0xf0826000,
+};
+
static const struct {
hwaddr regs_addr;
uint32_t unconnected_pins;
@@ -406,6 +416,10 @@ static void npcm7xx_init(Object *obj)
for (i = 0; i < ARRAY_SIZE(s->pwm); i++) {
object_initialize_child(obj, "pwm[*]", &s->pwm[i], TYPE_NPCM7XX_PWM);
}
+
+ for (i = 0; i < ARRAY_SIZE(s->emc); i++) {
+ object_initialize_child(obj, "emc[*]", &s->emc[i], TYPE_NPCM7XX_EMC);
+ }
}
static void npcm7xx_realize(DeviceState *dev, Error **errp)
@@ -589,6 +603,40 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(sbd, i, npcm7xx_irq(s, NPCM7XX_PWM0_IRQ + i));
}
+ /*
+ * EMC Modules. Cannot fail.
+ * The mapping of the device to its netdev backend works as follows:
+ * emc[i] = nd_table[i]
+ * This works around the inability to specify the netdev property for the
+ * emc device: it's not pluggable and thus the -device option can't be
+ * used.
+ */
+ QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_emc_addr) != ARRAY_SIZE(s->emc));
+ QEMU_BUILD_BUG_ON(ARRAY_SIZE(s->emc) != 2);
+ for (i = 0; i < ARRAY_SIZE(s->emc); i++) {
+ s->emc[i].emc_num = i;
+ SysBusDevice *sbd = SYS_BUS_DEVICE(&s->emc[i]);
+ if (nd_table[i].used) {
+ qemu_check_nic_model(&nd_table[i], TYPE_NPCM7XX_EMC);
+ qdev_set_nic_properties(DEVICE(sbd), &nd_table[i]);
+ }
+ /*
+ * The device exists regardless of whether it's connected to a QEMU
+ * netdev backend. So always instantiate it even if there is no
+ * backend.
+ */
+ sysbus_realize(sbd, &error_abort);
+ sysbus_mmio_map(sbd, 0, npcm7xx_emc_addr[i]);
+ int tx_irq = i == 0 ? NPCM7XX_EMC1TX_IRQ : NPCM7XX_EMC2TX_IRQ;
+ int rx_irq = i == 0 ? NPCM7XX_EMC1RX_IRQ : NPCM7XX_EMC2RX_IRQ;
+ /*
+ * N.B. The values for the second argument sysbus_connect_irq are
+ * chosen to match the registration order in npcm7xx_emc_realize.
+ */
+ sysbus_connect_irq(sbd, 0, npcm7xx_irq(s, tx_irq));
+ sysbus_connect_irq(sbd, 1, npcm7xx_irq(s, rx_irq));
+ }
+
/*
* Flash Interface Unit (FIU). Can fail if incorrect number of chip selects
* specified, but this is a programming error.
@@ -649,8 +697,6 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("npcm7xx.vcd", 0xf0810000, 64 * KiB);
create_unimplemented_device("npcm7xx.ece", 0xf0820000, 8 * KiB);
create_unimplemented_device("npcm7xx.vdma", 0xf0822000, 8 * KiB);
- create_unimplemented_device("npcm7xx.emc1", 0xf0825000, 4 * KiB);
- create_unimplemented_device("npcm7xx.emc2", 0xf0826000, 4 * KiB);
create_unimplemented_device("npcm7xx.usbd[0]", 0xf0830000, 4 * KiB);
create_unimplemented_device("npcm7xx.usbd[1]", 0xf0831000, 4 * KiB);
create_unimplemented_device("npcm7xx.usbd[2]", 0xf0832000, 4 * KiB);
--
2.20.1
next prev parent reply other threads:[~2021-02-16 16:49 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-16 16:16 [PULL 00/40] target-arm queue Peter Maydell
2021-02-16 16:16 ` [PULL 01/40] tcg: Introduce target-specific page data for user-only Peter Maydell
2021-02-16 16:16 ` [PULL 02/40] linux-user: Introduce PAGE_ANON Peter Maydell
2021-04-06 14:45 ` Laurent Vivier
2021-02-16 16:16 ` [PULL 03/40] exec: Use uintptr_t for guest_base Peter Maydell
2021-02-16 16:16 ` [PULL 04/40] exec: Use uintptr_t in cpu_ldst.h Peter Maydell
2021-02-16 16:16 ` [PULL 05/40] exec: Improve types for guest_addr_valid Peter Maydell
2021-02-16 16:16 ` [PULL 06/40] linux-user: Check for overflow in access_ok Peter Maydell
2021-02-16 16:16 ` [PULL 07/40] linux-user: Tidy VERIFY_READ/VERIFY_WRITE Peter Maydell
2021-02-16 16:16 ` [PULL 08/40] bsd-user: " Peter Maydell
2021-02-16 16:16 ` [PULL 09/40] linux-user: Do not use guest_addr_valid for h2g_valid Peter Maydell
2021-02-16 16:16 ` [PULL 10/40] linux-user: Fix guest_addr_valid vs reserved_va Peter Maydell
2021-02-16 16:16 ` [PULL 11/40] exec: Introduce cpu_untagged_addr Peter Maydell
2021-02-16 16:16 ` [PULL 12/40] exec: Use cpu_untagged_addr in g2h; split out g2h_untagged Peter Maydell
2021-02-16 16:16 ` [PULL 13/40] linux-user: Explicitly untag memory management syscalls Peter Maydell
2021-02-16 16:16 ` [PULL 14/40] linux-user: Use guest_range_valid in access_ok Peter Maydell
2021-02-16 16:16 ` [PULL 15/40] exec: Rename guest_{addr,range}_valid to *_untagged Peter Maydell
2021-02-16 16:16 ` [PULL 16/40] linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged Peter Maydell
2021-02-16 16:16 ` [PULL 17/40] linux-user: Move lock_user et al out of line Peter Maydell
2021-02-16 16:16 ` [PULL 18/40] linux-user: Fix types in uaccess.c Peter Maydell
2021-02-19 9:21 ` Laurent Vivier
2021-03-10 15:48 ` Peter Maydell
2021-03-10 16:34 ` Laurent Vivier
2021-03-11 13:25 ` Richard Henderson
2021-02-16 16:16 ` [PULL 19/40] linux-user: Handle tags in lock_user/unlock_user Peter Maydell
2021-02-16 16:16 ` [PULL 20/40] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE Peter Maydell
2021-02-16 16:16 ` [PULL 21/40] target/arm: Improve gen_top_byte_ignore Peter Maydell
2021-02-16 16:16 ` [PULL 22/40] target/arm: Use the proper TBI settings for linux-user Peter Maydell
2021-02-16 16:16 ` [PULL 23/40] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG Peter Maydell
2021-02-16 16:16 ` [PULL 24/40] linux-user/aarch64: Implement PROT_MTE Peter Maydell
2021-02-16 16:16 ` [PULL 25/40] target/arm: Split out syndrome.h from internals.h Peter Maydell
2021-02-16 16:16 ` [PULL 26/40] linux-user/aarch64: Pass syndrome to EXC_*_ABORT Peter Maydell
2021-03-12 11:09 ` Laurent Vivier
2021-03-19 19:19 ` Laurent Vivier
2021-03-19 20:24 ` Richard Henderson
2021-02-16 16:16 ` [PULL 27/40] linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault Peter Maydell
2021-02-16 16:16 ` [PULL 28/40] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error Peter Maydell
2021-02-16 16:16 ` [PULL 29/40] target/arm: Add allocation tag storage for user mode Peter Maydell
2021-02-16 16:16 ` [PULL 30/40] target/arm: Enable MTE for user-only Peter Maydell
2021-02-16 16:16 ` [PULL 31/40] tests/tcg/aarch64: Add mte smoke tests Peter Maydell
2021-02-16 16:16 ` [PULL 32/40] hw/i2c: Implement NPCM7XX SMBus Module Single Mode Peter Maydell
2021-02-16 16:16 ` [PULL 33/40] hw/arm: Add I2C sensors for NPCM750 eval board Peter Maydell
2021-02-16 16:16 ` [PULL 34/40] hw/arm: Add I2C sensors and EEPROM for GSJ machine Peter Maydell
2021-02-16 16:16 ` [PULL 35/40] hw/i2c: Add a QTest for NPCM7XX SMBus Device Peter Maydell
2021-02-16 16:16 ` [PULL 36/40] hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode Peter Maydell
2021-02-16 16:16 ` [PULL 37/40] MAINTAINERS: add myself maintainer for the clock framework Peter Maydell
2021-02-16 16:16 ` [PULL 38/40] hw/net: Add npcm7xx emc model Peter Maydell
2021-02-16 16:16 ` Peter Maydell [this message]
2021-02-16 16:16 ` [PULL 40/40] tests/qtests: Add npcm7xx emc model test Peter Maydell
2021-02-16 17:01 ` [PULL 00/40] target-arm queue no-reply
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