From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 09/26] target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc
Date: Mon, 10 May 2021 13:25:31 +0100 [thread overview]
Message-ID: <20210510122548.28638-10-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210510122548.28638-1-peter.maydell@linaro.org>
The functions vfp_load_reg32(), vfp_load_reg64(), vfp_store_reg32()
and vfp_store_reg64() are used only in translate-vfp.c.inc. Move
them to that file.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210430132740.10391-7-peter.maydell@linaro.org
---
target/arm/translate.c | 20 --------------------
target/arm/translate-vfp.c.inc | 20 ++++++++++++++++++++
2 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 5113cd2fea6..c8b9cedfcfd 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1144,26 +1144,6 @@ static long vfp_reg_offset(bool dp, unsigned reg)
}
}
-static inline void vfp_load_reg64(TCGv_i64 var, int reg)
-{
- tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(true, reg));
-}
-
-static inline void vfp_store_reg64(TCGv_i64 var, int reg)
-{
- tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(true, reg));
-}
-
-static inline void vfp_load_reg32(TCGv_i32 var, int reg)
-{
- tcg_gen_ld_i32(var, cpu_env, vfp_reg_offset(false, reg));
-}
-
-static inline void vfp_store_reg32(TCGv_i32 var, int reg)
-{
- tcg_gen_st_i32(var, cpu_env, vfp_reg_offset(false, reg));
-}
-
void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp memop)
{
long off = neon_element_offset(reg, ele, memop);
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc
index 500492f02fb..1004d1fd095 100644
--- a/target/arm/translate-vfp.c.inc
+++ b/target/arm/translate-vfp.c.inc
@@ -30,6 +30,26 @@
#include "decode-vfp.c.inc"
#include "decode-vfp-uncond.c.inc"
+static inline void vfp_load_reg64(TCGv_i64 var, int reg)
+{
+ tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(true, reg));
+}
+
+static inline void vfp_store_reg64(TCGv_i64 var, int reg)
+{
+ tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(true, reg));
+}
+
+static inline void vfp_load_reg32(TCGv_i32 var, int reg)
+{
+ tcg_gen_ld_i32(var, cpu_env, vfp_reg_offset(false, reg));
+}
+
+static inline void vfp_store_reg32(TCGv_i32 var, int reg)
+{
+ tcg_gen_st_i32(var, cpu_env, vfp_reg_offset(false, reg));
+}
+
/*
* The imm8 encodes the sign bit, enough bits to represent an exponent in
* the range 01....1xx to 10....0xx, and the most significant 4 bits of
--
2.20.1
next prev parent reply other threads:[~2021-05-10 12:37 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-10 12:25 [PULL 00/26] target-arm queue Peter Maydell
2021-05-10 12:25 ` [PULL 01/26] docs: fix link in sbsa description Peter Maydell
2021-05-10 12:25 ` [PULL 02/26] linux-user/aarch64: Enable hwcap for RND, BTI, and MTE Peter Maydell
2021-05-10 12:25 ` [PULL 03/26] target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write() Peter Maydell
2021-05-10 12:25 ` [PULL 04/26] target/arm: Move constant expanders to translate.h Peter Maydell
2021-05-10 12:25 ` [PULL 05/26] target/arm: Share unallocated_encoding() and gen_exception_insn() Peter Maydell
2021-05-10 12:25 ` [PULL 06/26] target/arm: Make functions used by m-nocp global Peter Maydell
2021-05-10 12:25 ` [PULL 07/26] target/arm: Split m-nocp trans functions into their own file Peter Maydell
2021-05-10 12:25 ` [PULL 08/26] target/arm: Move gen_aa32 functions to translate-a32.h Peter Maydell
2021-05-10 12:25 ` Peter Maydell [this message]
2021-05-10 12:25 ` [PULL 10/26] target/arm: Make functions used by translate-vfp global Peter Maydell
2021-05-10 12:25 ` [PULL 11/26] target/arm: Make translate-vfp.c.inc its own compilation unit Peter Maydell
2021-05-10 12:25 ` [PULL 12/26] target/arm: Move vfp_reg_ptr() to translate-neon.c.inc Peter Maydell
2021-05-10 12:25 ` [PULL 13/26] target/arm: Delete unused typedef Peter Maydell
2021-05-10 12:25 ` [PULL 14/26] target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h Peter Maydell
2021-05-10 12:25 ` [PULL 15/26] target/arm: Make functions used by translate-neon global Peter Maydell
2021-05-10 12:25 ` [PULL 16/26] target/arm: Make translate-neon.c.inc its own compilation unit Peter Maydell
2021-05-10 12:25 ` [PULL 17/26] target/arm: Make WFI a NOP for userspace emulators Peter Maydell
2021-05-10 12:25 ` [PULL 18/26] hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset() Peter Maydell
2021-05-10 12:25 ` [PULL 19/26] osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves Peter Maydell
2021-05-10 12:25 ` [PULL 20/26] include/qemu/bswap.h: Handle being included outside extern "C" block Peter Maydell
2021-05-10 12:25 ` [PULL 21/26] include/disas/dis-asm.h: Handle being included outside 'extern "C"' Peter Maydell
2021-05-10 12:25 ` [PULL 22/26] hw/arm/imx25_pdk: Fix error message for invalid RAM size Peter Maydell
2021-05-10 12:25 ` [PULL 23/26] hw/misc/mps2-scc: Add "QEMU interface" comment Peter Maydell
2021-05-10 12:25 ` [PULL 24/26] hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping Peter Maydell
2021-05-10 12:25 ` [PULL 25/26] hw/arm/mps2-tz: Implement AN524 memory remapping via machine property Peter Maydell
2021-05-10 12:25 ` [PULL 26/26] hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9 Peter Maydell
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