qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 02/26] linux-user/aarch64: Enable hwcap for RND, BTI, and MTE
Date: Mon, 10 May 2021 13:25:24 +0100	[thread overview]
Message-ID: <20210510122548.28638-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210510122548.28638-1-peter.maydell@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

These three features are already enabled by TCG, but are missing
their hwcap bits.  Update HWCAP2 from linux v5.12.

Cc: qemu-stable@nongnu.org (for 6.0.1)
Buglink: https://bugs.launchpad.net/bugs/1926044
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210427214108.88503-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 linux-user/elfload.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index c6731013fde..fc9c4f12be9 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -586,6 +586,16 @@ enum {
     ARM_HWCAP2_A64_SVESM4       = 1 << 6,
     ARM_HWCAP2_A64_FLAGM2       = 1 << 7,
     ARM_HWCAP2_A64_FRINT        = 1 << 8,
+    ARM_HWCAP2_A64_SVEI8MM      = 1 << 9,
+    ARM_HWCAP2_A64_SVEF32MM     = 1 << 10,
+    ARM_HWCAP2_A64_SVEF64MM     = 1 << 11,
+    ARM_HWCAP2_A64_SVEBF16      = 1 << 12,
+    ARM_HWCAP2_A64_I8MM         = 1 << 13,
+    ARM_HWCAP2_A64_BF16         = 1 << 14,
+    ARM_HWCAP2_A64_DGH          = 1 << 15,
+    ARM_HWCAP2_A64_RNG          = 1 << 16,
+    ARM_HWCAP2_A64_BTI          = 1 << 17,
+    ARM_HWCAP2_A64_MTE          = 1 << 18,
 };
 
 #define ELF_HWCAP   get_elf_hwcap()
@@ -640,6 +650,9 @@ static uint32_t get_elf_hwcap2(void)
     GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP);
     GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2);
     GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT);
+    GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG);
+    GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI);
+    GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE);
 
     return hwcaps;
 }
-- 
2.20.1



  parent reply	other threads:[~2021-05-10 12:27 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-10 12:25 [PULL 00/26] target-arm queue Peter Maydell
2021-05-10 12:25 ` [PULL 01/26] docs: fix link in sbsa description Peter Maydell
2021-05-10 12:25 ` Peter Maydell [this message]
2021-05-10 12:25 ` [PULL 03/26] target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write() Peter Maydell
2021-05-10 12:25 ` [PULL 04/26] target/arm: Move constant expanders to translate.h Peter Maydell
2021-05-10 12:25 ` [PULL 05/26] target/arm: Share unallocated_encoding() and gen_exception_insn() Peter Maydell
2021-05-10 12:25 ` [PULL 06/26] target/arm: Make functions used by m-nocp global Peter Maydell
2021-05-10 12:25 ` [PULL 07/26] target/arm: Split m-nocp trans functions into their own file Peter Maydell
2021-05-10 12:25 ` [PULL 08/26] target/arm: Move gen_aa32 functions to translate-a32.h Peter Maydell
2021-05-10 12:25 ` [PULL 09/26] target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc Peter Maydell
2021-05-10 12:25 ` [PULL 10/26] target/arm: Make functions used by translate-vfp global Peter Maydell
2021-05-10 12:25 ` [PULL 11/26] target/arm: Make translate-vfp.c.inc its own compilation unit Peter Maydell
2021-05-10 12:25 ` [PULL 12/26] target/arm: Move vfp_reg_ptr() to translate-neon.c.inc Peter Maydell
2021-05-10 12:25 ` [PULL 13/26] target/arm: Delete unused typedef Peter Maydell
2021-05-10 12:25 ` [PULL 14/26] target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h Peter Maydell
2021-05-10 12:25 ` [PULL 15/26] target/arm: Make functions used by translate-neon global Peter Maydell
2021-05-10 12:25 ` [PULL 16/26] target/arm: Make translate-neon.c.inc its own compilation unit Peter Maydell
2021-05-10 12:25 ` [PULL 17/26] target/arm: Make WFI a NOP for userspace emulators Peter Maydell
2021-05-10 12:25 ` [PULL 18/26] hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset() Peter Maydell
2021-05-10 12:25 ` [PULL 19/26] osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves Peter Maydell
2021-05-10 12:25 ` [PULL 20/26] include/qemu/bswap.h: Handle being included outside extern "C" block Peter Maydell
2021-05-10 12:25 ` [PULL 21/26] include/disas/dis-asm.h: Handle being included outside 'extern "C"' Peter Maydell
2021-05-10 12:25 ` [PULL 22/26] hw/arm/imx25_pdk: Fix error message for invalid RAM size Peter Maydell
2021-05-10 12:25 ` [PULL 23/26] hw/misc/mps2-scc: Add "QEMU interface" comment Peter Maydell
2021-05-10 12:25 ` [PULL 24/26] hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping Peter Maydell
2021-05-10 12:25 ` [PULL 25/26] hw/arm/mps2-tz: Implement AN524 memory remapping via machine property Peter Maydell
2021-05-10 12:25 ` [PULL 26/26] hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9 Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210510122548.28638-3-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).