From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: laurent@vivier.eu
Subject: [PATCH v2 24/41] target/cris: Make cris_cpu_tlb_fill sysemu only
Date: Sat, 18 Sep 2021 11:45:10 -0700 [thread overview]
Message-ID: <20210918184527.408540-25-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org>
The fallback code in raise_sigsegv is sufficient for cris-linux-user.
Remove the code from cpu_loop that handled the unnamed 0xaa exception.
This makes all of the code in helper.c sysemu only, so remove the
ifdefs and move the file to cris_softmmu_ss.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/cris/cpu.h | 8 ++++----
linux-user/cris/cpu_loop.c | 10 ----------
target/cris/cpu.c | 4 ++--
target/cris/helper.c | 18 ------------------
target/cris/meson.build | 7 +++++--
5 files changed, 11 insertions(+), 36 deletions(-)
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 6603565f83..b445b194ea 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -189,6 +189,10 @@ extern const VMStateDescription vmstate_cris_cpu;
void cris_cpu_do_interrupt(CPUState *cpu);
void crisv10_cpu_do_interrupt(CPUState *cpu);
bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
+
+bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+ MMUAccessType access_type, int mmu_idx,
+ bool probe, uintptr_t retaddr);
#endif
void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags);
@@ -251,10 +255,6 @@ static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch)
return !!(env->pregs[PR_CCS] & U_FLAG);
}
-bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr);
-
/* Support function regs. */
#define SFR_RW_GC_CFG 0][0
#define SFR_RW_MM_CFG env->pregs[PR_SRS]][0
diff --git a/linux-user/cris/cpu_loop.c b/linux-user/cris/cpu_loop.c
index 334edddd1e..0de941c0b4 100644
--- a/linux-user/cris/cpu_loop.c
+++ b/linux-user/cris/cpu_loop.c
@@ -35,16 +35,6 @@ void cpu_loop(CPUCRISState *env)
process_queued_cpu_work(cs);
switch (trapnr) {
- case 0xaa:
- {
- info.si_signo = TARGET_SIGSEGV;
- info.si_errno = 0;
- /* XXX: check env->error_code */
- info.si_code = TARGET_SEGV_MAPERR;
- info._sifields._sigfault._addr = env->pregs[PR_EDA];
- queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
- }
- break;
case EXCP_INTERRUPT:
/* just indicate that signals should be handled asap */
break;
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index b9f30ba58f..b8ac1b9f25 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -207,10 +207,10 @@ static const struct SysemuCPUOps cris_sysemu_ops = {
static const struct TCGCPUOps crisv10_tcg_ops = {
.initialize = cris_initialize_crisv10_tcg,
- .tlb_fill = cris_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
.has_work = cris_cpu_has_work,
+ .tlb_fill = cris_cpu_tlb_fill,
.cpu_exec_interrupt = cris_cpu_exec_interrupt,
.do_interrupt = crisv10_cpu_do_interrupt,
#endif /* !CONFIG_USER_ONLY */
@@ -218,9 +218,9 @@ static const struct TCGCPUOps crisv10_tcg_ops = {
static const struct TCGCPUOps crisv32_tcg_ops = {
.initialize = cris_initialize_tcg,
- .tlb_fill = cris_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .tlb_fill = cris_cpu_tlb_fill,
.cpu_exec_interrupt = cris_cpu_exec_interrupt,
.do_interrupt = cris_cpu_do_interrupt,
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/cris/helper.c b/target/cris/helper.c
index 36926faf32..a0d6ecdcd3 100644
--- a/target/cris/helper.c
+++ b/target/cris/helper.c
@@ -39,22 +39,6 @@
#define D_LOG(...) do { } while (0)
#endif
-#if defined(CONFIG_USER_ONLY)
-
-bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
-{
- CRISCPU *cpu = CRIS_CPU(cs);
-
- cs->exception_index = 0xaa;
- cpu->env.pregs[PR_EDA] = address;
- cpu_loop_exit_restore(cs, retaddr);
-}
-
-#else /* !CONFIG_USER_ONLY */
-
-
static void cris_shift_ccs(CPUCRISState *env)
{
uint32_t ccs;
@@ -304,5 +288,3 @@ bool cris_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return ret;
}
-
-#endif /* !CONFIG_USER_ONLY */
diff --git a/target/cris/meson.build b/target/cris/meson.build
index 67c3793c85..c1e326d950 100644
--- a/target/cris/meson.build
+++ b/target/cris/meson.build
@@ -2,13 +2,16 @@ cris_ss = ss.source_set()
cris_ss.add(files(
'cpu.c',
'gdbstub.c',
- 'helper.c',
'op_helper.c',
'translate.c',
))
cris_softmmu_ss = ss.source_set()
-cris_softmmu_ss.add(files('mmu.c', 'machine.c'))
+cris_softmmu_ss.add(files(
+ 'helper.c',
+ 'machine.c',
+ 'mmu.c',
+))
target_arch += {'cris': cris_ss}
target_softmmu_arch += {'cris': cris_softmmu_ss}
--
2.25.1
next prev parent reply other threads:[~2021-09-18 19:12 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-18 18:44 [PATCH v2 00/41] linux-user: Streamline handling of SIGSEGV Richard Henderson
2021-09-18 18:44 ` [PATCH v2 01/41] accel/tcg: Split out adjust_signal_pc Richard Henderson
2021-09-18 18:44 ` [PATCH v2 02/41] accel/tcg: Move clear_helper_retaddr to cpu loop Richard Henderson
2021-09-19 19:35 ` Warner Losh
2021-09-18 18:44 ` [PATCH v2 03/41] accel/tcg: Split out handle_sigsegv_accerr_write Richard Henderson
2021-09-18 18:44 ` [PATCH v2 04/41] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Richard Henderson
2021-09-18 18:44 ` [PATCH v2 05/41] configure: Merge riscv32 and riscv64 host architectures Richard Henderson
2021-09-19 17:56 ` Philippe Mathieu-Daudé
2021-09-19 22:57 ` Alistair Francis
2021-09-18 18:44 ` [PATCH v2 06/41] linux-user: Reorg handling for SIGSEGV Richard Henderson
2021-09-19 18:02 ` Philippe Mathieu-Daudé
2021-09-19 19:01 ` Warner Losh
2021-09-19 23:01 ` Alistair Francis
2021-09-18 18:44 ` [PATCH v2 07/41] linux-user/host/x86: Populate host_signal.h Richard Henderson
2021-09-18 18:44 ` [PATCH v2 08/41] linux-user/host/ppc: " Richard Henderson
2021-09-19 19:34 ` Warner Losh
2021-09-18 18:44 ` [PATCH v2 09/41] linux-user/host/alpha: " Richard Henderson
2021-09-19 18:03 ` Philippe Mathieu-Daudé
2021-09-19 18:07 ` Richard Henderson
2021-09-19 18:11 ` Philippe Mathieu-Daudé
2021-09-19 18:13 ` Philippe Mathieu-Daudé
2021-09-18 18:44 ` [PATCH v2 10/41] linux-user/host/sparc: " Richard Henderson
2021-09-18 18:44 ` [PATCH v2 11/41] linux-user/host/arm: " Richard Henderson
2021-09-18 18:44 ` [PATCH v2 12/41] linux-user/host/aarch64: " Richard Henderson
2021-09-18 18:44 ` [PATCH v2 13/41] linux-user/host/s390: " Richard Henderson
2021-09-19 18:07 ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 14/41] linux-user/host/mips: " Richard Henderson
2021-09-19 18:08 ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 15/41] linux-user/host/riscv: " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 16/41] target/arm: Fixup comment re handle_cpu_signal Richard Henderson
2021-09-18 18:45 ` [PATCH v2 17/41] linux-user/host/riscv: Improve host_signal_write Richard Henderson
2021-09-18 18:45 ` [PATCH v2 18/41] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Richard Henderson
2021-09-19 18:18 ` Philippe Mathieu-Daudé
2021-09-19 18:59 ` Warner Losh
2021-09-18 18:45 ` [PATCH v2 19/41] hw/core: Add TCGCPUOps.record_sigsegv Richard Henderson
2021-09-19 18:22 ` Philippe Mathieu-Daudé
2021-09-19 18:24 ` Philippe Mathieu-Daudé
2021-09-19 18:32 ` Richard Henderson
2021-09-18 18:45 ` [PATCH v2 20/41] linux-user: Add raise_sigsegv Richard Henderson
2021-09-19 18:26 ` Philippe Mathieu-Daudé
2021-09-19 18:35 ` Richard Henderson
2021-09-19 18:43 ` Philippe Mathieu-Daudé
2021-09-19 18:53 ` Warner Losh
2021-09-18 18:45 ` [PATCH v2 21/41] target/alpha: Make alpha_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 22/41] target/arm: Use raise_sigsegv for mte tag lookup Richard Henderson
2021-09-18 18:45 ` [PATCH v2 23/41] target/arm: Implement arm_cpu_record_sigsegv Richard Henderson
2021-09-18 18:45 ` Richard Henderson [this message]
2021-09-19 18:28 ` [PATCH v2 24/41] target/cris: Make cris_cpu_tlb_fill sysemu only Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 25/41] target/hexagon: Remove hexagon_cpu_tlb_fill Richard Henderson
2021-09-18 18:45 ` [PATCH v2 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 27/41] target/i386: Implement x86_cpu_record_sigsegv Richard Henderson
2021-09-19 18:32 ` Philippe Mathieu-Daudé
2021-09-19 18:59 ` Warner Losh
2021-09-18 18:45 ` [PATCH v2 28/41] target/m68k: Make m68k_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 29/41] target/microblaze: Make mb_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 30/41] target/mips: Make mips_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 31/41] target/nios2: Make nios2_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 32/41] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE Richard Henderson
2021-09-18 18:45 ` [PATCH v2 33/41] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 34/41] target/ppc: Implement ppc_cpu_record_sigsegv Richard Henderson
2021-09-19 18:37 ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 35/41] target/riscv: Make riscv_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 36/41] target/s390x: Use probe_access_flags in s390_probe_access Richard Henderson
2021-09-18 18:45 ` [PATCH v2 37/41] target/s390x: Implement s390_cpu_record_sigsegv Richard Henderson
2021-09-19 18:39 ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 38/41] target/sh4: Make sh4_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 39/41] target/sparc: Make sparc_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 40/41] target/xtensa: Make xtensa_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 41/41] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Richard Henderson
2021-09-19 18:40 ` Philippe Mathieu-Daudé
2021-09-19 10:38 ` [PATCH v2 00/41] linux-user: Streamline handling of SIGSEGV Philippe Mathieu-Daudé
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