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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: laurent@vivier.eu
Subject: Re: [PATCH v2 27/41] target/i386: Implement x86_cpu_record_sigsegv
Date: Sun, 19 Sep 2021 20:32:11 +0200	[thread overview]
Message-ID: <e963b2fd-a616-84dd-19a3-3a1f67ebb452@amsat.org> (raw)
In-Reply-To: <20210918184527.408540-28-richard.henderson@linaro.org>

On 9/18/21 20:45, Richard Henderson wrote:
> Record cr2, error_code, and exception_index.  That last means
> that we must exit to cpu_loop ourselves, instead of letting
> exception_index being overwritten.
> 
> Use the maperr parameter to properly set PG_ERROR_P_MASK.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/i386/tcg/helper-tcg.h       |  6 ++++++
>  target/i386/tcg/tcg-cpu.c          |  3 ++-
>  target/i386/tcg/user/excp_helper.c | 23 +++++++++++++++++------
>  3 files changed, 25 insertions(+), 7 deletions(-)

> diff --git a/target/i386/tcg/user/excp_helper.c b/target/i386/tcg/user/excp_helper.c
> index a89b5228fd..cd507e2a1b 100644
> --- a/target/i386/tcg/user/excp_helper.c
> +++ b/target/i386/tcg/user/excp_helper.c
> @@ -22,18 +22,29 @@
>  #include "exec/exec-all.h"
>  #include "tcg/helper-tcg.h"
>  
> -bool x86_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
> -                      MMUAccessType access_type, int mmu_idx,
> -                      bool probe, uintptr_t retaddr)
> +void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,
> +                            MMUAccessType access_type,
> +                            bool maperr, uintptr_t ra)
>  {
>      X86CPU *cpu = X86_CPU(cs);
>      CPUX86State *env = &cpu->env;
>  
> +    /*
> +     * The error_code that hw reports as part of the exception frame
> +     * is copied to linux sigcontext.err.  The exception_index is
> +     * copied to linux sigcontext.trapno.  Short of inventing a new
> +     * place to store the trapno, we cannot let our caller raise the
> +     * signal and set exception_index to EXCP_INTERRUPT.
> +     */
>      env->cr[2] = addr;
> -    env->error_code = (access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT;
> -    env->error_code |= PG_ERROR_U_MASK;
> +    env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT)
> +                    | (maperr ? 0 : PG_ERROR_P_MASK)
> +                    | PG_ERROR_U_MASK;
>      cs->exception_index = EXCP0E_PAGE;
> +
> +    /* Disable do_interrupt_user. */
>      env->exception_is_int = 0;
>      env->exception_next_eip = -1;
> -    cpu_loop_exit_restore(cs, retaddr);
> +
> +    cpu_loop_exit_restore(cs, ra);
>  }
> 

Better have an x86 expert also review this, but to the best
of my knowledge:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

And YAY! btw, thanks :>


  reply	other threads:[~2021-09-19 18:34 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-18 18:44 [PATCH v2 00/41] linux-user: Streamline handling of SIGSEGV Richard Henderson
2021-09-18 18:44 ` [PATCH v2 01/41] accel/tcg: Split out adjust_signal_pc Richard Henderson
2021-09-18 18:44 ` [PATCH v2 02/41] accel/tcg: Move clear_helper_retaddr to cpu loop Richard Henderson
2021-09-19 19:35   ` Warner Losh
2021-09-18 18:44 ` [PATCH v2 03/41] accel/tcg: Split out handle_sigsegv_accerr_write Richard Henderson
2021-09-18 18:44 ` [PATCH v2 04/41] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Richard Henderson
2021-09-18 18:44 ` [PATCH v2 05/41] configure: Merge riscv32 and riscv64 host architectures Richard Henderson
2021-09-19 17:56   ` Philippe Mathieu-Daudé
2021-09-19 22:57   ` Alistair Francis
2021-09-18 18:44 ` [PATCH v2 06/41] linux-user: Reorg handling for SIGSEGV Richard Henderson
2021-09-19 18:02   ` Philippe Mathieu-Daudé
2021-09-19 19:01   ` Warner Losh
2021-09-19 23:01   ` Alistair Francis
2021-09-18 18:44 ` [PATCH v2 07/41] linux-user/host/x86: Populate host_signal.h Richard Henderson
2021-09-18 18:44 ` [PATCH v2 08/41] linux-user/host/ppc: " Richard Henderson
2021-09-19 19:34   ` Warner Losh
2021-09-18 18:44 ` [PATCH v2 09/41] linux-user/host/alpha: " Richard Henderson
2021-09-19 18:03   ` Philippe Mathieu-Daudé
2021-09-19 18:07     ` Richard Henderson
2021-09-19 18:11       ` Philippe Mathieu-Daudé
2021-09-19 18:13   ` Philippe Mathieu-Daudé
2021-09-18 18:44 ` [PATCH v2 10/41] linux-user/host/sparc: " Richard Henderson
2021-09-18 18:44 ` [PATCH v2 11/41] linux-user/host/arm: " Richard Henderson
2021-09-18 18:44 ` [PATCH v2 12/41] linux-user/host/aarch64: " Richard Henderson
2021-09-18 18:44 ` [PATCH v2 13/41] linux-user/host/s390: " Richard Henderson
2021-09-19 18:07   ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 14/41] linux-user/host/mips: " Richard Henderson
2021-09-19 18:08   ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 15/41] linux-user/host/riscv: " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 16/41] target/arm: Fixup comment re handle_cpu_signal Richard Henderson
2021-09-18 18:45 ` [PATCH v2 17/41] linux-user/host/riscv: Improve host_signal_write Richard Henderson
2021-09-18 18:45 ` [PATCH v2 18/41] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Richard Henderson
2021-09-19 18:18   ` Philippe Mathieu-Daudé
2021-09-19 18:59   ` Warner Losh
2021-09-18 18:45 ` [PATCH v2 19/41] hw/core: Add TCGCPUOps.record_sigsegv Richard Henderson
2021-09-19 18:22   ` Philippe Mathieu-Daudé
2021-09-19 18:24     ` Philippe Mathieu-Daudé
2021-09-19 18:32       ` Richard Henderson
2021-09-18 18:45 ` [PATCH v2 20/41] linux-user: Add raise_sigsegv Richard Henderson
2021-09-19 18:26   ` Philippe Mathieu-Daudé
2021-09-19 18:35   ` Richard Henderson
2021-09-19 18:43     ` Philippe Mathieu-Daudé
2021-09-19 18:53       ` Warner Losh
2021-09-18 18:45 ` [PATCH v2 21/41] target/alpha: Make alpha_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 22/41] target/arm: Use raise_sigsegv for mte tag lookup Richard Henderson
2021-09-18 18:45 ` [PATCH v2 23/41] target/arm: Implement arm_cpu_record_sigsegv Richard Henderson
2021-09-18 18:45 ` [PATCH v2 24/41] target/cris: Make cris_cpu_tlb_fill sysemu only Richard Henderson
2021-09-19 18:28   ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 25/41] target/hexagon: Remove hexagon_cpu_tlb_fill Richard Henderson
2021-09-18 18:45 ` [PATCH v2 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 27/41] target/i386: Implement x86_cpu_record_sigsegv Richard Henderson
2021-09-19 18:32   ` Philippe Mathieu-Daudé [this message]
2021-09-19 18:59   ` Warner Losh
2021-09-18 18:45 ` [PATCH v2 28/41] target/m68k: Make m68k_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 29/41] target/microblaze: Make mb_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 30/41] target/mips: Make mips_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 31/41] target/nios2: Make nios2_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 32/41] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE Richard Henderson
2021-09-18 18:45 ` [PATCH v2 33/41] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 34/41] target/ppc: Implement ppc_cpu_record_sigsegv Richard Henderson
2021-09-19 18:37   ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 35/41] target/riscv: Make riscv_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 36/41] target/s390x: Use probe_access_flags in s390_probe_access Richard Henderson
2021-09-18 18:45 ` [PATCH v2 37/41] target/s390x: Implement s390_cpu_record_sigsegv Richard Henderson
2021-09-19 18:39   ` Philippe Mathieu-Daudé
2021-09-18 18:45 ` [PATCH v2 38/41] target/sh4: Make sh4_cpu_tlb_fill sysemu only Richard Henderson
2021-09-18 18:45 ` [PATCH v2 39/41] target/sparc: Make sparc_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 40/41] target/xtensa: Make xtensa_cpu_tlb_fill " Richard Henderson
2021-09-18 18:45 ` [PATCH v2 41/41] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Richard Henderson
2021-09-19 18:40   ` Philippe Mathieu-Daudé
2021-09-19 10:38 ` [PATCH v2 00/41] linux-user: Streamline handling of SIGSEGV Philippe Mathieu-Daudé

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