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* [PATCH v3 00/29] bsd-user: arm (32-bit) support
@ 2021-11-04 14:05 Warner Losh
  2021-11-04 14:05 ` [PATCH v3 01/29] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards Warner Losh
                   ` (28 more replies)
  0 siblings, 29 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Richard Henderson, Warner Losh

This series of patches brings in 32-bit arm support for bsd-user.  It implements
all the bits needed to do image activation, signal handling, stack management
and threading. This allows us to get to the "Hello World" level. The arm and x86
code are now the same as in the bsd-user fork. For full context, the fork is at
https://github.com/qemu-bsd-user/qemu-bsd-user/tree/blitz (though the the recent
sig{bus,segv} needed updates are incomplete).

V3 addresses review comments:
   o Update target_arch_cpu.h to remove bogus unaligned check and notyet code.
   o Fixed target_thread_init to match FreeBSD's startup code and remove the
     cut-n-paste code from Linux's startup. Add comments.
   o Fixed various bugs with setting CPSR unaddressed from patch comments on v1
   o Use #defines instead of bare constants for user mode.

Following still need reviews:
    bsd-user/arm/target_arch_signal.h: arm machine context for signals
    bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions

Warnings that should be ignored:
   o make checkpatch has a couple of complaints about the comments for the
     signal trampoline, since it's a false positive IMHO.
WARNING: Block comments use a leading /* on a separate line
+    /* 8 */ sys_sigreturn,
WARNING: Block comments use a leading /* on a separate line
+    /* 9 */ sys_exit

Warner Losh (29):
  bsd-user/arm/target_arch_sysarch.h: Use consistent include guards
  bsd-user/arm/target_syscall.h: Add copyright and update name
  bsd-user/arm/target_arch_cpu.c: Target specific TLS routines
  bsd-user/arm/target_arch_cpu.h: CPU Loop definitions
  bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs
  bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation
  bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
  bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions
  bsd-user/arm/target_arch_cpu.h: Implement system call dispatch
  bsd-user/arm/target_arch_reg.h: Implement core dump register copying
  bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space
  bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm
  bsd-user/arm/target_arch_thread.h: Routines to create and switch to a
    thread
  bsd-user/arm/target_arch_elf.h: arm defines for ELF
  bsd-user/arm/target_arch_elf.h: arm get hwcap
  bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl
  bsd-user/freebsd: Create common target_os_ucontext.h file
  bsd-user/arm/target_arch_signal.h: arm specific signal registers and
    stack
  bsd-user/arm/target_arch_signal.h: arm machine context for signals
  bsd-user/arm/target_arch_signal.h: arm user context and trapframe for
    signals
  bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args
  bsd-user/arm/target_arch_signal.h: arm get_mcontext
  bsd-user/arm/target_arch_signal.h: arm set_mcontext
  bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn
  bsd-user: add arm target build
  bsd-user/i386/target_arch_signal.h: Remove target_sigcontext
  bsd-user/x86_64/target_arch_signal.h: Remove target_sigcontext
  bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h
  bsd-user/x86_64/target_arch_signal.h: use new target_os_ucontext.h

 bsd-user/arm/target_arch.h            |  28 +++
 bsd-user/arm/target_arch_cpu.c        |  39 ++++
 bsd-user/arm/target_arch_cpu.h        | 211 +++++++++++++++++++++
 bsd-user/arm/target_arch_elf.h        | 128 +++++++++++++
 bsd-user/arm/target_arch_reg.h        |  60 ++++++
 bsd-user/arm/target_arch_signal.h     | 258 ++++++++++++++++++++++++++
 bsd-user/arm/target_arch_sigtramp.h   |  49 +++++
 bsd-user/arm/target_arch_sysarch.h    |   6 +-
 bsd-user/arm/target_arch_thread.h     |  82 ++++++++
 bsd-user/arm/target_arch_vmparam.h    |  48 +++++
 bsd-user/arm/target_syscall.h         |  27 ++-
 bsd-user/freebsd/target_os_signal.h   |   3 -
 bsd-user/freebsd/target_os_ucontext.h |  26 +++
 bsd-user/i386/target_arch_signal.h    |  13 +-
 bsd-user/x86_64/target_arch_signal.h  |  13 +-
 configs/targets/arm-bsd-user.mak      |   2 +
 16 files changed, 959 insertions(+), 34 deletions(-)
 create mode 100644 bsd-user/arm/target_arch.h
 create mode 100644 bsd-user/arm/target_arch_cpu.c
 create mode 100644 bsd-user/arm/target_arch_cpu.h
 create mode 100644 bsd-user/arm/target_arch_elf.h
 create mode 100644 bsd-user/arm/target_arch_reg.h
 create mode 100644 bsd-user/arm/target_arch_signal.h
 create mode 100644 bsd-user/arm/target_arch_sigtramp.h
 create mode 100644 bsd-user/arm/target_arch_thread.h
 create mode 100644 bsd-user/arm/target_arch_vmparam.h
 create mode 100644 bsd-user/freebsd/target_os_ucontext.h
 create mode 100644 configs/targets/arm-bsd-user.mak

-- 
2.33.0



^ permalink raw reply	[flat|nested] 37+ messages in thread

* [PATCH v3 01/29] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 02/29] bsd-user/arm/target_syscall.h: Add copyright and update name Warner Losh
                   ` (27 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Richard Henderson, Warner Losh

As part of upstreaming, the include guards have been made more
consistent. Update this file to use the new guards.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_sysarch.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/bsd-user/arm/target_arch_sysarch.h b/bsd-user/arm/target_arch_sysarch.h
index 632a5cd453..8cc6bff207 100644
--- a/bsd-user/arm/target_arch_sysarch.h
+++ b/bsd-user/arm/target_arch_sysarch.h
@@ -17,8 +17,8 @@
  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef BSD_USER_ARCH_SYSARCH_H_
-#define BSD_USER_ARCH_SYSARCH_H_
+#ifndef _TARGET_ARCH_SYSARCH_H_
+#define _TARGET_ARCH_SYSARCH_H_
 
 #include "target_syscall.h"
 #include "target_arch.h"
@@ -75,4 +75,4 @@ static inline void do_freebsd_arch_print_sysarch(
     }
 }
 
-#endif /*!BSD_USER_ARCH_SYSARCH_H_ */
+#endif /*!_TARGET_ARCH_SYSARCH_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 02/29] bsd-user/arm/target_syscall.h: Add copyright and update name
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
  2021-11-04 14:05 ` [PATCH v3 01/29] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 03/29] bsd-user/arm/target_arch_cpu.c: Target specific TLS routines Warner Losh
                   ` (26 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

The preferred name for the 32-bit arm is now armv7. Update the name to
reflect that. In addition, add Stacey's copyright to this file and
update the include guards to the new convention.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_syscall.h | 27 +++++++++++++++++++++++----
 1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/bsd-user/arm/target_syscall.h b/bsd-user/arm/target_syscall.h
index ef4b37f017..a5f2bb4e01 100644
--- a/bsd-user/arm/target_syscall.h
+++ b/bsd-user/arm/target_syscall.h
@@ -1,5 +1,24 @@
-#ifndef BSD_USER_ARCH_SYSCALL_H_
-#define BSD_USER_ARCH_SYSCALL_H_
+/*
+ *  arm cpu system call stubs
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _TARGET_ARCH_SYSCALL_H_
+#define _TARGET_ARCH_SYSCALL_H_
 
 struct target_pt_regs {
     abi_long uregs[17];
@@ -31,6 +50,6 @@ struct target_pt_regs {
 #define TARGET_FREEBSD_ARM_GET_TP       3
 
 #define TARGET_HW_MACHINE       "arm"
-#define TARGET_HW_MACHINE_ARCH  "armv6"
+#define TARGET_HW_MACHINE_ARCH  "armv7"
 
-#endif /* !BSD_USER_ARCH_SYSCALL_H_ */
+#endif /* !_TARGET_ARCH_SYSCALL_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 03/29] bsd-user/arm/target_arch_cpu.c: Target specific TLS routines
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
  2021-11-04 14:05 ` [PATCH v3 01/29] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards Warner Losh
  2021-11-04 14:05 ` [PATCH v3 02/29] bsd-user/arm/target_syscall.h: Add copyright and update name Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 04/29] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions Warner Losh
                   ` (25 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Target specific TLS routines to get and set the TLS values.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch.h     | 28 ++++++++++++++++++++++++
 bsd-user/arm/target_arch_cpu.c | 39 ++++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
 create mode 100644 bsd-user/arm/target_arch.h
 create mode 100644 bsd-user/arm/target_arch_cpu.c

diff --git a/bsd-user/arm/target_arch.h b/bsd-user/arm/target_arch.h
new file mode 100644
index 0000000000..93cfaea098
--- /dev/null
+++ b/bsd-user/arm/target_arch.h
@@ -0,0 +1,28 @@
+/*
+ * ARM 32-bit specific prototypes for bsd-user
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _TARGET_ARCH_H_
+#define _TARGET_ARCH_H_
+
+#include "qemu.h"
+
+void target_cpu_set_tls(CPUARMState *env, target_ulong newtls);
+target_ulong target_cpu_get_tls(CPUARMState *env);
+
+#endif /* !_TARGET_ARCH_H_ */
diff --git a/bsd-user/arm/target_arch_cpu.c b/bsd-user/arm/target_arch_cpu.c
new file mode 100644
index 0000000000..02bf9149d5
--- /dev/null
+++ b/bsd-user/arm/target_arch_cpu.c
@@ -0,0 +1,39 @@
+/*
+ *  arm cpu related code
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+#include "target_arch.h"
+
+void target_cpu_set_tls(CPUARMState *env, target_ulong newtls)
+{
+    if (access_secure_reg(env)) {
+        env->cp15.tpidrurw_s = newtls;
+        env->cp15.tpidruro_s = newtls;
+        return;
+    }
+
+    env->cp15.tpidr_el[0] = newtls;
+    env->cp15.tpidrro_el[0] = newtls;
+}
+
+target_ulong target_cpu_get_tls(CPUARMState *env)
+{
+    if (access_secure_reg(env)) {
+        return env->cp15.tpidruro_s;
+    }
+    return env->cp15.tpidrro_el[0];
+}
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 04/29] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (2 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 03/29] bsd-user/arm/target_arch_cpu.c: Target specific TLS routines Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 05/29] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs Warner Losh
                   ` (24 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Olivier Houchard, Warner Losh

target_arch_cpu.h is for CPU loop definitions. Create the file and
define target_cpu_init and target_cpu_reset for arm.

Signed-off-by: Olivier Houchard <cognet@ci0.org>
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_cpu.h | 43 ++++++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 bsd-user/arm/target_arch_cpu.h

diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
new file mode 100644
index 0000000000..66215684d6
--- /dev/null
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -0,0 +1,43 @@
+/*
+ *  arm cpu init and loop
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _TARGET_ARCH_CPU_H_
+#define _TARGET_ARCH_CPU_H_
+
+#include "target_arch.h"
+
+#define TARGET_DEFAULT_CPU_MODEL "any"
+
+static inline void target_cpu_init(CPUARMState *env,
+        struct target_pt_regs *regs)
+{
+    int i;
+
+    cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC,
+               CPSRWriteByInstr);
+    for (i = 0; i < 16; i++) {
+        env->regs[i] = regs->uregs[i];
+    }
+}
+
+static inline void target_cpu_reset(CPUArchState *cpu)
+{
+}
+
+#endif /* !_TARGET_ARCH_CPU_H */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 05/29] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (3 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 04/29] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 06/29] bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation Warner Losh
                   ` (23 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Implement target_cpu_clone_regs to clone the resister state on a fork.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_cpu.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index 66215684d6..fa45d9335d 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -36,6 +36,14 @@ static inline void target_cpu_init(CPUARMState *env,
     }
 }
 
+static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp)
+{
+    if (newsp) {
+        env->regs[13] = newsp;
+    }
+    env->regs[0] = 0;
+}
+
 static inline void target_cpu_reset(CPUArchState *cpu)
 {
 }
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 06/29] bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (4 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 05/29] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 07/29] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions Warner Losh
                   ` (22 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Sean Bruno,
	Richard Henderson, Warner Losh

Add a boiler plate CPU loop that does nothing except return an error for
all traps.

Signed-off-by: Sean Bruno <sbruno@FreeBSD.org>
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_cpu.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index fa45d9335d..2484bdc2f7 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -36,6 +36,28 @@ static inline void target_cpu_init(CPUARMState *env,
     }
 }
 
+static inline void target_cpu_loop(CPUARMState *env)
+{
+    int trapnr;
+    target_siginfo_t info;
+    CPUState *cs = env_cpu(env);
+
+    for (;;) {
+        cpu_exec_start(cs);
+        trapnr = cpu_exec(cs);
+        cpu_exec_end(cs);
+        process_queued_cpu_work(cs);
+        switch (trapnr) {
+        default:
+            fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
+                    trapnr);
+            cpu_dump_state(cs, stderr, 0);
+            abort();
+        } /* switch() */
+        process_pending_signals(env);
+    } /* for (;;) */
+}
+
 static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp)
 {
     if (newsp) {
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 07/29] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (5 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 06/29] bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 17:44   ` Richard Henderson
  2021-11-04 14:05 ` [PATCH v3 08/29] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions Warner Losh
                   ` (21 subsequent siblings)
  28 siblings, 1 reply; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Mikaël Urankar,
	Richard Henderson, Warner Losh

Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and
EXCP_YIELD. The first two generate a signal to the emulated
binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy
nops.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Mikaël Urankar <mikael.urankar@gmail.com>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
---
 bsd-user/arm/target_arch_cpu.h | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index 2484bdc2f7..9f9b380b13 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -48,6 +48,39 @@ static inline void target_cpu_loop(CPUARMState *env)
         cpu_exec_end(cs);
         process_queued_cpu_work(cs);
         switch (trapnr) {
+        case EXCP_UDEF:
+            {
+                /* See arm/arm/undefined.c undefinedinstruction(); */
+                info.si_addr = env->regs[15];
+
+                /* illegal instruction */
+                info.si_signo = TARGET_SIGILL;
+                info.si_errno = 0;
+                info.si_code = TARGET_ILL_ILLOPC;
+                queue_signal(env, info.si_signo, &info);
+
+                /* TODO: What about instruction emulation? */
+            }
+            break;
+        case EXCP_INTERRUPT:
+            /* just indicate that signals should be handled asap */
+            break;
+        case EXCP_DEBUG:
+            {
+
+                info.si_signo = TARGET_SIGTRAP;
+                info.si_errno = 0;
+                info.si_code = TARGET_TRAP_BRKPT;
+                info.si_addr = env->exception.vaddress;
+                queue_signal(env, info.si_signo, &info);
+            }
+            break;
+        case EXCP_ATOMIC:
+            cpu_exec_step_atomic(cs);
+            break;
+        case EXCP_YIELD:
+            /* nothing to do here for user-mode, just resume guest code */
+            break;
         default:
             fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
                     trapnr);
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 08/29] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (6 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 07/29] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 09/29] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch Warner Losh
                   ` (20 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Olivier Houchard, Warner Losh

Implement EXCP_PREFETCH_ABORT AND EXCP_DATA_ABORT. Both of these data
exceptions cause a SIGSEGV.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Olivier Houchard <cognet@ci0.org>
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_cpu.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index 9f9b380b13..905a5ffaff 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -65,6 +65,17 @@ static inline void target_cpu_loop(CPUARMState *env)
         case EXCP_INTERRUPT:
             /* just indicate that signals should be handled asap */
             break;
+        case EXCP_PREFETCH_ABORT:
+            /* See arm/arm/trap.c prefetch_abort_handler() */
+        case EXCP_DATA_ABORT:
+            /* See arm/arm/trap.c data_abort_handler() */
+            info.si_signo = TARGET_SIGSEGV;
+            info.si_errno = 0;
+            /* XXX: check env->error_code */
+            info.si_code = 0;
+            info.si_addr = env->exception.vaddress;
+            queue_signal(env, info.si_signo, &info);
+            break;
         case EXCP_DEBUG:
             {
 
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 09/29] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (7 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 08/29] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 10/29] bsd-user/arm/target_arch_reg.h: Implement core dump register copying Warner Losh
                   ` (19 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Implement the system call dispatch. This implements all three kinds of
system call: direct and the two indirect variants. It handles all the
special cases for thumb as well.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_cpu.h | 94 ++++++++++++++++++++++++++++++++++
 1 file changed, 94 insertions(+)

diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index 905a5ffaff..c675419c30 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -40,6 +40,7 @@ static inline void target_cpu_loop(CPUARMState *env)
 {
     int trapnr;
     target_siginfo_t info;
+    unsigned int n;
     CPUState *cs = env_cpu(env);
 
     for (;;) {
@@ -62,6 +63,99 @@ static inline void target_cpu_loop(CPUARMState *env)
                 /* TODO: What about instruction emulation? */
             }
             break;
+        case EXCP_SWI:
+        case EXCP_BKPT:
+            {
+                /*
+                 * system call
+                 * See arm/arm/trap.c cpu_fetch_syscall_args()
+                 */
+                if (trapnr == EXCP_BKPT) {
+                    if (env->thumb) {
+                        env->regs[15] += 2;
+                    } else {
+                        env->regs[15] += 4;
+                    }
+                }
+                n = env->regs[7];
+                if (bsd_type == target_freebsd) {
+                    int ret;
+                    abi_ulong params = get_sp_from_cpustate(env);
+                    int32_t syscall_nr = n;
+                    int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
+
+                    /* See arm/arm/trap.c cpu_fetch_syscall_args() */
+                    if (syscall_nr == TARGET_FREEBSD_NR_syscall) {
+                        syscall_nr = env->regs[0];
+                        arg1 = env->regs[1];
+                        arg2 = env->regs[2];
+                        arg3 = env->regs[3];
+                        get_user_s32(arg4, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg5, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg6, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg7, params);
+                        arg8 = 0;
+                    } else if (syscall_nr == TARGET_FREEBSD_NR___syscall) {
+                        syscall_nr = env->regs[0];
+                        arg1 = env->regs[2];
+                        arg2 = env->regs[3];
+                        get_user_s32(arg3, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg4, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg5, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg6, params);
+                        arg7 = 0;
+                        arg8 = 0;
+                    } else {
+                        arg1 = env->regs[0];
+                        arg2 = env->regs[1];
+                        arg3 = env->regs[2];
+                        arg4 = env->regs[3];
+                        get_user_s32(arg5, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg6, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg7, params);
+                        params += sizeof(int32_t);
+                        get_user_s32(arg8, params);
+                    }
+                    ret = do_freebsd_syscall(env, syscall_nr, arg1, arg2, arg3,
+                            arg4, arg5, arg6, arg7, arg8);
+                    /*
+                     * Compare to arm/arm/vm_machdep.c
+                     * cpu_set_syscall_retval()
+                     */
+                    if (-TARGET_EJUSTRETURN == ret) {
+                        /*
+                         * Returning from a successful sigreturn syscall.
+                         * Avoid clobbering register state.
+                         */
+                        break;
+                    }
+                    if (-TARGET_ERESTART == ret) {
+                        env->regs[15] -= env->thumb ? 2 : 4;
+                        break;
+                    }
+                    if ((unsigned int)ret >= (unsigned int)(-515)) {
+                        ret = -ret;
+                        cpsr_write(env, CPSR_C, CPSR_C, CPSRWriteByInstr);
+                        env->regs[0] = ret;
+                    } else {
+                        cpsr_write(env, 0, CPSR_C, CPSRWriteByInstr);
+                        env->regs[0] = ret; /* XXX need to handle lseek()? */
+                        /* env->regs[1] = 0; */
+                    }
+                } else {
+                    fprintf(stderr, "qemu: bsd_type (= %d) syscall "
+                            "not supported\n", bsd_type);
+                }
+            }
+            break;
         case EXCP_INTERRUPT:
             /* just indicate that signals should be handled asap */
             break;
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 10/29] bsd-user/arm/target_arch_reg.h: Implement core dump register copying
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (8 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 09/29] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 11/29] bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space Warner Losh
                   ` (18 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Implement the register copying routines to extract registers from the
cpu for core dump generation.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_reg.h | 60 ++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 bsd-user/arm/target_arch_reg.h

diff --git a/bsd-user/arm/target_arch_reg.h b/bsd-user/arm/target_arch_reg.h
new file mode 100644
index 0000000000..ef5ed5154f
--- /dev/null
+++ b/bsd-user/arm/target_arch_reg.h
@@ -0,0 +1,60 @@
+/*
+ *  FreeBSD arm register structures
+ *
+ *  Copyright (c) 2015 Stacey Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _TARGET_ARCH_REG_H_
+#define _TARGET_ARCH_REG_H_
+
+/* See sys/arm/include/reg.h */
+typedef struct target_reg {
+    uint32_t        r[13];
+    uint32_t        r_sp;
+    uint32_t        r_lr;
+    uint32_t        r_pc;
+    uint32_t        r_cpsr;
+} target_reg_t;
+
+typedef struct target_fp_reg {
+    uint32_t        fp_exponent;
+    uint32_t        fp_mantissa_hi;
+    u_int32_t       fp_mantissa_lo;
+} target_fp_reg_t;
+
+typedef struct target_fpreg {
+    uint32_t        fpr_fpsr;
+    target_fp_reg_t fpr[8];
+} target_fpreg_t;
+
+#define tswapreg(ptr)   tswapal(ptr)
+
+static inline void target_copy_regs(target_reg_t *regs, const CPUARMState *env)
+{
+    int i;
+
+    for (i = 0; i < 13; i++) {
+        regs->r[i] = tswapreg(env->regs[i + 1]);
+    }
+    regs->r_sp = tswapreg(env->regs[13]);
+    regs->r_lr = tswapreg(env->regs[14]);
+    regs->r_pc = tswapreg(env->regs[15]);
+    regs->r_cpsr = tswapreg(cpsr_read((CPUARMState *)env));
+}
+
+#undef tswapreg
+
+#endif /* !_TARGET_ARCH_REG_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 11/29] bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (9 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 10/29] bsd-user/arm/target_arch_reg.h: Implement core dump register copying Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 12/29] bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm Warner Losh
                   ` (17 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Various parameters describing the layout of the ARM address space. In
addition, define routines to get the stack pointer and to set the second
return value.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_vmparam.h | 48 ++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)
 create mode 100644 bsd-user/arm/target_arch_vmparam.h

diff --git a/bsd-user/arm/target_arch_vmparam.h b/bsd-user/arm/target_arch_vmparam.h
new file mode 100644
index 0000000000..4bbc04ddf5
--- /dev/null
+++ b/bsd-user/arm/target_arch_vmparam.h
@@ -0,0 +1,48 @@
+/*
+ *  arm VM parameters definitions
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _TARGET_ARCH_VMPARAM_H_
+#define _TARGET_ARCH_VMPARAM_H_
+
+#include "cpu.h"
+
+/* compare to sys/arm/include/vmparam.h */
+#define TARGET_MAXTSIZ      (64 * MiB)           /* max text size */
+#define TARGET_DFLDSIZ      (128 * MiB)          /* initial data size limit */
+#define TARGET_MAXDSIZ      (512 * MiB)          /* max data size */
+#define TARGET_DFLSSIZ      (4 * MiB)            /* initial stack size limit */
+#define TARGET_MAXSSIZ      (64 * MiB)           /* max stack size */
+#define TARGET_SGROWSIZ     (128 * KiB)          /* amount to grow stack */
+
+#define TARGET_RESERVED_VA  0xf7000000
+
+                /* KERNBASE - 512 MB */
+#define TARGET_VM_MAXUSER_ADDRESS   (0xc0000000 - (512 * MiB))
+#define TARGET_USRSTACK             TARGET_VM_MAXUSER_ADDRESS
+
+static inline abi_ulong get_sp_from_cpustate(CPUARMState *state)
+{
+    return state->regs[13]; /* sp */
+}
+
+static inline void set_second_rval(CPUARMState *state, abi_ulong retval2)
+{
+    state->regs[1] = retval2;
+}
+
+#endif  /* ! _TARGET_ARCH_VMPARAM_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 12/29] bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (10 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 11/29] bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 13/29] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread Warner Losh
                   ` (16 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Copy of the signal trampoline code for arm, as well as setup_sigtramp to
write it to the stack.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_sigtramp.h | 49 +++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 bsd-user/arm/target_arch_sigtramp.h

diff --git a/bsd-user/arm/target_arch_sigtramp.h b/bsd-user/arm/target_arch_sigtramp.h
new file mode 100644
index 0000000000..5d434a9e7e
--- /dev/null
+++ b/bsd-user/arm/target_arch_sigtramp.h
@@ -0,0 +1,49 @@
+/*
+ *  arm sysarch() system call emulation
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _TARGET_ARCH_SIGTRAMP_H_
+#define _TARGET_ARCH_SIGTRAMP_H_
+
+/* Compare to arm/arm/locore.S ENTRY_NP(sigcode) */
+static inline abi_long setup_sigtramp(abi_ulong offset, unsigned sigf_uc,
+        unsigned sys_sigreturn)
+{
+    int i;
+    uint32_t sys_exit = TARGET_FREEBSD_NR_exit;
+    uint32_t sigtramp_code[] = {
+    /* 1 */ 0xE1A0000D,                  /* mov r0, sp */
+    /* 2 */ 0xE2800000 + sigf_uc,        /* add r0, r0, #SIGF_UC */
+    /* 3 */ 0xE59F700C,                  /* ldr r7, [pc, #12] */
+    /* 4 */ 0xEF000000 + sys_sigreturn,  /* swi (SYS_sigreturn) */
+    /* 5 */ 0xE59F7008,                  /* ldr r7, [pc, #8] */
+    /* 6 */ 0xEF000000 + sys_exit,       /* swi (SYS_exit)*/
+    /* 7 */ 0xEAFFFFFA,                  /* b . -16 */
+    /* 8 */ sys_sigreturn,
+    /* 9 */ sys_exit
+    };
+
+    G_STATIC_ASSERT(sizeof(sigtramp_code) == TARGET_SZSIGCODE);
+
+    for (i = 0; i < 9; i++) {
+        tswap32s(&sigtramp_code[i]);
+    }
+
+    return memcpy_to_target(offset, sigtramp_code, TARGET_SZSIGCODE);
+}
+#endif /* _TARGET_ARCH_SIGTRAMP_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 13/29] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (11 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 12/29] bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 14/29] bsd-user/arm/target_arch_elf.h: arm defines for ELF Warner Losh
                   ` (15 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Implement target_thread_init (to create a thread) and target_set_upcall
(to switch to a thread) for arm.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
---
 bsd-user/arm/target_arch_thread.h | 82 +++++++++++++++++++++++++++++++
 1 file changed, 82 insertions(+)
 create mode 100644 bsd-user/arm/target_arch_thread.h

diff --git a/bsd-user/arm/target_arch_thread.h b/bsd-user/arm/target_arch_thread.h
new file mode 100644
index 0000000000..11c7f76583
--- /dev/null
+++ b/bsd-user/arm/target_arch_thread.h
@@ -0,0 +1,82 @@
+/*
+ *  arm thread support
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _TARGET_ARCH_THREAD_H_
+#define _TARGET_ARCH_THREAD_H_
+
+/* Compare to arm/arm/vm_machdep.c cpu_set_upcall_kse() */
+static inline void target_thread_set_upcall(CPUARMState *env, abi_ulong entry,
+    abi_ulong arg, abi_ulong stack_base, abi_ulong stack_size)
+{
+    abi_ulong sp;
+
+    /*
+     * Make sure the stack is properly aligned.
+     * arm/include/param.h (STACKLIGN() macro)
+     */
+    sp = (u_int)(stack_base + stack_size) & ~0x7;
+
+    /* sp = stack base */
+    env->regs[13] = sp;
+    /* pc = start function entry */
+    env->regs[15] = entry & 0xfffffffe;
+    /* r0 = arg */
+    env->regs[0] = arg;
+    env->spsr = ARM_CPU_MODE_USR;
+    /*
+     * Thumb mode is encoded by the low bit in the entry point (since ARM can't
+     * execute at odd addresses). When it's set, set the Thumb bit (T) in the
+     * CPSR.
+     */
+    cpsr_write(env, (entry & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr);
+}
+
+static inline void target_thread_init(struct target_pt_regs *regs,
+        struct image_info *infop)
+{
+    abi_long stack = infop->start_stack;
+    memset(regs, 0, sizeof(*regs));
+    regs->ARM_cpsr = ARM_CPU_MODE_USR;
+    /*
+     * Thumb mode is encoded by the low bit in the entry point (since ARM can't
+     * execute at odd addresses). When it's set, set the Thumb bit (T) in the
+     * CPSR.
+     */
+    if (infop->entry & 1) {
+        regs->ARM_cpsr |= CPSR_T;
+    }
+    regs->ARM_pc = infop->entry & 0xfffffffe;
+    regs->ARM_sp = stack;
+    if (bsd_type == target_freebsd) {
+        regs->ARM_lr = infop->entry & 0xfffffffe;
+    }
+    /*
+     * FreeBSD kernel passes the ps_strings pointer in r0. This is used by some
+     * programs to set status messages that we see in ps. bsd-user doesn't
+     * support that functionality, so it's ignored. When set to 0, FreeBSD's csu
+     * code ignores it. For the static case, r1 and r2 are effectively ignored
+     * by the csu __startup() routine. For the dynamic case, rtld saves r0 but
+     * generates r1 and r2 and passes them into the csu _startup.
+     *
+     * r0 ps_strings 0 passed since ps arg setting not supported
+     * r1 obj_main   ignored by _start(), so 0 passed
+     * r2 cleanup    generated by rtld or ignored by _start(), so 0 passed
+     */
+}
+
+#endif /* !_TARGET_ARCH_THREAD_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 14/29] bsd-user/arm/target_arch_elf.h: arm defines for ELF
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (12 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 13/29] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 15/29] bsd-user/arm/target_arch_elf.h: arm get hwcap Warner Losh
                   ` (14 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Basic set of defines needed for arm ELF file activation.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_elf.h | 36 ++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 bsd-user/arm/target_arch_elf.h

diff --git a/bsd-user/arm/target_arch_elf.h b/bsd-user/arm/target_arch_elf.h
new file mode 100644
index 0000000000..15b5c66511
--- /dev/null
+++ b/bsd-user/arm/target_arch_elf.h
@@ -0,0 +1,36 @@
+/*
+ *  arm ELF definitions
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _TARGET_ARCH_ELF_H_
+#define _TARGET_ARCH_ELF_H_
+
+#define ELF_START_MMAP 0x80000000
+#define ELF_ET_DYN_LOAD_ADDR    0x500000
+
+#define elf_check_arch(x) ((x) == EM_ARM)
+
+#define ELF_CLASS       ELFCLASS32
+#define ELF_DATA        ELFDATA2LSB
+#define ELF_ARCH        EM_ARM
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE       4096
+
+#define ELF_HWCAP 0
+
+#endif /* _TARGET_ARCH_ELF_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 15/29] bsd-user/arm/target_arch_elf.h: arm get hwcap
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (13 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 14/29] bsd-user/arm/target_arch_elf.h: arm defines for ELF Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 16/29] bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl Warner Losh
                   ` (13 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Implement get_elf_hwcap to get the first word of hardware capabilities.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_elf.h | 72 +++++++++++++++++++++++++++++++++-
 1 file changed, 71 insertions(+), 1 deletion(-)

diff --git a/bsd-user/arm/target_arch_elf.h b/bsd-user/arm/target_arch_elf.h
index 15b5c66511..02d25b8926 100644
--- a/bsd-user/arm/target_arch_elf.h
+++ b/bsd-user/arm/target_arch_elf.h
@@ -31,6 +31,76 @@
 #define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
 
-#define ELF_HWCAP 0
+#define ELF_HWCAP get_elf_hwcap()
+
+#define GET_FEATURE(feat, hwcap) \
+    do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0)
+
+#define GET_FEATURE_ID(feat, hwcap) \
+    do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
+
+enum {
+    ARM_HWCAP_ARM_SWP       = 1 << 0,
+    ARM_HWCAP_ARM_HALF      = 1 << 1,
+    ARM_HWCAP_ARM_THUMB     = 1 << 2,
+    ARM_HWCAP_ARM_26BIT     = 1 << 3,
+    ARM_HWCAP_ARM_FAST_MULT = 1 << 4,
+    ARM_HWCAP_ARM_FPA       = 1 << 5,
+    ARM_HWCAP_ARM_VFP       = 1 << 6,
+    ARM_HWCAP_ARM_EDSP      = 1 << 7,
+    ARM_HWCAP_ARM_JAVA      = 1 << 8,
+    ARM_HWCAP_ARM_IWMMXT    = 1 << 9,
+    ARM_HWCAP_ARM_CRUNCH    = 1 << 10,
+    ARM_HWCAP_ARM_THUMBEE   = 1 << 11,
+    ARM_HWCAP_ARM_NEON      = 1 << 12,
+    ARM_HWCAP_ARM_VFPv3     = 1 << 13,
+    ARM_HWCAP_ARM_VFPv3D16  = 1 << 14,
+    ARM_HWCAP_ARM_TLS       = 1 << 15,
+    ARM_HWCAP_ARM_VFPv4     = 1 << 16,
+    ARM_HWCAP_ARM_IDIVA     = 1 << 17,
+    ARM_HWCAP_ARM_IDIVT     = 1 << 18,
+    ARM_HWCAP_ARM_VFPD32    = 1 << 19,
+    ARM_HWCAP_ARM_LPAE      = 1 << 20,
+    ARM_HWCAP_ARM_EVTSTRM   = 1 << 21,
+};
+
+static uint32_t get_elf_hwcap(void)
+{
+    ARMCPU *cpu = ARM_CPU(thread_cpu);
+    uint32_t hwcaps = 0;
+
+    hwcaps |= ARM_HWCAP_ARM_SWP;
+    hwcaps |= ARM_HWCAP_ARM_HALF;
+    hwcaps |= ARM_HWCAP_ARM_THUMB;
+    hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
+
+    /* probe for the extra features */
+    /* EDSP is in v5TE and above */
+    GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
+    GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
+    GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
+    GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
+    GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
+    GET_FEATURE(ARM_FEATURE_LPAE, ARM_HWCAP_ARM_LPAE);
+    GET_FEATURE_ID(aa32_arm_div, ARM_HWCAP_ARM_IDIVA);
+    GET_FEATURE_ID(aa32_thumb_div, ARM_HWCAP_ARM_IDIVT);
+    GET_FEATURE_ID(aa32_vfp, ARM_HWCAP_ARM_VFP);
+
+    if (cpu_isar_feature(aa32_fpsp_v3, cpu) ||
+        cpu_isar_feature(aa32_fpdp_v3, cpu)) {
+        hwcaps |= ARM_HWCAP_ARM_VFPv3;
+        if (cpu_isar_feature(aa32_simd_r32, cpu)) {
+            hwcaps |= ARM_HWCAP_ARM_VFPD32;
+        } else {
+            hwcaps |= ARM_HWCAP_ARM_VFPv3D16;
+        }
+    }
+    GET_FEATURE_ID(aa32_simdfmac, ARM_HWCAP_ARM_VFPv4);
+
+    return hwcaps;
+}
+
+#undef GET_FEATURE
+#undef GET_FEATURE_ID
 
 #endif /* _TARGET_ARCH_ELF_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 16/29] bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (14 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 15/29] bsd-user/arm/target_arch_elf.h: arm get hwcap Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 17/29] bsd-user/freebsd: Create common target_os_ucontext.h file Warner Losh
                   ` (12 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Richard Henderson, Warner Losh

Implement the extended HW capabilities for HWCAP2.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_elf.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/bsd-user/arm/target_arch_elf.h b/bsd-user/arm/target_arch_elf.h
index 02d25b8926..4a0215d02e 100644
--- a/bsd-user/arm/target_arch_elf.h
+++ b/bsd-user/arm/target_arch_elf.h
@@ -32,6 +32,7 @@
 #define ELF_EXEC_PAGESIZE       4096
 
 #define ELF_HWCAP get_elf_hwcap()
+#define ELF_HWCAP2 get_elf_hwcap2()
 
 #define GET_FEATURE(feat, hwcap) \
     do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0)
@@ -64,6 +65,14 @@ enum {
     ARM_HWCAP_ARM_EVTSTRM   = 1 << 21,
 };
 
+enum {
+    ARM_HWCAP2_ARM_AES      = 1 << 0,
+    ARM_HWCAP2_ARM_PMULL    = 1 << 1,
+    ARM_HWCAP2_ARM_SHA1     = 1 << 2,
+    ARM_HWCAP2_ARM_SHA2     = 1 << 3,
+    ARM_HWCAP2_ARM_CRC32    = 1 << 4,
+};
+
 static uint32_t get_elf_hwcap(void)
 {
     ARMCPU *cpu = ARM_CPU(thread_cpu);
@@ -100,6 +109,19 @@ static uint32_t get_elf_hwcap(void)
     return hwcaps;
 }
 
+static uint32_t get_elf_hwcap2(void)
+{
+    ARMCPU *cpu = ARM_CPU(thread_cpu);
+    uint32_t hwcaps = 0;
+
+    GET_FEATURE_ID(aa32_aes, ARM_HWCAP2_ARM_AES);
+    GET_FEATURE_ID(aa32_pmull, ARM_HWCAP2_ARM_PMULL);
+    GET_FEATURE_ID(aa32_sha1, ARM_HWCAP2_ARM_SHA1);
+    GET_FEATURE_ID(aa32_sha2, ARM_HWCAP2_ARM_SHA2);
+    GET_FEATURE_ID(aa32_crc32, ARM_HWCAP2_ARM_CRC32);
+    return hwcaps;
+}
+
 #undef GET_FEATURE
 #undef GET_FEATURE_ID
 
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 17/29] bsd-user/freebsd: Create common target_os_ucontext.h file
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (15 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 16/29] bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 18/29] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack Warner Losh
                   ` (11 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Richard Henderson, Warner Losh

FreeBSD has a MI ucontext structure that contains the MD mcontext
machine state and other things that are machine independent. Create an
include file for all the ucontext stuff. It needs to be included in the
arch specific files after target_mcontext is defined. This is largely
copied from sys/_ucontext.h with the comments about layout removed
because we don't support ancient FreeBSD binaries.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/freebsd/target_os_signal.h   |  3 ---
 bsd-user/freebsd/target_os_ucontext.h | 26 ++++++++++++++++++++++++++
 2 files changed, 26 insertions(+), 3 deletions(-)
 create mode 100644 bsd-user/freebsd/target_os_ucontext.h

diff --git a/bsd-user/freebsd/target_os_signal.h b/bsd-user/freebsd/target_os_signal.h
index 1a4c5faf19..3ed454e086 100644
--- a/bsd-user/freebsd/target_os_signal.h
+++ b/bsd-user/freebsd/target_os_signal.h
@@ -1,9 +1,6 @@
 #ifndef _TARGET_OS_SIGNAL_H_
 #define _TARGET_OS_SIGNAL_H_
 
-/* FreeBSD's sys/ucontext.h defines this */
-#define TARGET_MC_GET_CLEAR_RET 0x0001
-
 #include "target_os_siginfo.h"
 #include "target_arch_signal.h"
 
diff --git a/bsd-user/freebsd/target_os_ucontext.h b/bsd-user/freebsd/target_os_ucontext.h
new file mode 100644
index 0000000000..20b8a9188e
--- /dev/null
+++ b/bsd-user/freebsd/target_os_ucontext.h
@@ -0,0 +1,26 @@
+/*
+ * FreeBSD has a common ucontext definition for all architectures.
+ *
+ * Copyright 2021 Warner Losh <imp@bsdimp.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+ */
+
+/*
+ * Defines the common bits for all of FreeBSD's architectures. Has to be
+ * included AFTER the MD target_mcontext_t is defined, however, so can't
+ * be in the grab-bag that is target_os_signal.h.
+ */
+
+/* See FreeBSD's sys/ucontext.h */
+#define TARGET_MC_GET_CLEAR_RET 0x0001
+
+/* FreeBSD's sys/_ucontext.h structures */
+typedef struct target_ucontext {
+    target_sigset_t     uc_sigmask;
+    target_mcontext_t   uc_mcontext;
+    abi_ulong           uc_link;
+    target_stack_t      uc_stack;
+    int32_t             uc_flags;
+    int32_t             __spare__[4];
+} target_ucontext_t;
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 18/29] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (16 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 17/29] bsd-user/freebsd: Create common target_os_ucontext.h file Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals Warner Losh
                   ` (10 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Defines for registers and stack layout related to signals.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_signal.h | 57 +++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 bsd-user/arm/target_arch_signal.h

diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h
new file mode 100644
index 0000000000..973183d99c
--- /dev/null
+++ b/bsd-user/arm/target_arch_signal.h
@@ -0,0 +1,57 @@
+/*
+ *  arm signal definitions
+ *
+ *  Copyright (c) 2013 Stacey D. Son
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _TARGET_ARCH_SIGNAL_H_
+#define _TARGET_ARCH_SIGNAL_H_
+
+#include "cpu.h"
+
+#define TARGET_REG_R0   0
+#define TARGET_REG_R1   1
+#define TARGET_REG_R2   2
+#define TARGET_REG_R3   3
+#define TARGET_REG_R4   4
+#define TARGET_REG_R5   5
+#define TARGET_REG_R6   6
+#define TARGET_REG_R7   7
+#define TARGET_REG_R8   8
+#define TARGET_REG_R9   9
+#define TARGET_REG_R10  10
+#define TARGET_REG_R11  11
+#define TARGET_REG_R12  12
+#define TARGET_REG_R13  13
+#define TARGET_REG_R14  14
+#define TARGET_REG_R15  15
+#define TARGET_REG_CPSR 16
+#define TARGET__NGREG   17
+/* Convenience synonyms */
+#define TARGET_REG_FP   TARGET_REG_R11
+#define TARGET_REG_SP   TARGET_REG_R13
+#define TARGET_REG_LR   TARGET_REG_R14
+#define TARGET_REG_PC   TARGET_REG_R15
+
+#define TARGET_INSN_SIZE    4       /* arm instruction size */
+
+/* Size of the signal trampolin code. See _sigtramp(). */
+#define TARGET_SZSIGCODE    ((abi_ulong)(9 * TARGET_INSN_SIZE))
+
+/* compare to arm/include/_limits.h */
+#define TARGET_MINSIGSTKSZ  (1024 * 4)                  /* min sig stack size */
+#define TARGET_SIGSTKSZ     (TARGET_MINSIGSTKSZ + 32768)  /* recommended size */
+
+#endif /* !_TARGET_ARCH_SIGNAL_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (17 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 18/29] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 17:48   ` Richard Henderson
  2021-11-04 14:05 ` [PATCH v3 20/29] bsd-user/arm/target_arch_signal.h: arm user context and trapframe " Warner Losh
                   ` (9 subsequent siblings)
  28 siblings, 1 reply; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
---
 bsd-user/arm/target_arch_signal.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h
index 973183d99c..3aaced474b 100644
--- a/bsd-user/arm/target_arch_signal.h
+++ b/bsd-user/arm/target_arch_signal.h
@@ -54,4 +54,24 @@
 #define TARGET_MINSIGSTKSZ  (1024 * 4)                  /* min sig stack size */
 #define TARGET_SIGSTKSZ     (TARGET_MINSIGSTKSZ + 32768)  /* recommended size */
 
+/*
+ * Floating point register state
+ */
+typedef struct target_mcontext_vfp {
+    abi_ullong  mcv_reg[32];
+    abi_ulong   mcv_fpscr;
+} target_mcontext_vfp_t;
+
+typedef struct target_mcontext {
+    uint32_t    __gregs[32];
+
+    /*
+     * Originally, rest of this structure was named __fpu, 35 * 4 bytes
+     * long, never accessed from kernel.
+     */
+    abi_long    mc_vfp_size;
+    abi_ptr     *mc_vfp_ptr;
+    abi_int     mc_spare[33];
+} target_mcontext_t;
+
 #endif /* !_TARGET_ARCH_SIGNAL_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 20/29] bsd-user/arm/target_arch_signal.h: arm user context and trapframe for signals
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (18 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 21/29] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args Warner Losh
                   ` (8 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Arm specific user context structures for signal handling and the closely
related trap frame.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_signal.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h
index 3aaced474b..4bdfcbb8d7 100644
--- a/bsd-user/arm/target_arch_signal.h
+++ b/bsd-user/arm/target_arch_signal.h
@@ -74,4 +74,12 @@ typedef struct target_mcontext {
     abi_int     mc_spare[33];
 } target_mcontext_t;
 
+#include "target_os_ucontext.h"
+
+struct target_sigframe {
+    target_siginfo_t    sf_si;  /* saved siginfo */
+    target_ucontext_t   sf_uc;  /* saved ucontext */
+    target_mcontext_vfp_t sf_vfp; /* actual saved VFP context */
+};
+
 #endif /* !_TARGET_ARCH_SIGNAL_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 21/29] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (19 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 20/29] bsd-user/arm/target_arch_signal.h: arm user context and trapframe " Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 22/29] bsd-user/arm/target_arch_signal.h: arm get_mcontext Warner Losh
                   ` (7 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Implement set_sigtramp_args to setup the arguments to the sigtramp
calls.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_signal.h | 39 +++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h
index 4bdfcbb8d7..e673132c68 100644
--- a/bsd-user/arm/target_arch_signal.h
+++ b/bsd-user/arm/target_arch_signal.h
@@ -82,4 +82,43 @@ struct target_sigframe {
     target_mcontext_vfp_t sf_vfp; /* actual saved VFP context */
 };
 
+/*
+ * Compare to arm/arm/machdep.c sendsig()
+ * Assumes that target stack frame memory is locked.
+ */
+static inline abi_long
+set_sigtramp_args(CPUARMState *env, int sig, struct target_sigframe *frame,
+    abi_ulong frame_addr, struct target_sigaction *ka)
+{
+    /*
+     * Arguments to signal handler:
+     *  r0 = signal number
+     *  r1 = siginfo pointer
+     *  r2 = ucontext pointer
+     *  r5 = ucontext pointer
+     *  pc = signal handler pointer
+     *  sp = sigframe struct pointer
+     *  lr = sigtramp at base of user stack
+     */
+
+    env->regs[0] = sig;
+    env->regs[1] = frame_addr +
+        offsetof(struct target_sigframe, sf_si);
+    env->regs[2] = frame_addr +
+        offsetof(struct target_sigframe, sf_uc);
+
+    /* the trampoline uses r5 as the uc address */
+    env->regs[5] = frame_addr +
+        offsetof(struct target_sigframe, sf_uc);
+    env->regs[TARGET_REG_PC] = ka->_sa_handler & ~1;
+    env->regs[TARGET_REG_SP] = frame_addr;
+    env->regs[TARGET_REG_LR] = TARGET_PS_STRINGS - TARGET_SZSIGCODE;
+    /*
+     * Low bit indicates whether or not we're entering thumb mode.
+     */
+    cpsr_write(env, (ka->_sa_handler & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr);
+
+    return 0;
+}
+
 #endif /* !_TARGET_ARCH_SIGNAL_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 22/29] bsd-user/arm/target_arch_signal.h: arm get_mcontext
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (20 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 21/29] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext Warner Losh
                   ` (6 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Get the machine context from the CPU state.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_signal.h | 50 +++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h
index e673132c68..ebb44d10dc 100644
--- a/bsd-user/arm/target_arch_signal.h
+++ b/bsd-user/arm/target_arch_signal.h
@@ -121,4 +121,54 @@ set_sigtramp_args(CPUARMState *env, int sig, struct target_sigframe *frame,
     return 0;
 }
 
+/*
+ * Compare to arm/arm/machdep.c get_mcontext()
+ * Assumes that the memory is locked if mcp points to user memory.
+ */
+static inline abi_long get_mcontext(CPUARMState *env, target_mcontext_t *mcp,
+        int flags)
+{
+    int err = 0;
+    uint32_t *gr = mcp->__gregs;
+
+    if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(target_mcontext_vfp_t)) {
+        return -TARGET_EINVAL;
+    }
+
+    gr[TARGET_REG_CPSR] = tswap32(cpsr_read(env));
+    if (flags & TARGET_MC_GET_CLEAR_RET) {
+        gr[TARGET_REG_R0] = 0;
+        gr[TARGET_REG_CPSR] &= ~CPSR_C;
+    } else {
+        gr[TARGET_REG_R0] = tswap32(env->regs[0]);
+    }
+
+    gr[TARGET_REG_R1] = tswap32(env->regs[1]);
+    gr[TARGET_REG_R2] = tswap32(env->regs[2]);
+    gr[TARGET_REG_R3] = tswap32(env->regs[3]);
+    gr[TARGET_REG_R4] = tswap32(env->regs[4]);
+    gr[TARGET_REG_R5] = tswap32(env->regs[5]);
+    gr[TARGET_REG_R6] = tswap32(env->regs[6]);
+    gr[TARGET_REG_R7] = tswap32(env->regs[7]);
+    gr[TARGET_REG_R8] = tswap32(env->regs[8]);
+    gr[TARGET_REG_R9] = tswap32(env->regs[9]);
+    gr[TARGET_REG_R10] = tswap32(env->regs[10]);
+    gr[TARGET_REG_R11] = tswap32(env->regs[11]);
+    gr[TARGET_REG_R12] = tswap32(env->regs[12]);
+
+    gr[TARGET_REG_SP] = tswap32(env->regs[13]);
+    gr[TARGET_REG_LR] = tswap32(env->regs[14]);
+    gr[TARGET_REG_PC] = tswap32(env->regs[15]);
+
+    if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr != NULL) {
+        /* see get_vfpcontext in sys/arm/arm/exec_machdep.c */
+        target_mcontext_vfp_t *vfp = (target_mcontext_vfp_t *)mcp->mc_vfp_ptr;
+        for (int i = 0; i < 32; i++) {
+            vfp->mcv_reg[i] = tswap64(*aa32_vfp_dreg(env, i));
+        }
+        vfp->mcv_fpscr = tswap32(vfp_get_fpscr(env));
+    }
+    return err;
+}
+
 #endif /* !_TARGET_ARCH_SIGNAL_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (21 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 22/29] bsd-user/arm/target_arch_signal.h: arm get_mcontext Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 18:41   ` Richard Henderson
  2021-11-04 14:05 ` [PATCH v3 24/29] bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn Warner Losh
                   ` (5 subsequent siblings)
  28 siblings, 1 reply; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Move the machine context to the CPU state.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_signal.h | 75 +++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)

diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h
index ebb44d10dc..177617ea8b 100644
--- a/bsd-user/arm/target_arch_signal.h
+++ b/bsd-user/arm/target_arch_signal.h
@@ -171,4 +171,79 @@ static inline abi_long get_mcontext(CPUARMState *env, target_mcontext_t *mcp,
     return err;
 }
 
+/* Compare to arm/arm/exec_machdep.c set_mcontext() */
+static inline abi_long set_mcontext(CPUARMState *env, target_mcontext_t *mcp,
+        int srflag)
+{
+    int err = 0;
+    const uint32_t *gr = mcp->__gregs;
+    uint32_t cpsr, ccpsr = cpsr_read(env);
+    uint32_t fpscr;
+
+    cpsr = tswap32(gr[TARGET_REG_CPSR]);
+    /*
+     * Only allow certain bits to change, reject attempted changes to non-user
+     * bits. In addition, make sure we're headed for user mode and none of the
+     * interrupt bits are set.
+     */
+    if ((ccpsr & ~CPSR_USER) != (cpsr & ~CPSR_USER)) {
+        return -TARGET_EINVAL;
+    }
+    if ((cpsr & CPSR_M) != ARM_CPU_MODE_USR ||
+        (cpsr & (CPSR_I | CPSR_F)) != 0) {
+        return -TARGET_EINVAL;
+    }
+
+    /*
+     * Make sure that we either have no vfp, or it's the correct size.
+     * FreeBSD just ignores it, though, so maybe we'll need to adjust
+     * things below instead.
+     */
+    if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(target_mcontext_vfp_t)) {
+        return -TARGET_EINVAL;
+    }
+    /*
+     * Make sure T mode matches the PC's notion of thumb mode, although
+     * FreeBSD lets the processor sort this out, so we may need remove
+     * this check, or generate a signal...
+     */
+    if (!!(tswap32(gr[TARGET_REG_PC]) & 1) != !!(cpsr & CPSR_T)) {
+        return -TARGET_EINVAL;
+    }
+
+    env->regs[0] = tswap32(gr[TARGET_REG_R0]);
+    env->regs[1] = tswap32(gr[TARGET_REG_R1]);
+    env->regs[2] = tswap32(gr[TARGET_REG_R2]);
+    env->regs[3] = tswap32(gr[TARGET_REG_R3]);
+    env->regs[4] = tswap32(gr[TARGET_REG_R4]);
+    env->regs[5] = tswap32(gr[TARGET_REG_R5]);
+    env->regs[6] = tswap32(gr[TARGET_REG_R6]);
+    env->regs[7] = tswap32(gr[TARGET_REG_R7]);
+    env->regs[8] = tswap32(gr[TARGET_REG_R8]);
+    env->regs[9] = tswap32(gr[TARGET_REG_R9]);
+    env->regs[10] = tswap32(gr[TARGET_REG_R10]);
+    env->regs[11] = tswap32(gr[TARGET_REG_R11]);
+    env->regs[12] = tswap32(gr[TARGET_REG_R12]);
+
+    env->regs[13] = tswap32(gr[TARGET_REG_SP]);
+    env->regs[14] = tswap32(gr[TARGET_REG_LR]);
+    env->regs[15] = tswap32(gr[TARGET_REG_PC]);
+    if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr != NULL) {
+        /* see set_vfpcontext in sys/arm/arm/exec_machdep.c */
+        target_mcontext_vfp_t *vfp = (target_mcontext_vfp_t *)mcp->mc_vfp_ptr;
+        for (int i = 0; i < 32; i++) {
+            *aa32_vfp_dreg(env, i) = tswap64(vfp->mcv_reg[i]);
+        }
+        fpscr =  tswap32(vfp->mcv_fpscr);
+        vfp_set_fpscr(env, fpscr);
+        /*
+         * linux-user sets fpexc, fpinst and fpinst2, but these aren't in
+         * FreeBSD's mcontext, what to do?
+         */
+    }
+    cpsr_write(env, cpsr, CPSR_USER | CPSR_EXEC, CPSRWriteByInstr);
+
+    return err;
+}
+
 #endif /* !_TARGET_ARCH_SIGNAL_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 24/29] bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (22 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 25/29] bsd-user: add arm target build Warner Losh
                   ` (4 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Richard Henderson,
	Warner Losh

Update ucontext to implement sigreturn.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/arm/target_arch_signal.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h
index 177617ea8b..fd38b14c33 100644
--- a/bsd-user/arm/target_arch_signal.h
+++ b/bsd-user/arm/target_arch_signal.h
@@ -246,4 +246,13 @@ static inline abi_long set_mcontext(CPUARMState *env, target_mcontext_t *mcp,
     return err;
 }
 
+/* Compare to arm/arm/machdep.c sys_sigreturn() */
+static inline abi_long get_ucontext_sigreturn(CPUARMState *env,
+        abi_ulong target_sf, abi_ulong *target_uc)
+{
+    *target_uc = target_sf;
+
+    return 0;
+}
+
 #endif /* !_TARGET_ARCH_SIGNAL_H_ */
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 25/29] bsd-user: add arm target build
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (23 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 24/29] bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 26/29] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext Warner Losh
                   ` (3 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Paolo Bonzini, Richard Henderson,
	Warner Losh

CC: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Acked-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 configs/targets/arm-bsd-user.mak | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 configs/targets/arm-bsd-user.mak

diff --git a/configs/targets/arm-bsd-user.mak b/configs/targets/arm-bsd-user.mak
new file mode 100644
index 0000000000..cb143e6426
--- /dev/null
+++ b/configs/targets/arm-bsd-user.mak
@@ -0,0 +1,2 @@
+TARGET_ARCH=arm
+TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 26/29] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (24 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 25/29] bsd-user: add arm target build Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 27/29] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
                   ` (2 subsequent siblings)
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Richard Henderson, Warner Losh

In FreeBSD, sigcontext was retired in favor of ucontext/mcontext.
Remove vestigial target_sigcontext.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/i386/target_arch_signal.h | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/bsd-user/i386/target_arch_signal.h b/bsd-user/i386/target_arch_signal.h
index a90750d602..e262667bda 100644
--- a/bsd-user/i386/target_arch_signal.h
+++ b/bsd-user/i386/target_arch_signal.h
@@ -27,10 +27,6 @@
 #define TARGET_MINSIGSTKSZ  (512 * 4)               /* min sig stack size */
 #define TARGET_SIGSTKSZ     (MINSIGSTKSZ + 32768)   /* recommended size */
 
-struct target_sigcontext {
-    /* to be added */
-};
-
 typedef struct target_mcontext {
 } target_mcontext_t;
 
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 27/29] bsd-user/x86_64/target_arch_signal.h: Remove target_sigcontext
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (25 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 26/29] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 28/29] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h Warner Losh
  2021-11-04 14:05 ` [PATCH v3 29/29] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Richard Henderson, Warner Losh

In FreeBSD, sigcontext was retired in favor of ucontext/mcontext.
Remove vestigial target_sigcontext.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/x86_64/target_arch_signal.h | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/bsd-user/x86_64/target_arch_signal.h b/bsd-user/x86_64/target_arch_signal.h
index 4bb753b08b..55f742b0a8 100644
--- a/bsd-user/x86_64/target_arch_signal.h
+++ b/bsd-user/x86_64/target_arch_signal.h
@@ -27,10 +27,6 @@
 #define TARGET_MINSIGSTKSZ  (512 * 4)               /* min sig stack size */
 #define TARGET_SIGSTKSZ     (MINSIGSTKSZ + 32768)   /* recommended size */
 
-struct target_sigcontext {
-    /* to be added */
-};
-
 typedef struct target_mcontext {
 } target_mcontext_t;
 
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 28/29] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (26 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 27/29] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  2021-11-04 14:05 ` [PATCH v3 29/29] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Richard Henderson, Warner Losh

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/i386/target_arch_signal.h | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/bsd-user/i386/target_arch_signal.h b/bsd-user/i386/target_arch_signal.h
index e262667bda..bf7263c4f8 100644
--- a/bsd-user/i386/target_arch_signal.h
+++ b/bsd-user/i386/target_arch_signal.h
@@ -30,14 +30,7 @@
 typedef struct target_mcontext {
 } target_mcontext_t;
 
-typedef struct target_ucontext {
-    target_sigset_t   uc_sigmask;
-    target_mcontext_t uc_mcontext;
-    abi_ulong         uc_link;
-    target_stack_t    uc_stack;
-    int32_t           uc_flags;
-    int32_t         __spare__[4];
-} target_ucontext_t;
+#include "target_os_ucontext.h"
 
 struct target_sigframe {
     abi_ulong   sf_signum;
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* [PATCH v3 29/29] bsd-user/x86_64/target_arch_signal.h: use new target_os_ucontext.h
  2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
                   ` (27 preceding siblings ...)
  2021-11-04 14:05 ` [PATCH v3 28/29] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h Warner Losh
@ 2021-11-04 14:05 ` Warner Losh
  28 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 14:05 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-trivial, Kyle Evans, Michael Tokarev, Laurent Vivier,
	Philippe Mathieu-Daude, Richard Henderson, Warner Losh

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 bsd-user/x86_64/target_arch_signal.h | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/bsd-user/x86_64/target_arch_signal.h b/bsd-user/x86_64/target_arch_signal.h
index 55f742b0a8..e84aff948c 100644
--- a/bsd-user/x86_64/target_arch_signal.h
+++ b/bsd-user/x86_64/target_arch_signal.h
@@ -30,14 +30,7 @@
 typedef struct target_mcontext {
 } target_mcontext_t;
 
-typedef struct target_ucontext {
-    target_sigset_t   uc_sigmask;
-    target_mcontext_t uc_mcontext;
-    abi_ulong         uc_link;
-    target_stack_t    uc_stack;
-    int32_t           uc_flags;
-    int32_t         __spare__[4];
-} target_ucontext_t;
+#include "target_os_ucontext.h"
 
 struct target_sigframe {
     abi_ulong   sf_signum;
-- 
2.33.0



^ permalink raw reply related	[flat|nested] 37+ messages in thread

* Re: [PATCH v3 07/29] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
  2021-11-04 14:05 ` [PATCH v3 07/29] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions Warner Losh
@ 2021-11-04 17:44   ` Richard Henderson
  0 siblings, 0 replies; 37+ messages in thread
From: Richard Henderson @ 2021-11-04 17:44 UTC (permalink / raw)
  To: Warner Losh, qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude, Mikaël Urankar

On 11/4/21 10:05 AM, Warner Losh wrote:
> Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and
> EXCP_YIELD. The first two generate a signal to the emulated
> binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy
> nops.
> 
> Signed-off-by: Stacey Son<sson@FreeBSD.org>
> Signed-off-by: Mikaël Urankar<mikael.urankar@gmail.com>
> Signed-off-by: Kyle Evans<kevans@FreeBSD.org>
> Signed-off-by: Warner Losh<imp@bsdimp.com>
> ---
>   bsd-user/arm/target_arch_cpu.h | 33 +++++++++++++++++++++++++++++++++
>   1 file changed, 33 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 37+ messages in thread

* Re: [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals
  2021-11-04 14:05 ` [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals Warner Losh
@ 2021-11-04 17:48   ` Richard Henderson
  2021-11-04 17:58     ` Warner Losh
  0 siblings, 1 reply; 37+ messages in thread
From: Richard Henderson @ 2021-11-04 17:48 UTC (permalink / raw)
  To: Warner Losh, qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude

On 11/4/21 10:05 AM, Warner Losh wrote:
> +typedef struct target_mcontext {
> +    uint32_t    __gregs[32];

sys/arm/include/ucontext.h has

#define _NGREG          17
typedef __greg_t        __gregset_t[_NGREG];

With s/32/17/ here,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 37+ messages in thread

* Re: [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals
  2021-11-04 17:48   ` Richard Henderson
@ 2021-11-04 17:58     ` Warner Losh
  2021-11-04 18:26       ` Warner Losh
  2021-11-04 20:56       ` Warner Losh
  0 siblings, 2 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 17:58 UTC (permalink / raw)
  To: Richard Henderson
  Cc: Stacey Son, QEMU Trivial, Kyle Evans, Michael Tokarev,
	Philippe Mathieu-Daude, QEMU Developers, Laurent Vivier

[-- Attachment #1: Type: text/plain, Size: 623 bytes --]

On Thu, Nov 4, 2021 at 11:49 AM Richard Henderson <
richard.henderson@linaro.org> wrote:

> On 11/4/21 10:05 AM, Warner Losh wrote:
> > +typedef struct target_mcontext {
> > +    uint32_t    __gregs[32];
>
> sys/arm/include/ucontext.h has
>
> #define _NGREG          17
> typedef __greg_t        __gregset_t[_NGREG];
>
> With s/32/17/ here,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>

Will do.

And I'm going to add compile time asserts for the size of mcontext and
ucontext in a future
patch series. It won't test for layout, but will keep things like this from
happening again by accident.

Warner

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^ permalink raw reply	[flat|nested] 37+ messages in thread

* Re: [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals
  2021-11-04 17:58     ` Warner Losh
@ 2021-11-04 18:26       ` Warner Losh
  2021-11-04 20:56       ` Warner Losh
  1 sibling, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 18:26 UTC (permalink / raw)
  To: Richard Henderson
  Cc: Stacey Son, QEMU Trivial, Kyle Evans, Michael Tokarev,
	Philippe Mathieu-Daude, QEMU Developers, Laurent Vivier

[-- Attachment #1: Type: text/plain, Size: 779 bytes --]

On Thu, Nov 4, 2021, 11:58 AM Warner Losh <imp@bsdimp.com> wrote:

>
>
> On Thu, Nov 4, 2021 at 11:49 AM Richard Henderson <
> richard.henderson@linaro.org> wrote:
>
>> On 11/4/21 10:05 AM, Warner Losh wrote:
>> > +typedef struct target_mcontext {
>> > +    uint32_t    __gregs[32];
>>
>> sys/arm/include/ucontext.h has
>>
>> #define _NGREG          17
>> typedef __greg_t        __gregset_t[_NGREG];
>>
>
There is already a TARGET__NGREG so I'll use that.

With s/32/17/ here,
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>
>
> Will do.
>
> And I'm going to add compile time asserts for the size of mcontext and
> ucontext in a future
> patch series. It won't test for layout, but will keep things like this
> from happening again by accident.
>
> Warner
>

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^ permalink raw reply	[flat|nested] 37+ messages in thread

* Re: [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext
  2021-11-04 14:05 ` [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext Warner Losh
@ 2021-11-04 18:41   ` Richard Henderson
  2021-11-04 23:59     ` Warner Losh
  0 siblings, 1 reply; 37+ messages in thread
From: Richard Henderson @ 2021-11-04 18:41 UTC (permalink / raw)
  To: Warner Losh, qemu-devel
  Cc: Stacey Son, qemu-trivial, Kyle Evans, Michael Tokarev,
	Laurent Vivier, Philippe Mathieu-Daude

On 11/4/21 10:05 AM, Warner Losh wrote:
> +    /*
> +     * Make sure T mode matches the PC's notion of thumb mode, although
> +     * FreeBSD lets the processor sort this out, so we may need remove
> +     * this check, or generate a signal...
> +     */
> +    if (!!(tswap32(gr[TARGET_REG_PC]) & 1) != !!(cpsr & CPSR_T)) {
> +        return -TARGET_EINVAL;
> +    }

I've had a read through the Arm ARM for "movs pc, lr", which is how swi_exit returns to 
userspace:

     CPSRWriteByInstr(SPSR[], '1111', TRUE);
     ...
     BranchWritePC(result);

So the CPSR gets written first, which sets the T bit, and thus the result of 
CurrentInstrSet(), then

BranchWritePC(bits(32) address)
   if CurrentInstrSet() == InstrSet_ARM then
     if ArchVersion() < 6 && address<1:0> != '00' then UNPREDICTABLE;
     BranchTo(address<31:2>:'00');
   ...
   else
     BranchTo(address<31:1>:'0');

> +    env->regs[15] = tswap32(gr[TARGET_REG_PC]);

So this should mask the low 1 or 2 bits depending on cpsr & CPSR_T.


r~


^ permalink raw reply	[flat|nested] 37+ messages in thread

* Re: [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals
  2021-11-04 17:58     ` Warner Losh
  2021-11-04 18:26       ` Warner Losh
@ 2021-11-04 20:56       ` Warner Losh
  1 sibling, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 20:56 UTC (permalink / raw)
  To: Richard Henderson
  Cc: Stacey Son, QEMU Trivial, Kyle Evans, Michael Tokarev,
	Philippe Mathieu-Daude, QEMU Developers, Laurent Vivier

[-- Attachment #1: Type: text/plain, Size: 1334 bytes --]

On Thu, Nov 4, 2021 at 11:58 AM Warner Losh <imp@bsdimp.com> wrote:

>
>
> On Thu, Nov 4, 2021 at 11:49 AM Richard Henderson <
> richard.henderson@linaro.org> wrote:
>
>> On 11/4/21 10:05 AM, Warner Losh wrote:
>> > +typedef struct target_mcontext {
>> > +    uint32_t    __gregs[32];
>>
>> sys/arm/include/ucontext.h has
>>
>> #define _NGREG          17
>> typedef __greg_t        __gregset_t[_NGREG];
>>
>> With s/32/17/ here,
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>
>
> Will do.
>
> And I'm going to add compile time asserts for the size of mcontext and
> ucontext in a future
> patch series. It won't test for layout, but will keep things like this
> from happening again by accident.
>

So I added a G_STATIC_ASSERT and found I used a host's pointer instead of
the target's pointer for the vfp stuff.
Easy enough to  fix... But it means using functions that aren't yet defined
when this is included, which means I'll
have to restructure things... shuffling the includes is likely out of the
question, so I'll have to create an arch/signal.c
to hold the now-inlined functions.

All because I wanted to catch errors like this before I made them again in
public... :)  So thanks for inspiring me
to do something that detected the error, but a good natured harumph at the
work I have to do now...

Warner

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^ permalink raw reply	[flat|nested] 37+ messages in thread

* Re: [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext
  2021-11-04 18:41   ` Richard Henderson
@ 2021-11-04 23:59     ` Warner Losh
  0 siblings, 0 replies; 37+ messages in thread
From: Warner Losh @ 2021-11-04 23:59 UTC (permalink / raw)
  To: Richard Henderson
  Cc: Stacey Son, QEMU Trivial, Kyle Evans, Michael Tokarev,
	Philippe Mathieu-Daude, QEMU Developers, Laurent Vivier

[-- Attachment #1: Type: text/plain, Size: 1227 bytes --]

On Thu, Nov 4, 2021 at 12:43 PM Richard Henderson <
richard.henderson@linaro.org> wrote:

> On 11/4/21 10:05 AM, Warner Losh wrote:
> > +    /*
> > +     * Make sure T mode matches the PC's notion of thumb mode, although
> > +     * FreeBSD lets the processor sort this out, so we may need remove
> > +     * this check, or generate a signal...
> > +     */
> > +    if (!!(tswap32(gr[TARGET_REG_PC]) & 1) != !!(cpsr & CPSR_T)) {
> > +        return -TARGET_EINVAL;
> > +    }
>
> I've had a read through the Arm ARM for "movs pc, lr", which is how
> swi_exit returns to
> userspace:
>
>      CPSRWriteByInstr(SPSR[], '1111', TRUE);
>      ...
>      BranchWritePC(result);
>
> So the CPSR gets written first, which sets the T bit, and thus the result
> of
> CurrentInstrSet(), then
>
> BranchWritePC(bits(32) address)
>    if CurrentInstrSet() == InstrSet_ARM then
>      if ArchVersion() < 6 && address<1:0> != '00' then UNPREDICTABLE;
>      BranchTo(address<31:2>:'00');
>    ...
>    else
>      BranchTo(address<31:1>:'0');
>
> > +    env->regs[15] = tswap32(gr[TARGET_REG_PC]);
>
> So this should mask the low 1 or 2 bits depending on cpsr & CPSR_T.
>

Will do. Thanks for all the patient explanations.

Warner


> r~
>

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^ permalink raw reply	[flat|nested] 37+ messages in thread

end of thread, other threads:[~2021-11-05  0:01 UTC | newest]

Thread overview: 37+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
2021-11-04 14:05 ` [PATCH v3 01/29] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards Warner Losh
2021-11-04 14:05 ` [PATCH v3 02/29] bsd-user/arm/target_syscall.h: Add copyright and update name Warner Losh
2021-11-04 14:05 ` [PATCH v3 03/29] bsd-user/arm/target_arch_cpu.c: Target specific TLS routines Warner Losh
2021-11-04 14:05 ` [PATCH v3 04/29] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions Warner Losh
2021-11-04 14:05 ` [PATCH v3 05/29] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs Warner Losh
2021-11-04 14:05 ` [PATCH v3 06/29] bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation Warner Losh
2021-11-04 14:05 ` [PATCH v3 07/29] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions Warner Losh
2021-11-04 17:44   ` Richard Henderson
2021-11-04 14:05 ` [PATCH v3 08/29] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions Warner Losh
2021-11-04 14:05 ` [PATCH v3 09/29] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch Warner Losh
2021-11-04 14:05 ` [PATCH v3 10/29] bsd-user/arm/target_arch_reg.h: Implement core dump register copying Warner Losh
2021-11-04 14:05 ` [PATCH v3 11/29] bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space Warner Losh
2021-11-04 14:05 ` [PATCH v3 12/29] bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm Warner Losh
2021-11-04 14:05 ` [PATCH v3 13/29] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread Warner Losh
2021-11-04 14:05 ` [PATCH v3 14/29] bsd-user/arm/target_arch_elf.h: arm defines for ELF Warner Losh
2021-11-04 14:05 ` [PATCH v3 15/29] bsd-user/arm/target_arch_elf.h: arm get hwcap Warner Losh
2021-11-04 14:05 ` [PATCH v3 16/29] bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl Warner Losh
2021-11-04 14:05 ` [PATCH v3 17/29] bsd-user/freebsd: Create common target_os_ucontext.h file Warner Losh
2021-11-04 14:05 ` [PATCH v3 18/29] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack Warner Losh
2021-11-04 14:05 ` [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals Warner Losh
2021-11-04 17:48   ` Richard Henderson
2021-11-04 17:58     ` Warner Losh
2021-11-04 18:26       ` Warner Losh
2021-11-04 20:56       ` Warner Losh
2021-11-04 14:05 ` [PATCH v3 20/29] bsd-user/arm/target_arch_signal.h: arm user context and trapframe " Warner Losh
2021-11-04 14:05 ` [PATCH v3 21/29] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args Warner Losh
2021-11-04 14:05 ` [PATCH v3 22/29] bsd-user/arm/target_arch_signal.h: arm get_mcontext Warner Losh
2021-11-04 14:05 ` [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext Warner Losh
2021-11-04 18:41   ` Richard Henderson
2021-11-04 23:59     ` Warner Losh
2021-11-04 14:05 ` [PATCH v3 24/29] bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn Warner Losh
2021-11-04 14:05 ` [PATCH v3 25/29] bsd-user: add arm target build Warner Losh
2021-11-04 14:05 ` [PATCH v3 26/29] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext Warner Losh
2021-11-04 14:05 ` [PATCH v3 27/29] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
2021-11-04 14:05 ` [PATCH v3 28/29] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h Warner Losh
2021-11-04 14:05 ` [PATCH v3 29/29] bsd-user/x86_64/target_arch_signal.h: " Warner Losh

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