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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 15/26] target/arm/sme: Introduce aarch64_set_svcr()
Date: Mon, 23 Jan 2023 13:35:42 +0000	[thread overview]
Message-ID: <20230123133553.2171158-16-peter.maydell@linaro.org> (raw)
In-Reply-To: <20230123133553.2171158-1-peter.maydell@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-4-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu.h              | 1 +
 linux-user/aarch64/cpu_loop.c | 2 +-
 linux-user/aarch64/signal.c   | 2 +-
 target/arm/helper.c           | 8 ++++++++
 target/arm/sme_helper.c       | 4 ++--
 5 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 1feb63b4d73..ef61849eb1d 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1123,6 +1123,7 @@ int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
 void aarch64_sve_change_el(CPUARMState *env, int old_el,
                            int new_el, bool el0_a64);
+void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask);
 void arm_reset_sve_state(CPUARMState *env);
 
 /*
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index 9875d609a91..d53742e10bb 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -93,8 +93,8 @@ void cpu_loop(CPUARMState *env)
              * On syscall, PSTATE.ZA is preserved, along with the ZA matrix.
              * PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState.
              */
+            aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
             if (FIELD_EX64(env->svcr, SVCR, SM)) {
-                env->svcr = FIELD_DP64(env->svcr, SVCR, SM, 0);
                 arm_rebuild_hflags(env);
                 arm_reset_sve_state(env);
             }
diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c
index 6a2c6e06d28..b6e4dcb494d 100644
--- a/linux-user/aarch64/signal.c
+++ b/linux-user/aarch64/signal.c
@@ -669,11 +669,11 @@ static void target_setup_frame(int usig, struct target_sigaction *ka,
      * Invoke the signal handler with both SM and ZA disabled.
      * When clearing SM, ResetSVEState, per SMSTOP.
      */
+    aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK);
     if (FIELD_EX64(env->svcr, SVCR, SM)) {
         arm_reset_sve_state(env);
     }
     if (env->svcr) {
-        env->svcr = 0;
         arm_rebuild_hflags(env);
     }
 
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 22ea8fbe368..24c069b8acf 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6725,11 +6725,19 @@ static CPAccessResult access_esm(CPUARMState *env, const ARMCPRegInfo *ri,
     return CP_ACCESS_OK;
 }
 
+void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
+{
+    uint64_t change = (env->svcr ^ new) & mask;
+
+    env->svcr ^= change;
+}
+
 static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
                        uint64_t value)
 {
     helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM));
     helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA));
+    aarch64_set_svcr(env, value, -1);
     arm_rebuild_hflags(env);
 }
 
diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c
index b5aefa3edaf..94dc084135d 100644
--- a/target/arm/sme_helper.c
+++ b/target/arm/sme_helper.c
@@ -43,7 +43,7 @@ void helper_set_pstate_sm(CPUARMState *env, uint32_t i)
     if (i == FIELD_EX64(env->svcr, SVCR, SM)) {
         return;
     }
-    env->svcr ^= R_SVCR_SM_MASK;
+    aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
     arm_reset_sve_state(env);
     arm_rebuild_hflags(env);
 }
@@ -53,7 +53,7 @@ void helper_set_pstate_za(CPUARMState *env, uint32_t i)
     if (i == FIELD_EX64(env->svcr, SVCR, ZA)) {
         return;
     }
-    env->svcr ^= R_SVCR_ZA_MASK;
+    aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK);
 
     /*
      * ResetSMEState.
-- 
2.34.1



  parent reply	other threads:[~2023-01-23 13:37 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-23 13:35 [PULL 00/26] target-arm queue Peter Maydell
2023-01-23 13:35 ` [PULL 01/26] target/arm: Widen cnthctl_el2 to uint64_t Peter Maydell
2023-01-23 13:35 ` [PULL 02/26] target/arm: Unify checking for M Main Extension in MRS/MSR Peter Maydell
2023-01-23 13:35 ` [PULL 03/26] hw/i2c/bitbang_i2c: Define TYPE_GPIO_I2C in public header Peter Maydell
2023-01-23 13:35 ` [PULL 04/26] hw/i2c/bitbang_i2c: Remove unused dummy MemoryRegion Peter Maydell
2023-01-23 13:35 ` [PULL 05/26] hw/i2c/bitbang_i2c: Change state calling bitbang_i2c_set_state() helper Peter Maydell
2023-01-23 13:35 ` [PULL 06/26] hw/i2c/bitbang_i2c: Trace state changes Peter Maydell
2023-01-23 13:35 ` [PULL 07/26] hw/i2c/bitbang_i2c: Convert DPRINTF() to trace events Peter Maydell
2023-01-23 13:35 ` [PULL 08/26] hw/i2c/versatile_i2c: Drop useless casts from void * to pointer Peter Maydell
2023-01-23 13:35 ` [PULL 09/26] hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState Peter Maydell
2023-01-23 13:35 ` [PULL 10/26] hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2C Peter Maydell
2023-01-23 13:35 ` [PULL 11/26] hw/i2c/versatile_i2c: Use ARM_SBCON_I2C() macro Peter Maydell
2023-01-23 13:35 ` [PULL 12/26] hw/i2c/versatile_i2c: Rename versatile_i2c -> arm_sbcon_i2c Peter Maydell
2023-01-23 13:35 ` [PULL 13/26] target/arm/sme: Reorg SME access handling in handle_msr_i() Peter Maydell
2023-01-23 13:35 ` [PULL 14/26] target/arm/sme: Rebuild hflags in set_pstate() helpers Peter Maydell
2023-01-23 13:35 ` Peter Maydell [this message]
2023-01-23 13:35 ` [PULL 16/26] target/arm/sme: Reset SVE state in aarch64_set_svcr() Peter Maydell
2023-01-23 13:35 ` [PULL 17/26] target/arm/sme: Reset ZA " Peter Maydell
2023-01-23 13:35 ` [PULL 18/26] target/arm/sme: Rebuild hflags " Peter Maydell
2023-01-23 13:35 ` [PULL 19/26] target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr() Peter Maydell
2023-01-23 13:35 ` [PULL 20/26] target/arm: Fix physical address resolution for MTE Peter Maydell
2023-01-23 13:35 ` [PULL 21/26] target/arm: Fix in_debug path in S1_ptw_translate Peter Maydell
2023-01-23 13:35 ` [PULL 22/26] target/arm: Don't set EXC_RETURN.ES if Security Extension not present Peter Maydell
2023-01-23 13:35 ` [PULL 23/26] target/arm: implement DBGCLAIM registers Peter Maydell
2023-01-23 13:35 ` [PULL 24/26] target/arm: provide stubs for more external debug registers Peter Maydell
2023-01-23 13:35 ` [PULL 25/26] target/arm: Reorg do_coproc_insn Peter Maydell
2023-01-23 13:35 ` [PULL 26/26] target/arm: Look up ARMCPRegInfo at runtime Peter Maydell
2023-01-23 15:17 ` [PULL 00/26] target-arm queue Peter Maydell

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