* [PATCH for 8.0 1/4] igb: Save more Tx states
2023-03-24 9:54 [PATCH for 8.0 0/4] igb fixes for 8.0 Akihiko Odaki
@ 2023-03-24 9:54 ` Akihiko Odaki
2023-03-24 9:54 ` [PATCH for 8.0 2/4] igb: Fix DMA requester specification for Tx packet Akihiko Odaki
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Akihiko Odaki @ 2023-03-24 9:54 UTC (permalink / raw)
Cc: qemu-devel, Dmitry Fleytman, Sriram Yagnaraman, Jason Wang,
Akihiko Odaki
The current implementation of igb uses only part of a advanced Tx
context descriptor and first data descriptor because it misses some
features and sniffs the trait of the packet instead of respecting the
packet type specified in the descriptor. However, we will certainly
need the entire Tx context descriptor when we update igb to respect
these ignored fields. Save the entire context descriptor and first
data descriptor except the buffer address to prepare for such a change.
This also introduces the distinction of contexts with different
indexes, which was not present in e1000e but in igb.
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech>
---
hw/net/igb.c | 26 +++++++++++++++++++-------
hw/net/igb_core.c | 39 +++++++++++++++++++--------------------
hw/net/igb_core.h | 8 +++-----
3 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/hw/net/igb.c b/hw/net/igb.c
index c6d753df87..51a7e9133e 100644
--- a/hw/net/igb.c
+++ b/hw/net/igb.c
@@ -502,16 +502,28 @@ static int igb_post_load(void *opaque, int version_id)
return igb_core_post_load(&s->core);
}
-static const VMStateDescription igb_vmstate_tx = {
- .name = "igb-tx",
+static const VMStateDescription igb_vmstate_tx_ctx = {
+ .name = "igb-tx-ctx",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_UINT16(vlan, struct igb_tx),
- VMSTATE_UINT16(mss, struct igb_tx),
- VMSTATE_BOOL(tse, struct igb_tx),
- VMSTATE_BOOL(ixsm, struct igb_tx),
- VMSTATE_BOOL(txsm, struct igb_tx),
+ VMSTATE_UINT32(vlan_macip_lens, struct e1000_adv_tx_context_desc),
+ VMSTATE_UINT32(seqnum_seed, struct e1000_adv_tx_context_desc),
+ VMSTATE_UINT32(type_tucmd_mlhl, struct e1000_adv_tx_context_desc),
+ VMSTATE_UINT32(mss_l4len_idx, struct e1000_adv_tx_context_desc),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static const VMStateDescription igb_vmstate_tx = {
+ .name = "igb-tx",
+ .version_id = 2,
+ .minimum_version_id = 2,
+ .fields = (VMStateField[]) {
+ VMSTATE_STRUCT_ARRAY(ctx, struct igb_tx, 2, 0, igb_vmstate_tx_ctx,
+ struct e1000_adv_tx_context_desc),
+ VMSTATE_UINT32(first_cmd_type_len, struct igb_tx),
+ VMSTATE_UINT32(first_olinfo_status, struct igb_tx),
VMSTATE_BOOL(first, struct igb_tx),
VMSTATE_BOOL(skip_cp, struct igb_tx),
VMSTATE_END_OF_LIST()
diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c
index a7c7bfdc75..7708333c2a 100644
--- a/hw/net/igb_core.c
+++ b/hw/net/igb_core.c
@@ -389,8 +389,10 @@ igb_rss_parse_packet(IGBCore *core, struct NetRxPkt *pkt, bool tx,
static bool
igb_setup_tx_offloads(IGBCore *core, struct igb_tx *tx)
{
- if (tx->tse) {
- if (!net_tx_pkt_build_vheader(tx->tx_pkt, true, true, tx->mss)) {
+ if (tx->first_cmd_type_len & E1000_ADVTXD_DCMD_TSE) {
+ uint32_t idx = (tx->first_olinfo_status >> 4) & 1;
+ uint32_t mss = tx->ctx[idx].mss_l4len_idx >> 16;
+ if (!net_tx_pkt_build_vheader(tx->tx_pkt, true, true, mss)) {
return false;
}
@@ -399,13 +401,13 @@ igb_setup_tx_offloads(IGBCore *core, struct igb_tx *tx)
return true;
}
- if (tx->txsm) {
+ if (tx->first_olinfo_status & E1000_ADVTXD_POTS_TXSM) {
if (!net_tx_pkt_build_vheader(tx->tx_pkt, false, true, 0)) {
return false;
}
}
- if (tx->ixsm) {
+ if (tx->first_olinfo_status & E1000_ADVTXD_POTS_IXSM) {
net_tx_pkt_update_ip_hdr_checksum(tx->tx_pkt);
}
@@ -527,7 +529,7 @@ igb_process_tx_desc(IGBCore *core,
{
struct e1000_adv_tx_context_desc *tx_ctx_desc;
uint32_t cmd_type_len;
- uint32_t olinfo_status;
+ uint32_t idx;
uint64_t buffer_addr;
uint16_t length;
@@ -538,20 +540,19 @@ igb_process_tx_desc(IGBCore *core,
E1000_ADVTXD_DTYP_DATA) {
/* advanced transmit data descriptor */
if (tx->first) {
- olinfo_status = le32_to_cpu(tx_desc->read.olinfo_status);
-
- tx->tse = !!(cmd_type_len & E1000_ADVTXD_DCMD_TSE);
- tx->ixsm = !!(olinfo_status & E1000_ADVTXD_POTS_IXSM);
- tx->txsm = !!(olinfo_status & E1000_ADVTXD_POTS_TXSM);
-
+ tx->first_cmd_type_len = cmd_type_len;
+ tx->first_olinfo_status = le32_to_cpu(tx_desc->read.olinfo_status);
tx->first = false;
}
} else if ((cmd_type_len & E1000_ADVTXD_DTYP_CTXT) ==
E1000_ADVTXD_DTYP_CTXT) {
/* advanced transmit context descriptor */
tx_ctx_desc = (struct e1000_adv_tx_context_desc *)tx_desc;
- tx->vlan = le32_to_cpu(tx_ctx_desc->vlan_macip_lens) >> 16;
- tx->mss = le32_to_cpu(tx_ctx_desc->mss_l4len_idx) >> 16;
+ idx = (le32_to_cpu(tx_ctx_desc->mss_l4len_idx) >> 4) & 1;
+ tx->ctx[idx].vlan_macip_lens = le32_to_cpu(tx_ctx_desc->vlan_macip_lens);
+ tx->ctx[idx].seqnum_seed = le32_to_cpu(tx_ctx_desc->seqnum_seed);
+ tx->ctx[idx].type_tucmd_mlhl = le32_to_cpu(tx_ctx_desc->type_tucmd_mlhl);
+ tx->ctx[idx].mss_l4len_idx = le32_to_cpu(tx_ctx_desc->mss_l4len_idx);
return;
} else {
/* unknown descriptor type */
@@ -575,8 +576,10 @@ igb_process_tx_desc(IGBCore *core,
if (cmd_type_len & E1000_TXD_CMD_EOP) {
if (!tx->skip_cp && net_tx_pkt_parse(tx->tx_pkt)) {
if (cmd_type_len & E1000_TXD_CMD_VLE) {
- net_tx_pkt_setup_vlan_header_ex(tx->tx_pkt, tx->vlan,
- core->mac[VET] & 0xffff);
+ idx = (tx->first_olinfo_status >> 4) & 1;
+ uint16_t vlan = tx->ctx[idx].vlan_macip_lens >> 16;
+ uint16_t vet = core->mac[VET] & 0xffff;
+ net_tx_pkt_setup_vlan_header_ex(tx->tx_pkt, vlan, vet);
}
if (igb_tx_pkt_send(core, tx, queue_index)) {
igb_on_tx_done_update_stats(core, tx->tx_pkt);
@@ -4024,11 +4027,7 @@ static void igb_reset(IGBCore *core, bool sw)
for (i = 0; i < ARRAY_SIZE(core->tx); i++) {
tx = &core->tx[i];
net_tx_pkt_reset(tx->tx_pkt);
- tx->vlan = 0;
- tx->mss = 0;
- tx->tse = false;
- tx->ixsm = false;
- tx->txsm = false;
+ memset(tx->ctx, 0, sizeof(tx->ctx));
tx->first = true;
tx->skip_cp = false;
}
diff --git a/hw/net/igb_core.h b/hw/net/igb_core.h
index 814c1e264b..8914e0b801 100644
--- a/hw/net/igb_core.h
+++ b/hw/net/igb_core.h
@@ -72,11 +72,9 @@ struct IGBCore {
QEMUTimer *autoneg_timer;
struct igb_tx {
- uint16_t vlan; /* VLAN Tag */
- uint16_t mss; /* Maximum Segment Size */
- bool tse; /* TCP/UDP Segmentation Enable */
- bool ixsm; /* Insert IP Checksum */
- bool txsm; /* Insert TCP/UDP Checksum */
+ struct e1000_adv_tx_context_desc ctx[2];
+ uint32_t first_cmd_type_len;
+ uint32_t first_olinfo_status;
bool first;
bool skip_cp;
--
2.39.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH for 8.0 2/4] igb: Fix DMA requester specification for Tx packet
2023-03-24 9:54 [PATCH for 8.0 0/4] igb fixes for 8.0 Akihiko Odaki
2023-03-24 9:54 ` [PATCH for 8.0 1/4] igb: Save more Tx states Akihiko Odaki
@ 2023-03-24 9:54 ` Akihiko Odaki
2023-03-24 9:54 ` [PATCH for 8.0 3/4] hw/net/net_tx_pkt: Ignore ECN bit Akihiko Odaki
2023-03-24 9:54 ` [PATCH for 8.0 4/4] hw/net/net_tx_pkt: Align l3_hdr Akihiko Odaki
3 siblings, 0 replies; 5+ messages in thread
From: Akihiko Odaki @ 2023-03-24 9:54 UTC (permalink / raw)
Cc: qemu-devel, Dmitry Fleytman, Sriram Yagnaraman, Jason Wang,
Akihiko Odaki
igb used to specify the PF as DMA requester when reading Tx packets.
This made Tx requests from VFs to be performed on the address space of
the PF, defeating the purpose of SR-IOV. Add some logic to change the
requester depending on the queue, which can be assigned to a VF.
Fixes: 3a977deebe ("Intrdocue igb device emulation")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
hw/net/e1000e_core.c | 6 +++---
hw/net/igb_core.c | 13 ++++++++-----
hw/net/net_tx_pkt.c | 3 ++-
hw/net/net_tx_pkt.h | 3 ++-
hw/net/vmxnet3.c | 4 ++--
5 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c
index 4d9679ca0b..c0c09b6965 100644
--- a/hw/net/e1000e_core.c
+++ b/hw/net/e1000e_core.c
@@ -765,7 +765,7 @@ e1000e_process_tx_desc(E1000ECore *core,
}
tx->skip_cp = false;
- net_tx_pkt_reset(tx->tx_pkt);
+ net_tx_pkt_reset(tx->tx_pkt, core->owner);
tx->sum_needed = 0;
tx->cptse = 0;
@@ -3447,7 +3447,7 @@ e1000e_core_pci_uninit(E1000ECore *core)
qemu_del_vm_change_state_handler(core->vmstate);
for (i = 0; i < E1000E_NUM_QUEUES; i++) {
- net_tx_pkt_reset(core->tx[i].tx_pkt);
+ net_tx_pkt_reset(core->tx[i].tx_pkt, core->owner);
net_tx_pkt_uninit(core->tx[i].tx_pkt);
}
@@ -3572,7 +3572,7 @@ static void e1000e_reset(E1000ECore *core, bool sw)
e1000x_reset_mac_addr(core->owner_nic, core->mac, core->permanent_mac);
for (i = 0; i < ARRAY_SIZE(core->tx); i++) {
- net_tx_pkt_reset(core->tx[i].tx_pkt);
+ net_tx_pkt_reset(core->tx[i].tx_pkt, core->owner);
memset(&core->tx[i].props, 0, sizeof(core->tx[i].props));
core->tx[i].skip_cp = false;
}
diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c
index 7708333c2a..78d30738e6 100644
--- a/hw/net/igb_core.c
+++ b/hw/net/igb_core.c
@@ -523,6 +523,7 @@ igb_on_tx_done_update_stats(IGBCore *core, struct NetTxPkt *tx_pkt)
static void
igb_process_tx_desc(IGBCore *core,
+ PCIDevice *dev,
struct igb_tx *tx,
union e1000_adv_tx_desc *tx_desc,
int queue_index)
@@ -588,7 +589,7 @@ igb_process_tx_desc(IGBCore *core,
tx->first = true;
tx->skip_cp = false;
- net_tx_pkt_reset(tx->tx_pkt);
+ net_tx_pkt_reset(tx->tx_pkt, dev);
}
}
@@ -803,6 +804,8 @@ igb_start_xmit(IGBCore *core, const IGB_TxRing *txr)
d = core->owner;
}
+ net_tx_pkt_reset(txr->tx->tx_pkt, d);
+
while (!igb_ring_empty(core, txi)) {
base = igb_ring_head_descr(core, txi);
@@ -811,7 +814,7 @@ igb_start_xmit(IGBCore *core, const IGB_TxRing *txr)
trace_e1000e_tx_descr((void *)(intptr_t)desc.read.buffer_addr,
desc.read.cmd_type_len, desc.wb.status);
- igb_process_tx_desc(core, txr->tx, &desc, txi->idx);
+ igb_process_tx_desc(core, d, txr->tx, &desc, txi->idx);
igb_ring_advance(core, txi, 1);
eic |= igb_txdesc_writeback(core, base, &desc, txi);
}
@@ -3828,7 +3831,7 @@ igb_core_pci_realize(IGBCore *core,
core->vmstate = qemu_add_vm_change_state_handler(igb_vm_state_change, core);
for (i = 0; i < IGB_NUM_QUEUES; i++) {
- net_tx_pkt_init(&core->tx[i].tx_pkt, core->owner, E1000E_MAX_TX_FRAGS);
+ net_tx_pkt_init(&core->tx[i].tx_pkt, NULL, E1000E_MAX_TX_FRAGS);
}
net_rx_pkt_init(&core->rx_pkt);
@@ -3853,7 +3856,7 @@ igb_core_pci_uninit(IGBCore *core)
qemu_del_vm_change_state_handler(core->vmstate);
for (i = 0; i < IGB_NUM_QUEUES; i++) {
- net_tx_pkt_reset(core->tx[i].tx_pkt);
+ net_tx_pkt_reset(core->tx[i].tx_pkt, NULL);
net_tx_pkt_uninit(core->tx[i].tx_pkt);
}
@@ -4026,7 +4029,7 @@ static void igb_reset(IGBCore *core, bool sw)
for (i = 0; i < ARRAY_SIZE(core->tx); i++) {
tx = &core->tx[i];
- net_tx_pkt_reset(tx->tx_pkt);
+ net_tx_pkt_reset(tx->tx_pkt, NULL);
memset(tx->ctx, 0, sizeof(tx->ctx));
tx->first = true;
tx->skip_cp = false;
diff --git a/hw/net/net_tx_pkt.c b/hw/net/net_tx_pkt.c
index 986a3adfe9..cb606cc84b 100644
--- a/hw/net/net_tx_pkt.c
+++ b/hw/net/net_tx_pkt.c
@@ -443,7 +443,7 @@ void net_tx_pkt_dump(struct NetTxPkt *pkt)
#endif
}
-void net_tx_pkt_reset(struct NetTxPkt *pkt)
+void net_tx_pkt_reset(struct NetTxPkt *pkt, PCIDevice *pci_dev)
{
int i;
@@ -467,6 +467,7 @@ void net_tx_pkt_reset(struct NetTxPkt *pkt)
pkt->raw[i].iov_len, DMA_DIRECTION_TO_DEVICE, 0);
}
}
+ pkt->pci_dev = pci_dev;
pkt->raw_frags = 0;
pkt->hdr_len = 0;
diff --git a/hw/net/net_tx_pkt.h b/hw/net/net_tx_pkt.h
index f57b4e034b..e5ce6f20bc 100644
--- a/hw/net/net_tx_pkt.h
+++ b/hw/net/net_tx_pkt.h
@@ -148,9 +148,10 @@ void net_tx_pkt_dump(struct NetTxPkt *pkt);
* reset tx packet private context (needed to be called between packets)
*
* @pkt: packet
+ * @dev: PCI device processing the next packet
*
*/
-void net_tx_pkt_reset(struct NetTxPkt *pkt);
+void net_tx_pkt_reset(struct NetTxPkt *pkt, PCIDevice *dev);
/**
* Send packet to qemu. handles sw offloads if vhdr is not supported.
diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
index 1068b80868..f7b874c139 100644
--- a/hw/net/vmxnet3.c
+++ b/hw/net/vmxnet3.c
@@ -678,7 +678,7 @@ static void vmxnet3_process_tx_queue(VMXNET3State *s, int qidx)
vmxnet3_complete_packet(s, qidx, txd_idx);
s->tx_sop = true;
s->skip_current_tx_pkt = false;
- net_tx_pkt_reset(s->tx_pkt);
+ net_tx_pkt_reset(s->tx_pkt, PCI_DEVICE(s));
}
}
}
@@ -1159,7 +1159,7 @@ static void vmxnet3_deactivate_device(VMXNET3State *s)
{
if (s->device_active) {
VMW_CBPRN("Deactivating vmxnet3...");
- net_tx_pkt_reset(s->tx_pkt);
+ net_tx_pkt_reset(s->tx_pkt, PCI_DEVICE(s));
net_tx_pkt_uninit(s->tx_pkt);
net_rx_pkt_uninit(s->rx_pkt);
s->device_active = false;
--
2.39.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH for 8.0 3/4] hw/net/net_tx_pkt: Ignore ECN bit
2023-03-24 9:54 [PATCH for 8.0 0/4] igb fixes for 8.0 Akihiko Odaki
2023-03-24 9:54 ` [PATCH for 8.0 1/4] igb: Save more Tx states Akihiko Odaki
2023-03-24 9:54 ` [PATCH for 8.0 2/4] igb: Fix DMA requester specification for Tx packet Akihiko Odaki
@ 2023-03-24 9:54 ` Akihiko Odaki
2023-03-24 9:54 ` [PATCH for 8.0 4/4] hw/net/net_tx_pkt: Align l3_hdr Akihiko Odaki
3 siblings, 0 replies; 5+ messages in thread
From: Akihiko Odaki @ 2023-03-24 9:54 UTC (permalink / raw)
Cc: qemu-devel, Dmitry Fleytman, Sriram Yagnaraman, Jason Wang,
Akihiko Odaki
No segmentation should be performed if gso type is
VIRTIO_NET_HDR_GSO_NONE even if ECN bit is set.
Fixes: e263cd49c7 ("Packet abstraction for VMWARE network devices")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1544
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
hw/net/net_tx_pkt.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/net/net_tx_pkt.c b/hw/net/net_tx_pkt.c
index cb606cc84b..efe80b1a80 100644
--- a/hw/net/net_tx_pkt.c
+++ b/hw/net/net_tx_pkt.c
@@ -796,11 +796,13 @@ bool net_tx_pkt_send_custom(struct NetTxPkt *pkt, bool offload,
{
assert(pkt);
+ uint8_t gso_type = pkt->virt_hdr.gso_type & ~VIRTIO_NET_HDR_GSO_ECN;
+
/*
* Since underlying infrastructure does not support IP datagrams longer
* than 64K we should drop such packets and don't even try to send
*/
- if (VIRTIO_NET_HDR_GSO_NONE != pkt->virt_hdr.gso_type) {
+ if (VIRTIO_NET_HDR_GSO_NONE != gso_type) {
if (pkt->payload_len >
ETH_MAX_IP_DGRAM_LEN -
pkt->vec[NET_TX_PKT_L3HDR_FRAG].iov_len) {
@@ -808,7 +810,7 @@ bool net_tx_pkt_send_custom(struct NetTxPkt *pkt, bool offload,
}
}
- if (offload || pkt->virt_hdr.gso_type == VIRTIO_NET_HDR_GSO_NONE) {
+ if (offload || gso_type == VIRTIO_NET_HDR_GSO_NONE) {
if (!offload && pkt->virt_hdr.flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) {
net_tx_pkt_do_sw_csum(pkt, &pkt->vec[NET_TX_PKT_L2HDR_FRAG],
pkt->payload_frags + NET_TX_PKT_PL_START_FRAG - 1,
--
2.39.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH for 8.0 4/4] hw/net/net_tx_pkt: Align l3_hdr
2023-03-24 9:54 [PATCH for 8.0 0/4] igb fixes for 8.0 Akihiko Odaki
` (2 preceding siblings ...)
2023-03-24 9:54 ` [PATCH for 8.0 3/4] hw/net/net_tx_pkt: Ignore ECN bit Akihiko Odaki
@ 2023-03-24 9:54 ` Akihiko Odaki
3 siblings, 0 replies; 5+ messages in thread
From: Akihiko Odaki @ 2023-03-24 9:54 UTC (permalink / raw)
Cc: qemu-devel, Dmitry Fleytman, Sriram Yagnaraman, Jason Wang,
Akihiko Odaki
Align the l3_hdr member of NetTxPkt by defining it as a union of
ip_header, ip6_header, and an array of octets.
Fixes: e263cd49c7 ("Packet abstraction for VMWARE network devices")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1544
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
hw/net/net_tx_pkt.c | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/hw/net/net_tx_pkt.c b/hw/net/net_tx_pkt.c
index efe80b1a80..8dc8568ba2 100644
--- a/hw/net/net_tx_pkt.c
+++ b/hw/net/net_tx_pkt.c
@@ -43,7 +43,11 @@ struct NetTxPkt {
struct iovec *vec;
uint8_t l2_hdr[ETH_MAX_L2_HDR_LEN];
- uint8_t l3_hdr[ETH_MAX_IP_DGRAM_LEN];
+ union {
+ struct ip_header ip;
+ struct ip6_header ip6;
+ uint8_t octets[ETH_MAX_IP_DGRAM_LEN];
+ } l3_hdr;
uint32_t payload_len;
@@ -89,16 +93,14 @@ void net_tx_pkt_update_ip_hdr_checksum(struct NetTxPkt *pkt)
{
uint16_t csum;
assert(pkt);
- struct ip_header *ip_hdr;
- ip_hdr = pkt->vec[NET_TX_PKT_L3HDR_FRAG].iov_base;
- ip_hdr->ip_len = cpu_to_be16(pkt->payload_len +
+ pkt->l3_hdr.ip.ip_len = cpu_to_be16(pkt->payload_len +
pkt->vec[NET_TX_PKT_L3HDR_FRAG].iov_len);
- ip_hdr->ip_sum = 0;
- csum = net_raw_checksum((uint8_t *)ip_hdr,
+ pkt->l3_hdr.ip.ip_sum = 0;
+ csum = net_raw_checksum(pkt->l3_hdr.octets,
pkt->vec[NET_TX_PKT_L3HDR_FRAG].iov_len);
- ip_hdr->ip_sum = cpu_to_be16(csum);
+ pkt->l3_hdr.ip.ip_sum = cpu_to_be16(csum);
}
void net_tx_pkt_update_ip_checksums(struct NetTxPkt *pkt)
@@ -832,15 +834,14 @@ void net_tx_pkt_fix_ip6_payload_len(struct NetTxPkt *pkt)
{
struct iovec *l2 = &pkt->vec[NET_TX_PKT_L2HDR_FRAG];
if (eth_get_l3_proto(l2, 1, l2->iov_len) == ETH_P_IPV6) {
- struct ip6_header *ip6 = (struct ip6_header *) pkt->l3_hdr;
/*
* TODO: if qemu would support >64K packets - add jumbo option check
* something like that:
* 'if (ip6->ip6_plen == 0 && !has_jumbo_option(ip6)) {'
*/
- if (ip6->ip6_plen == 0) {
+ if (pkt->l3_hdr.ip6.ip6_plen == 0) {
if (pkt->payload_len <= ETH_MAX_IP_DGRAM_LEN) {
- ip6->ip6_plen = htons(pkt->payload_len);
+ pkt->l3_hdr.ip6.ip6_plen = htons(pkt->payload_len);
}
/*
* TODO: if qemu would support >64K packets
--
2.39.2
^ permalink raw reply related [flat|nested] 5+ messages in thread