From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Frédéric Pétrot" <frederic.petrot@univ-grenoble-alpes.fr>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Fabien Portas <fabien.portas@grenoble-inp.org>
Subject: Re: [PATCH 4/8] target/riscv: 128-bit arithmetic and logic instructions
Date: Mon, 30 Aug 2021 20:32:53 -0700 [thread overview]
Message-ID: <27159959-b4fd-17b4-3f61-05848f2dbcc5@linaro.org> (raw)
In-Reply-To: <f9094de6-f36a-4da7-d5ef-9fa976ae4c18@amsat.org>
On 8/30/21 2:38 PM, Philippe Mathieu-Daudé wrote:
>> +#if defined(TARGET_RISCV128)
>> + if (is_128bit(ctx)) {
>
> Maybe this could allow the compiler eventually elide the
> code and avoid superfluous #ifdef'ry:
>
> if (TARGET_LONG_BITS >= 128) {
TCG does not support TARGET_LONG_BITS != {32,64}.
This will not work.
But is_128bit() should be sufficient in each opcode, because that itself should evaluate
to false if unsupported.
r~
next prev parent reply other threads:[~2021-08-31 3:35 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-30 17:16 [PATCH 1/8] target/riscv: Settings for 128-bit extension support Frédéric Pétrot
2021-08-30 17:16 ` [PATCH 2/8] target/riscv: 128-bit registers creation and access Frédéric Pétrot
2021-08-30 21:34 ` Philippe Mathieu-Daudé
2021-08-30 17:16 ` [PATCH 3/8] target/riscv: Addition of 128-bit ldu, lq and sq instructions Frédéric Pétrot
2021-08-30 21:35 ` Philippe Mathieu-Daudé
2021-08-31 2:24 ` Richard Henderson
2021-08-31 16:00 ` Frédéric Pétrot
2021-08-31 2:30 ` Richard Henderson
2021-08-30 17:16 ` [PATCH 4/8] target/riscv: 128-bit arithmetic and logic instructions Frédéric Pétrot
2021-08-30 21:38 ` Philippe Mathieu-Daudé
2021-08-30 21:40 ` Philippe Mathieu-Daudé
2021-08-31 15:57 ` Frédéric Pétrot
2021-08-31 3:32 ` Richard Henderson [this message]
2021-08-31 3:30 ` Richard Henderson
2021-08-30 17:16 ` [PATCH 5/8] target/riscv: 128-bit multiply and divide Frédéric Pétrot
2021-08-30 17:16 ` [PATCH 6/8] target/riscv: Support of compiler's 128-bit integer types Frédéric Pétrot
2021-08-31 3:38 ` Richard Henderson
2021-08-30 17:16 ` [PATCH 7/8] target/riscv: 128-bit support for some csrs Frédéric Pétrot
2021-08-31 3:43 ` Richard Henderson
2021-08-30 17:16 ` [PATCH 8/8] target/riscv: Support for 128-bit satp Frédéric Pétrot
2021-08-31 3:13 ` [PATCH 1/8] target/riscv: Settings for 128-bit extension support Alistair Francis
2021-08-31 16:20 ` Frédéric Pétrot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=27159959-b4fd-17b4-3f61-05848f2dbcc5@linaro.org \
--to=richard.henderson@linaro.org \
--cc=alistair.francis@wdc.com \
--cc=bin.meng@windriver.com \
--cc=f4bug@amsat.org \
--cc=fabien.portas@grenoble-inp.org \
--cc=frederic.petrot@univ-grenoble-alpes.fr \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).