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From: Richard Henderson <richard.henderson@linaro.org>
To: frank.chang@sifive.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [PATCH v2] fpu/softfloat: set invalid excp flag for RISC-V muladd instructions
Date: Wed, 21 Apr 2021 18:06:27 -0700	[thread overview]
Message-ID: <3b6b4967-d9bc-ec4f-4676-cb9df2b4930a@linaro.org> (raw)
In-Reply-To: <20210420013150.21992-1-frank.chang@sifive.com>

On 4/19/21 6:31 PM, frank.chang@sifive.com wrote:
> +    return 3; /* deafult NaN */

Late notice of spelling error: default.

r~


  parent reply	other threads:[~2021-04-22  1:07 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-20  1:31 [PATCH v2] fpu/softfloat: set invalid excp flag for RISC-V muladd instructions frank.chang
2021-04-20 14:17 ` Richard Henderson
2021-04-22  0:05   ` Alistair Francis
2021-04-22  1:06 ` Richard Henderson [this message]
2021-04-22  1:42   ` Alistair Francis

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