* [PATCH] disas/riscv: Fix incorrect disassembly for `imm20` operand.
@ 2020-07-07 15:43 Wei Wu
2020-07-10 18:30 ` Richard Henderson
0 siblings, 1 reply; 2+ messages in thread
From: Wei Wu @ 2020-07-07 15:43 UTC (permalink / raw)
To: qemu-devel; +Cc: Alistair.Francis, palmer, Wei Wu
`imm20` operand type is used in LUI/AUIPC and other instructions.
The value should not be left shifted 12bits for disassembly output.
Signed-off-by: Wei Wu <lazyparser@gmail.com>
---
disas/riscv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index 278d9be924..a2b6472bd8 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -2083,7 +2083,7 @@ static int32_t operand_imm12(rv_inst inst)
static int32_t operand_imm20(rv_inst inst)
{
- return (((int64_t)inst << 32) >> 44) << 12;
+ return ((int64_t)inst << 32) >> 44;
}
static int32_t operand_jimm20(rv_inst inst)
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] disas/riscv: Fix incorrect disassembly for `imm20` operand.
2020-07-07 15:43 [PATCH] disas/riscv: Fix incorrect disassembly for `imm20` operand Wei Wu
@ 2020-07-10 18:30 ` Richard Henderson
0 siblings, 0 replies; 2+ messages in thread
From: Richard Henderson @ 2020-07-10 18:30 UTC (permalink / raw)
To: Wei Wu, qemu-devel; +Cc: palmer, Alistair.Francis
On 7/7/20 8:43 AM, Wei Wu wrote:
> static int32_t operand_imm20(rv_inst inst)
> {
> - return (((int64_t)inst << 32) >> 44) << 12;
> + return ((int64_t)inst << 32) >> 44;
> }
There's no point in casting to int64_t, for one. But it would be better to use
sextract32(inst, 12, 20).
r~
^ permalink raw reply [flat|nested] 2+ messages in thread
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2020-07-10 18:30 ` Richard Henderson
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