* [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM
@ 2013-05-22 5:33 Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 01/20] i440fx: remove unused parameter i440fx_state of i440fx_init Hu Tao
` (19 more replies)
0 siblings, 20 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
This is a re-do of original series posted by Anthony Liguori at:
http://lists.gnu.org/archive/html/qemu-devel/2012-01/msg03501.html
I post this series because:
1. there are no news from Anthony since the first version for more than a year
2. Li Wanfeng di some work on the refactor last year, but no news for half a year
3. memory hotplug requires i440fx pmc refactor if I'm getting it right
(http://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02693.html)
Problems:
1. isapc is broken
2. too many code duplication between piix and ich
3. others
TODO:
1. make a proper ISA model
2. a base class PCSuperIO that piix and ich can inherit from. isapc may also
be modelled with PCSuperIO. But there was argument on this.
(http://lists.gnu.org/archive/html/qemu-devel/2012-01/msg03626.html)
3. a base class MemoryController that i440fx-pmc and q35-mch can inherit from
4. others
Hu Tao (20):
i440fx: remove unused parameter i440fx_state of i440fx_init.
i440fx: rename i440FX to i440FX-PMC
i440fx: rename i440FX-pcihost to i440FX
i440fx: prepare for composition
piix3: make PIIX3-xen a subclass of PIIX3
piix3: prepare for composition
piix3: create piix3 through composition.
rtc: remove rtc_set_date
ich9: function rename
piix3,ich9: create the HPET through composition
add rtc_set_irq
piix3,ich9: create the RTC through composition
piix3,ich9: create pit through composition
piix3,ich9: create pc speaker through composition
i440fx pmc: create pmc through comosition
i440fx-pmc: calculate PCI memory hole directly
i440fx-pmc: create pci address space
q35-mch: create pci address space
i440fx-pmc: move ram initialization into i440fx-pmc
q35-mch: move ram initialization into q35-mch
hw/i386/pc.c | 71 +------
hw/i386/pc_piix.c | 50 ++---
hw/i386/pc_q35.c | 35 ++--
hw/isa/lpc_ich9.c | 87 +++++++-
hw/pci-host/piix.c | 447 ++++++++++++++++++++++++++++-------------
hw/pci-host/q35.c | 48 ++++-
hw/timer/hpet.c | 2 +-
hw/timer/mc146818rtc.c | 8 +-
include/hw/i386/ich9.h | 5 +
include/hw/i386/pc.h | 20 +-
include/hw/pci-host/q35.h | 10 +-
include/hw/timer/hpet.h | 3 +
include/hw/timer/i8254.h | 3 +
include/hw/timer/mc146818rtc.h | 2 +-
14 files changed, 504 insertions(+), 287 deletions(-)
--
1.8.2.3
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 01/20] i440fx: remove unused parameter i440fx_state of i440fx_init.
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 02/20] i440fx: rename i440FX to i440FX-PMC Hu Tao
` (18 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc_piix.c | 4 +---
hw/pci-host/piix.c | 10 ++++------
include/hw/i386/pc.h | 2 +-
3 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 43ab480..8c9ea6f 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -74,7 +74,6 @@ static void pc_init1(MemoryRegion *system_memory,
ram_addr_t below_4g_mem_size, above_4g_mem_size;
PCIBus *pci_bus;
ISABus *isa_bus;
- PCII440FXState *i440fx_state;
int piix3_devfn = -1;
qemu_irq *cpu_irq;
qemu_irq *gsi;
@@ -137,7 +136,7 @@ static void pc_init1(MemoryRegion *system_memory,
}
if (pci_enabled) {
- pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
+ pci_bus = i440fx_init(&piix3_devfn, &isa_bus, gsi,
system_memory, system_io, ram_size,
below_4g_mem_size,
0x100000000ULL - below_4g_mem_size,
@@ -148,7 +147,6 @@ static void pc_init1(MemoryRegion *system_memory,
pci_memory, ram_memory);
} else {
pci_bus = NULL;
- i440fx_state = NULL;
isa_bus = isa_bus_new(NULL, system_io);
no_hpet = 1;
}
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index f9e68c3..0176ae9 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -225,7 +225,6 @@ static int i440fx_initfn(PCIDevice *dev)
}
static PCIBus *i440fx_common_init(const char *device_name,
- PCII440FXState **pi440fx_state,
int *piix3_devfn,
ISABus **isa_bus, qemu_irq *pic,
MemoryRegion *address_space_mem,
@@ -255,8 +254,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
qdev_init_nofail(dev);
d = pci_create_simple(b, 0, device_name);
- *pi440fx_state = I440FX_PCI_DEVICE(d);
- f = *pi440fx_state;
+ f = I440FX_PCI_DEVICE(d);
f->system_memory = address_space_mem;
f->pci_address_space = pci_address_space;
f->ram_memory = ram_memory;
@@ -307,14 +305,14 @@ static PCIBus *i440fx_common_init(const char *device_name,
ram_size = ram_size / 8 / 1024 / 1024;
if (ram_size > 255)
ram_size = 255;
- (*pi440fx_state)->dev.config[0x57]=ram_size;
+ f->dev.config[0x57] = ram_size;
i440fx_update_memory_mappings(f);
return b;
}
-PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn,
+PCIBus *i440fx_init(int *piix3_devfn,
ISABus **isa_bus, qemu_irq *pic,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
@@ -328,7 +326,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn,
{
PCIBus *b;
- b = i440fx_common_init(TYPE_I440FX_PCI_DEVICE, pi440fx_state,
+ b = i440fx_common_init(TYPE_I440FX_PCI_DEVICE,
piix3_devfn, isa_bus, pic,
address_space_mem, address_space_io, ram_size,
pci_hole_start, pci_hole_size,
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 2bd7090..e2f6717 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -122,7 +122,7 @@ extern int no_hpet;
struct PCII440FXState;
typedef struct PCII440FXState PCII440FXState;
-PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
+PCIBus *i440fx_init(int *piix_devfn,
ISABus **isa_bus, qemu_irq *pic,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 02/20] i440fx: rename i440FX to i440FX-PMC
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 01/20] i440fx: remove unused parameter i440fx_state of i440fx_init Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 03/20] i440fx: rename i440FX-pcihost to i440FX Hu Tao
` (17 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/pci-host/piix.c | 60 ++++++++++++++++++++++++++--------------------------
include/hw/i386/pc.h | 6 +++---
2 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 0176ae9..fc955bd 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -82,11 +82,11 @@ typedef struct PIIX3State {
MemoryRegion rcr_mem;
} PIIX3State;
-#define TYPE_I440FX_PCI_DEVICE "i440FX"
-#define I440FX_PCI_DEVICE(obj) \
- OBJECT_CHECK(PCII440FXState, (obj), TYPE_I440FX_PCI_DEVICE)
+#define TYPE_I440FX_PMC_DEVICE "i440FX-PMC"
+#define I440FX_PMC_DEVICE(obj) \
+ OBJECT_CHECK(I440FXPMCState, (obj), TYPE_I440FX_PMC_DEVICE)
-struct PCII440FXState {
+struct I440FXPMCState {
PCIDevice dev;
MemoryRegion *system_memory;
MemoryRegion *pci_address_space;
@@ -118,7 +118,7 @@ static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx)
return (pci_intx + slot_addend) & 3;
}
-static void i440fx_update_memory_mappings(PCII440FXState *d)
+static void i440fx_pmc_update_memory_mappings(I440FXPMCState *d)
{
int i;
@@ -133,7 +133,7 @@ static void i440fx_update_memory_mappings(PCII440FXState *d)
static void i440fx_set_smm(int val, void *arg)
{
- PCII440FXState *d = arg;
+ I440FXPMCState *d = arg;
memory_region_transaction_begin();
smram_set_smm(&d->smm_enabled, val, d->dev.config[I440FX_SMRAM],
@@ -145,25 +145,25 @@ static void i440fx_set_smm(int val, void *arg)
static void i440fx_write_config(PCIDevice *dev,
uint32_t address, uint32_t val, int len)
{
- PCII440FXState *d = I440FX_PCI_DEVICE(dev);
+ I440FXPMCState *d = I440FX_PMC_DEVICE(dev);
/* XXX: implement SMRAM.D_LOCK */
pci_default_write_config(dev, address, val, len);
if (ranges_overlap(address, len, I440FX_PAM, I440FX_PAM_SIZE) ||
range_covers_byte(address, len, I440FX_SMRAM)) {
- i440fx_update_memory_mappings(d);
+ i440fx_pmc_update_memory_mappings(d);
}
}
static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id)
{
- PCII440FXState *d = opaque;
+ I440FXPMCState *d = opaque;
int ret, i;
ret = pci_device_load(&d->dev, f);
if (ret < 0)
return ret;
- i440fx_update_memory_mappings(d);
+ i440fx_pmc_update_memory_mappings(d);
qemu_get_8s(f, &d->smm_enabled);
if (version_id == 2) {
@@ -177,22 +177,22 @@ static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id)
static int i440fx_post_load(void *opaque, int version_id)
{
- PCII440FXState *d = opaque;
+ I440FXPMCState *d = opaque;
- i440fx_update_memory_mappings(d);
+ i440fx_pmc_update_memory_mappings(d);
return 0;
}
-static const VMStateDescription vmstate_i440fx = {
- .name = "I440FX",
+static const VMStateDescription vmstate_i440fx_pmc = {
+ .name = TYPE_I440FX_PMC_DEVICE,
.version_id = 3,
.minimum_version_id = 3,
.minimum_version_id_old = 1,
.load_state_old = i440fx_load_old,
.post_load = i440fx_post_load,
.fields = (VMStateField []) {
- VMSTATE_PCI_DEVICE(dev, PCII440FXState),
- VMSTATE_UINT8(smm_enabled, PCII440FXState),
+ VMSTATE_PCI_DEVICE(dev, I440FXPMCState),
+ VMSTATE_UINT8(smm_enabled, I440FXPMCState),
VMSTATE_END_OF_LIST()
}
};
@@ -214,9 +214,9 @@ static int i440fx_pcihost_initfn(SysBusDevice *dev)
return 0;
}
-static int i440fx_initfn(PCIDevice *dev)
+static int i440fx_pmc_initfn(PCIDevice *dev)
{
- PCII440FXState *d = I440FX_PCI_DEVICE(dev);
+ I440FXPMCState *d = I440FX_PMC_DEVICE(dev);
d->dev.config[I440FX_SMRAM] = 0x02;
@@ -242,7 +242,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
PCIDevice *d;
PCIHostState *s;
PIIX3State *piix3;
- PCII440FXState *f;
+ I440FXPMCState *f;
unsigned i;
dev = qdev_create(NULL, "i440FX-pcihost");
@@ -254,7 +254,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
qdev_init_nofail(dev);
d = pci_create_simple(b, 0, device_name);
- f = I440FX_PCI_DEVICE(d);
+ f = I440FX_PMC_DEVICE(d);
f->system_memory = address_space_mem;
f->pci_address_space = pci_address_space;
f->ram_memory = ram_memory;
@@ -307,7 +307,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
ram_size = 255;
f->dev.config[0x57] = ram_size;
- i440fx_update_memory_mappings(f);
+ i440fx_pmc_update_memory_mappings(f);
return b;
}
@@ -326,7 +326,7 @@ PCIBus *i440fx_init(int *piix3_devfn,
{
PCIBus *b;
- b = i440fx_common_init(TYPE_I440FX_PCI_DEVICE,
+ b = i440fx_common_init(TYPE_I440FX_PMC_DEVICE,
piix3_devfn, isa_bus, pic,
address_space_mem, address_space_io, ram_size,
pci_hole_start, pci_hole_size,
@@ -603,13 +603,13 @@ static const TypeInfo piix3_xen_info = {
.class_init = piix3_xen_class_init,
};
-static void i440fx_class_init(ObjectClass *klass, void *data)
+static void i440fx_pmc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->no_hotplug = 1;
- k->init = i440fx_initfn;
+ k->init = i440fx_pmc_initfn;
k->config_write = i440fx_write_config;
k->vendor_id = PCI_VENDOR_ID_INTEL;
k->device_id = PCI_DEVICE_ID_INTEL_82441;
@@ -617,14 +617,14 @@ static void i440fx_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_BRIDGE_HOST;
dc->desc = "Host bridge";
dc->no_user = 1;
- dc->vmsd = &vmstate_i440fx;
+ dc->vmsd = &vmstate_i440fx_pmc;
}
-static const TypeInfo i440fx_info = {
- .name = TYPE_I440FX_PCI_DEVICE,
+static const TypeInfo i440fx_pmc_info = {
+ .name = TYPE_I440FX_PMC_DEVICE,
.parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PCII440FXState),
- .class_init = i440fx_class_init,
+ .instance_size = sizeof(I440FXPMCState),
+ .class_init = i440fx_pmc_class_init,
};
static void i440fx_pcihost_class_init(ObjectClass *klass, void *data)
@@ -646,7 +646,7 @@ static const TypeInfo i440fx_pcihost_info = {
static void i440fx_register_types(void)
{
- type_register_static(&i440fx_info);
+ type_register_static(&i440fx_pmc_info);
type_register_static(&piix3_info);
type_register_static(&piix3_xen_info);
type_register_static(&i440fx_pcihost_info);
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index e2f6717..edd4618 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -118,9 +118,9 @@ void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
/* hpet.c */
extern int no_hpet;
-/* piix_pci.c */
-struct PCII440FXState;
-typedef struct PCII440FXState PCII440FXState;
+/* piix.c */
+struct I440FXPMCState;
+typedef struct I440FXPMCState I440FXPMCState;
PCIBus *i440fx_init(int *piix_devfn,
ISABus **isa_bus, qemu_irq *pic,
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 03/20] i440fx: rename i440FX-pcihost to i440FX
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 01/20] i440fx: remove unused parameter i440fx_state of i440fx_init Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 02/20] i440fx: rename i440FX to i440FX-PMC Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 04/20] i440fx: prepare for composition Hu Tao
` (16 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/pci-host/piix.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index fc955bd..9c482ec 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -38,6 +38,10 @@
* http://download.intel.com/design/chipsets/datashts/29054901.pdf
*/
+#define TYPE_I440FX_DEVICE "i440FX"
+#define I440FX_DEVICE(obj) \
+ OBJECT_CHECK(I440FXState, (obj), TYPE_I440FX_DEVICE)
+
typedef struct I440FXState {
PCIHostState parent_obj;
} I440FXState;
@@ -197,7 +201,7 @@ static const VMStateDescription vmstate_i440fx_pmc = {
}
};
-static int i440fx_pcihost_initfn(SysBusDevice *dev)
+static int i440fx_initfn(SysBusDevice *dev)
{
PCIHostState *s = PCI_HOST_BRIDGE(dev);
@@ -245,7 +249,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
I440FXPMCState *f;
unsigned i;
- dev = qdev_create(NULL, "i440FX-pcihost");
+ dev = qdev_create(NULL, TYPE_I440FX_DEVICE);
s = PCI_HOST_BRIDGE(dev);
b = pci_bus_new(dev, NULL, pci_address_space,
address_space_io, 0, TYPE_PCI_BUS);
@@ -627,21 +631,21 @@ static const TypeInfo i440fx_pmc_info = {
.class_init = i440fx_pmc_class_init,
};
-static void i440fx_pcihost_class_init(ObjectClass *klass, void *data)
+static void i440fx_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = i440fx_pcihost_initfn;
+ k->init = i440fx_initfn;
dc->fw_name = "pci";
dc->no_user = 1;
}
-static const TypeInfo i440fx_pcihost_info = {
- .name = "i440FX-pcihost",
+static const TypeInfo i440fx_info = {
+ .name = TYPE_I440FX_DEVICE,
.parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(I440FXState),
- .class_init = i440fx_pcihost_class_init,
+ .class_init = i440fx_class_init,
};
static void i440fx_register_types(void)
@@ -649,7 +653,7 @@ static void i440fx_register_types(void)
type_register_static(&i440fx_pmc_info);
type_register_static(&piix3_info);
type_register_static(&piix3_xen_info);
- type_register_static(&i440fx_pcihost_info);
+ type_register_static(&i440fx_info);
}
type_init(i440fx_register_types)
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 04/20] i440fx: prepare for composition
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (2 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 03/20] i440fx: rename i440FX-pcihost to i440FX Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 05/20] piix3: make PIIX3-xen a subclass of PIIX3 Hu Tao
` (15 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/pci-host/piix.c | 49 +++++++++++++++++++++++++++++++------------------
1 file changed, 31 insertions(+), 18 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 9c482ec..1c5c761 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -44,6 +44,8 @@
typedef struct I440FXState {
PCIHostState parent_obj;
+ MemoryRegion *address_space_io;
+ MemoryRegion *pci_address_space;
} I440FXState;
#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */
@@ -201,9 +203,13 @@ static const VMStateDescription vmstate_i440fx_pmc = {
}
};
-static int i440fx_initfn(SysBusDevice *dev)
+static int i440fx_realize(SysBusDevice *dev)
{
PCIHostState *s = PCI_HOST_BRIDGE(dev);
+ I440FXState *f = I440FX_DEVICE(dev);
+
+ s->bus = pci_bus_new(DEVICE(f), NULL, f->pci_address_space,
+ f->address_space_io, 0, TYPE_PCI_BUS);
memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s,
"pci-conf-idx", 4);
@@ -218,6 +224,10 @@ static int i440fx_initfn(SysBusDevice *dev)
return 0;
}
+static void i440fx_initfn(Object *obj)
+{
+}
+
static int i440fx_pmc_initfn(PCIDevice *dev)
{
I440FXPMCState *d = I440FX_PMC_DEVICE(dev);
@@ -241,23 +251,25 @@ static PCIBus *i440fx_common_init(const char *device_name,
MemoryRegion *pci_address_space,
MemoryRegion *ram_memory)
{
- DeviceState *dev;
- PCIBus *b;
PCIDevice *d;
PCIHostState *s;
PIIX3State *piix3;
I440FXPMCState *f;
+ I440FXState *i440fx;
unsigned i;
- dev = qdev_create(NULL, TYPE_I440FX_DEVICE);
- s = PCI_HOST_BRIDGE(dev);
- b = pci_bus_new(dev, NULL, pci_address_space,
- address_space_io, 0, TYPE_PCI_BUS);
- s->bus = b;
- object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL);
- qdev_init_nofail(dev);
+ i440fx = I440FX_DEVICE(object_new(TYPE_I440FX_DEVICE));
+ s = PCI_HOST_BRIDGE(i440fx);
+
+ i440fx->address_space_io = address_space_io;
+ i440fx->pci_address_space = pci_address_space;
- d = pci_create_simple(b, 0, device_name);
+ object_property_add_child(qdev_get_machine(), "i440fx",
+ OBJECT(i440fx), NULL);
+ qdev_set_parent_bus(DEVICE(i440fx), sysbus_get_default());
+ qdev_init_nofail(DEVICE(i440fx));
+
+ d = pci_create_simple(s->bus, 0, device_name);
f = I440FX_PMC_DEVICE(d);
f->system_memory = address_space_mem;
f->pci_address_space = pci_address_space;
@@ -291,15 +303,15 @@ static PCIBus *i440fx_common_init(const char *device_name,
* These additional routes can be discovered through ACPI. */
if (xen_enabled()) {
piix3 = DO_UPCAST(PIIX3State, dev,
- pci_create_simple_multifunction(b, -1, true, "PIIX3-xen"));
- pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq,
+ pci_create_simple_multifunction(s->bus, -1, true, "PIIX3-xen"));
+ pci_bus_irqs(s->bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
piix3, XEN_PIIX_NUM_PIRQS);
} else {
piix3 = DO_UPCAST(PIIX3State, dev,
- pci_create_simple_multifunction(b, -1, true, "PIIX3"));
- pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3,
+ pci_create_simple_multifunction(s->bus, -1, true, "PIIX3"));
+ pci_bus_irqs(s->bus, piix3_set_irq, pci_slot_get_pirq, piix3,
PIIX_NUM_PIRQS);
- pci_bus_set_route_irq_fn(b, piix3_route_intx_pin_to_irq);
+ pci_bus_set_route_irq_fn(s->bus, piix3_route_intx_pin_to_irq);
}
piix3->pic = pic;
*isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
@@ -313,7 +325,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
i440fx_pmc_update_memory_mappings(f);
- return b;
+ return s->bus;
}
PCIBus *i440fx_init(int *piix3_devfn,
@@ -636,7 +648,7 @@ static void i440fx_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = i440fx_initfn;
+ k->init = i440fx_realize;
dc->fw_name = "pci";
dc->no_user = 1;
}
@@ -645,6 +657,7 @@ static const TypeInfo i440fx_info = {
.name = TYPE_I440FX_DEVICE,
.parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(I440FXState),
+ .instance_init = i440fx_initfn,
.class_init = i440fx_class_init,
};
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 05/20] piix3: make PIIX3-xen a subclass of PIIX3
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (3 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 04/20] i440fx: prepare for composition Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 06/20] piix3: prepare for composition Hu Tao
` (14 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/pci-host/piix.c | 12 +-----------
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 1c5c761..f96835b 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -597,24 +597,14 @@ static const TypeInfo piix3_info = {
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
- DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- dc->desc = "ISA bridge";
- dc->vmsd = &vmstate_piix3;
- dc->no_user = 1;
- k->no_hotplug = 1;
- k->init = piix3_initfn;
k->config_write = piix3_write_config_xen;
- k->vendor_id = PCI_VENDOR_ID_INTEL;
- /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
- k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
- k->class_id = PCI_CLASS_BRIDGE_ISA;
};
static const TypeInfo piix3_xen_info = {
.name = "PIIX3-xen",
- .parent = TYPE_PCI_DEVICE,
+ .parent = "PIIX3",
.instance_size = sizeof(PIIX3State),
.class_init = piix3_xen_class_init,
};
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 06/20] piix3: prepare for composition
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (4 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 05/20] piix3: make PIIX3-xen a subclass of PIIX3 Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 07/20] piix3: create piix3 through composition Hu Tao
` (13 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/pci-host/piix.c | 32 ++++++++++++++++++++------------
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index f96835b..021da6e 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -59,6 +59,9 @@ typedef struct I440FXState {
*/
#define RCR_IOPORT 0xcf9
+#define TYPE_PIIX3 "PIIX3"
+#define PIIX3(obj) OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3)
+
typedef struct PIIX3State {
PCIDevice dev;
@@ -434,9 +437,9 @@ static void piix3_write_config_xen(PCIDevice *dev,
piix3_write_config(dev, address, val, len);
}
-static void piix3_reset(void *opaque)
+static void piix3_reset(DeviceState *dev)
{
- PIIX3State *d = opaque;
+ PIIX3State *d = PIIX3(dev);
uint8_t *pci_conf = d->dev.config;
pci_conf[0x04] = 0x07; /* master, memory and I/O */
@@ -511,7 +514,7 @@ static const VMStateDescription vmstate_piix3_rcr = {
};
static const VMStateDescription vmstate_piix3 = {
- .name = "PIIX3",
+ .name = TYPE_PIIX3,
.version_id = 3,
.minimum_version_id = 2,
.minimum_version_id_old = 2,
@@ -557,20 +560,23 @@ static const MemoryRegionOps rcr_ops = {
.endianness = DEVICE_LITTLE_ENDIAN
};
-static int piix3_initfn(PCIDevice *dev)
+static int piix3_realize(PCIDevice *dev)
{
- PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev);
+ PIIX3State *s = PIIX3(dev);
- isa_bus_new(DEVICE(d), pci_address_space_io(dev));
+ isa_bus_new(DEVICE(s), pci_address_space_io(dev));
- memory_region_init_io(&d->rcr_mem, &rcr_ops, d, "piix3-reset-control", 1);
+ memory_region_init_io(&s->rcr_mem, &rcr_ops, s, "piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
- &d->rcr_mem, 1);
+ &s->rcr_mem, 1);
- qemu_register_reset(piix3_reset, d);
return 0;
}
+static void piix3_initfn(Object *obj)
+{
+}
+
static void piix3_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -578,9 +584,10 @@ static void piix3_class_init(ObjectClass *klass, void *data)
dc->desc = "ISA bridge";
dc->vmsd = &vmstate_piix3;
- dc->no_user = 1,
+ dc->no_user = 1;
+ dc->reset = piix3_reset;
k->no_hotplug = 1;
- k->init = piix3_initfn;
+ k->init = piix3_realize;
k->config_write = piix3_write_config;
k->vendor_id = PCI_VENDOR_ID_INTEL;
/* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
@@ -589,9 +596,10 @@ static void piix3_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo piix3_info = {
- .name = "PIIX3",
+ .name = TYPE_PIIX3,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PIIX3State),
+ .instance_init = piix3_initfn,
.class_init = piix3_class_init,
};
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 07/20] piix3: create piix3 through composition.
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (5 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 06/20] piix3: prepare for composition Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 08/20] rtc: remove rtc_set_date Hu Tao
` (12 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/pci-host/piix.c | 74 ++++++++++++++++++++++++++++++++----------------------
1 file changed, 44 insertions(+), 30 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 021da6e..6796cb5 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -38,16 +38,6 @@
* http://download.intel.com/design/chipsets/datashts/29054901.pdf
*/
-#define TYPE_I440FX_DEVICE "i440FX"
-#define I440FX_DEVICE(obj) \
- OBJECT_CHECK(I440FXState, (obj), TYPE_I440FX_DEVICE)
-
-typedef struct I440FXState {
- PCIHostState parent_obj;
- MemoryRegion *address_space_io;
- MemoryRegion *pci_address_space;
-} I440FXState;
-
#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */
#define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */
#define XEN_PIIX_NUM_PIRQS 128ULL
@@ -79,6 +69,8 @@ typedef struct PIIX3State {
#endif
uint64_t pic_levels;
+ ISABus *bus;
+
qemu_irq *pic;
/* This member isn't used. Just for save/load compatibility */
@@ -107,6 +99,17 @@ struct I440FXPMCState {
uint8_t smm_enabled;
};
+#define TYPE_I440FX_DEVICE "i440FX"
+#define I440FX_DEVICE(obj) \
+ OBJECT_CHECK(I440FXState, (obj), TYPE_I440FX_DEVICE)
+
+typedef struct I440FXState {
+ PCIHostState parent_obj;
+ MemoryRegion *address_space_io;
+ MemoryRegion *pci_address_space;
+
+ PIIX3State piix3;
+} I440FXState;
#define I440FX_PAM 0x59
#define I440FX_PAM_SIZE 7
@@ -224,11 +227,37 @@ static int i440fx_realize(SysBusDevice *dev)
sysbus_add_io(dev, 0xcfc, &s->data_mem);
sysbus_init_ioports(&s->busdev, 0xcfc, 4);
+ qdev_set_parent_bus(DEVICE(&f->piix3), BUS(s->bus));
+ qdev_init_nofail(DEVICE(&f->piix3));
+
+ if (xen_enabled()) {
+ pci_bus_irqs(s->bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
+ &f->piix3, XEN_PIIX_NUM_PIRQS);
+ } else {
+ pci_bus_irqs(s->bus, piix3_set_irq, pci_slot_get_pirq, &f->piix3,
+ PIIX_NUM_PIRQS);
+ pci_bus_set_route_irq_fn(s->bus, piix3_route_intx_pin_to_irq);
+ }
+
return 0;
}
static void i440fx_initfn(Object *obj)
{
+ I440FXState *f = I440FX_DEVICE(obj);
+
+ /* Xen supports additional interrupt routes from the PCI devices to
+ * the IOAPIC: the four pins of each PCI device on the bus are also
+ * connected to the IOAPIC directly.
+ * These additional routes can be discovered through ACPI. */
+ if (xen_enabled()) {
+ object_initialize(&f->piix3, "PIIX3-xen");
+ } else {
+ object_initialize(&f->piix3, "PIIX3");
+ }
+ qdev_prop_set_uint32(DEVICE(&f->piix3), "addr", PCI_DEVFN(1, 0));
+ qdev_prop_set_bit(DEVICE(&f->piix3), "multifunction", true);
+ object_property_add_child(OBJECT(f), "piix3", OBJECT(&f->piix3), NULL);
}
static int i440fx_pmc_initfn(PCIDevice *dev)
@@ -267,6 +296,9 @@ static PCIBus *i440fx_common_init(const char *device_name,
i440fx->address_space_io = address_space_io;
i440fx->pci_address_space = pci_address_space;
+ piix3 = &i440fx->piix3;
+ piix3->pic = pic;
+
object_property_add_child(qdev_get_machine(), "i440fx",
OBJECT(i440fx), NULL);
qdev_set_parent_bus(DEVICE(i440fx), sysbus_get_default());
@@ -300,25 +332,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
PAM_EXPAN_SIZE);
}
- /* Xen supports additional interrupt routes from the PCI devices to
- * the IOAPIC: the four pins of each PCI device on the bus are also
- * connected to the IOAPIC directly.
- * These additional routes can be discovered through ACPI. */
- if (xen_enabled()) {
- piix3 = DO_UPCAST(PIIX3State, dev,
- pci_create_simple_multifunction(s->bus, -1, true, "PIIX3-xen"));
- pci_bus_irqs(s->bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
- piix3, XEN_PIIX_NUM_PIRQS);
- } else {
- piix3 = DO_UPCAST(PIIX3State, dev,
- pci_create_simple_multifunction(s->bus, -1, true, "PIIX3"));
- pci_bus_irqs(s->bus, piix3_set_irq, pci_slot_get_pirq, piix3,
- PIIX_NUM_PIRQS);
- pci_bus_set_route_irq_fn(s->bus, piix3_route_intx_pin_to_irq);
- }
- piix3->pic = pic;
- *isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
-
+ *isa_bus = piix3->bus;
*piix3_devfn = piix3->dev.devfn;
ram_size = ram_size / 8 / 1024 / 1024;
@@ -564,7 +578,7 @@ static int piix3_realize(PCIDevice *dev)
{
PIIX3State *s = PIIX3(dev);
- isa_bus_new(DEVICE(s), pci_address_space_io(dev));
+ s->bus = isa_bus_new(DEVICE(s), pci_address_space_io(dev));
memory_region_init_io(&s->rcr_mem, &rcr_ops, s, "piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 08/20] rtc: remove rtc_set_date
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (6 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 07/20] piix3: create piix3 through composition Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-27 19:41 ` [Qemu-devel] [Qemu-trivial] " Michael Tokarev
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 09/20] ich9: function rename Hu Tao
` (11 subsequent siblings)
19 siblings, 1 reply; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Anthony Liguori, qemu-trivial, Jan Kiszka, Vasilis Liaskovitis,
Andreas Färber, Wanpeng Li
Since it's not defined and used anywhere.
Cc: qemu-trivial@nongnu.org
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
include/hw/timer/mc146818rtc.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/timer/mc146818rtc.h b/include/hw/timer/mc146818rtc.h
index 753dda6..eaf6497 100644
--- a/include/hw/timer/mc146818rtc.h
+++ b/include/hw/timer/mc146818rtc.h
@@ -9,6 +9,5 @@
ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq);
void rtc_set_memory(ISADevice *dev, int addr, int val);
int rtc_get_memory(ISADevice *dev, int addr);
-void rtc_set_date(ISADevice *dev, const struct tm *tm);
#endif /* !MC146818RTC_H */
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 09/20] ich9: function rename
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (7 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 08/20] rtc: remove rtc_set_date Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 10/20] piix3, ich9: create the HPET through composition Hu Tao
` (10 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/isa/lpc_ich9.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 667e882..9e44758 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -524,7 +524,7 @@ static const MemoryRegionOps ich9_rst_cnt_ops = {
.endianness = DEVICE_LITTLE_ENDIAN
};
-static int ich9_lpc_initfn(PCIDevice *d)
+static int ich9_lpc_realize(PCIDevice *d)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
ISABus *isa_bus;
@@ -594,13 +594,17 @@ static const VMStateDescription vmstate_ich9_lpc = {
}
};
+static void ich9_lpc_initfn(Object *obj)
+{
+}
+
static void ich9_lpc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
dc->reset = ich9_lpc_reset;
- k->init = ich9_lpc_initfn;
+ k->init = ich9_lpc_realize;
dc->vmsd = &vmstate_ich9_lpc;
dc->no_user = 1;
k->config_write = ich9_lpc_config_write;
@@ -616,6 +620,7 @@ static const TypeInfo ich9_lpc_info = {
.name = TYPE_ICH9_LPC_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(struct ICH9LPCState),
+ .instance_init = ich9_lpc_initfn,
.class_init = ich9_lpc_class_init,
};
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 10/20] piix3, ich9: create the HPET through composition
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (8 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 09/20] ich9: function rename Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 11/20] add rtc_set_irq Hu Tao
` (9 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc.c | 22 +---------------------
hw/i386/pc_q35.c | 9 ++++++---
hw/isa/lpc_ich9.c | 28 ++++++++++++++++++++++++++++
hw/pci-host/piix.c | 30 ++++++++++++++++++++++++++++++
hw/timer/hpet.c | 2 +-
include/hw/i386/ich9.h | 2 ++
include/hw/timer/hpet.h | 3 +++
7 files changed, 71 insertions(+), 25 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 197d218..d0e7a41 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1130,8 +1130,6 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
int i;
DriveInfo *fd[MAX_FD];
DeviceState *hpet = NULL;
- int pit_isa_irq = 0;
- qemu_irq pit_alt_irq = NULL;
qemu_irq rtc_irq = NULL;
qemu_irq *a20_line;
ISADevice *i8042, *port92, *vmmouse, *pit = NULL;
@@ -1145,24 +1143,6 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
memory_region_init_io(ioportF0_io, &ioportF0_io_ops, NULL, "ioportF0", 1);
memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io);
- /*
- * Check if an HPET shall be created.
- *
- * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
- * when the HPET wants to take over. Thus we have to disable the latter.
- */
- if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
- hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL);
-
- if (hpet) {
- for (i = 0; i < GSI_NUM_PINS; i++) {
- sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
- }
- pit_isa_irq = -1;
- pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT);
- rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT);
- }
- }
*rtc_state = rtc_init(isa_bus, 2000, rtc_irq);
qemu_register_boot_set(pc_boot_set, *rtc_state);
@@ -1171,7 +1151,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
if (kvm_irqchip_in_kernel()) {
pit = kvm_pit_init(isa_bus, 0x40);
} else {
- pit = pit_init(isa_bus, 0x40, pit_isa_irq, pit_alt_irq);
+ pit = pit_init(isa_bus, 0x40, 0, NULL);
}
if (hpet) {
/* connect PIT to output control line of the HPET */
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 7888dfe..4797118 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -135,12 +135,15 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
qdev_init_nofail(DEVICE(q35_host));
host_bus = q35_host->host.pci.bus;
/* create ISA bus */
- lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
- ICH9_LPC_FUNC), true,
- TYPE_ICH9_LPC_DEVICE);
+ lpc = PCI_DEVICE(object_new(TYPE_ICH9_LPC_DEVICE));
ich9_lpc = ICH9_LPC_DEVICE(lpc);
ich9_lpc->pic = gsi;
+ qdev_prop_set_int32(DEVICE(ich9_lpc), "addr",
+ PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC));
+ qdev_prop_set_bit(DEVICE(ich9_lpc), "multifunction", true);
+ qdev_set_parent_bus(DEVICE(ich9_lpc), BUS(host_bus));
ich9_lpc->ioapic = gsi_state->ioapic_irq;
+ qdev_init_nofail(DEVICE(ich9_lpc));
pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
ICH9_LPC_NB_PIRQS);
pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 9e44758..8d6da8d 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -44,6 +44,7 @@
#include "hw/pci/pci_bus.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
+#include "hw/timer/hpet.h"
static int ich9_lpc_sci_irq(ICH9LPCState *lpc);
@@ -551,6 +552,21 @@ static int ich9_lpc_realize(PCIDevice *d)
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
1);
+ /* Realize HPET */
+ if (lpc->hpet) {
+ int i;
+
+ /* We need to introduce a proper IRQ and Memory QOM infrastructure
+ * so that the HPET isn't a sysbus device */
+ qdev_set_parent_bus(lpc->hpet, sysbus_get_default());
+ qdev_init_nofail(lpc->hpet);
+
+ sysbus_mmio_map(SYS_BUS_DEVICE(lpc->hpet), 0, HPET_BASE);
+ for (i = 0; i < GSI_NUM_PINS; i++) {
+ sysbus_connect_irq(SYS_BUS_DEVICE(lpc->hpet), i, lpc->pic[i]);
+ }
+ }
+
return 0;
}
@@ -596,6 +612,18 @@ static const VMStateDescription vmstate_ich9_lpc = {
static void ich9_lpc_initfn(Object *obj)
{
+ ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+
+ /*
+ * Check if an HPET shall be created.
+ *
+ * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
+ * when the HPET wants to take over. Thus we have to disable the latter.
+ */
+ if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
+ s->hpet = DEVICE(object_new(TYPE_HPET));
+ object_property_add_child(obj, "hpet", OBJECT(s->hpet), NULL);
+ }
}
static void ich9_lpc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 6796cb5..b6bfdf0 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -32,6 +32,7 @@
#include "hw/xen/xen.h"
#include "hw/pci-host/pam.h"
#include "sysemu/sysemu.h"
+#include "hw/timer/hpet.h"
/*
* I440FX chipset data sheet.
@@ -70,6 +71,7 @@ typedef struct PIIX3State {
uint64_t pic_levels;
ISABus *bus;
+ DeviceState *hpet;
qemu_irq *pic;
@@ -580,6 +582,21 @@ static int piix3_realize(PCIDevice *dev)
s->bus = isa_bus_new(DEVICE(s), pci_address_space_io(dev));
+ /* Realize HPET */
+ if (s->hpet) {
+ int i;
+
+ /* We need to introduce a proper IRQ and Memory QOM infrastructure
+ * so that the HPET isn't a sysbus device */
+ qdev_set_parent_bus(s->hpet, sysbus_get_default());
+ qdev_init_nofail(s->hpet);
+
+ sysbus_mmio_map(SYS_BUS_DEVICE(s->hpet), 0, HPET_BASE);
+ for (i = 0; i < GSI_NUM_PINS; i++) {
+ sysbus_connect_irq(SYS_BUS_DEVICE(s->hpet), i, s->pic[i]);
+ }
+ }
+
memory_region_init_io(&s->rcr_mem, &rcr_ops, s, "piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
&s->rcr_mem, 1);
@@ -589,6 +606,19 @@ static int piix3_realize(PCIDevice *dev)
static void piix3_initfn(Object *obj)
{
+ PIIX3State *s = PIIX3(obj);
+
+ /*
+ * Check if an HPET shall be created.
+ *
+ * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
+ * when the HPET wants to take over. Thus we have to disable the latter.
+ */
+ if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
+ s->hpet = DEVICE(object_new(TYPE_HPET));
+ object_property_add_child(obj, "hpet", OBJECT(s->hpet), NULL);
+ }
+
}
static void piix3_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 95dd01d..8fbbf9e 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -278,7 +278,7 @@ static const VMStateDescription vmstate_hpet_timer = {
};
static const VMStateDescription vmstate_hpet = {
- .name = "hpet",
+ .name = TYPE_HPET,
.version_id = 2,
.minimum_version_id = 1,
.minimum_version_id_old = 1,
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index c5f637b..8dc7d51 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -62,6 +62,8 @@ typedef struct ICH9LPCState {
MemoryRegion rbca_mem;
Notifier machine_ready;
+ DeviceState *hpet;
+
qemu_irq *pic;
qemu_irq *ioapic;
} ICH9LPCState;
diff --git a/include/hw/timer/hpet.h b/include/hw/timer/hpet.h
index 757f79f..ab17ed9 100644
--- a/include/hw/timer/hpet.h
+++ b/include/hw/timer/hpet.h
@@ -71,4 +71,7 @@ struct hpet_fw_config
} QEMU_PACKED;
extern struct hpet_fw_config hpet_cfg;
+
+#define TYPE_HPET "hpet"
+
#endif
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 11/20] add rtc_set_irq
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (9 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 10/20] piix3, ich9: create the HPET through composition Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 12/20] piix3, ich9: create the RTC through composition Hu Tao
` (8 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/timer/mc146818rtc.c | 6 ++++++
include/hw/timer/mc146818rtc.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index 481604d..2fdae55 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -687,6 +687,12 @@ int rtc_get_memory(ISADevice *dev, int addr)
return s->cmos_data[addr];
}
+void rtc_set_irq(ISADevice *dev, qemu_irq irq)
+{
+ RTCState *s = MC146818_RTC(dev);
+ s->irq = irq;
+}
+
static void rtc_set_date_from_host(ISADevice *dev)
{
RTCState *s = MC146818_RTC(dev);
diff --git a/include/hw/timer/mc146818rtc.h b/include/hw/timer/mc146818rtc.h
index eaf6497..0eea138 100644
--- a/include/hw/timer/mc146818rtc.h
+++ b/include/hw/timer/mc146818rtc.h
@@ -9,5 +9,6 @@
ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq);
void rtc_set_memory(ISADevice *dev, int addr, int val);
int rtc_get_memory(ISADevice *dev, int addr);
+void rtc_set_irq(ISADevice *dev, qemu_irq irq);
#endif /* !MC146818RTC_H */
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 12/20] piix3, ich9: create the RTC through composition
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (10 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 11/20] add rtc_set_irq Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 13/20] piix3, ich9: create pit " Hu Tao
` (7 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc.c | 8 +-------
hw/i386/pc_piix.c | 6 +++++-
hw/i386/pc_q35.c | 6 +++++-
hw/isa/lpc_ich9.c | 15 +++++++++++++++
hw/pci-host/piix.c | 15 +++++++++++++++
hw/timer/mc146818rtc.c | 2 +-
include/hw/i386/ich9.h | 1 +
include/hw/i386/pc.h | 2 +-
8 files changed, 44 insertions(+), 11 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index d0e7a41..97bfad4 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -290,7 +290,7 @@ static int set_boot_dev(ISADevice *s, const char *boot_device, int fd_bootchk)
return(0);
}
-static int pc_boot_set(void *opaque, const char *boot_device)
+int pc_boot_set(void *opaque, const char *boot_device)
{
return set_boot_dev(opaque, boot_device, 0);
}
@@ -1123,14 +1123,12 @@ static const MemoryRegionOps ioportF0_io_ops = {
};
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
- ISADevice **rtc_state,
ISADevice **floppy,
bool no_vmport)
{
int i;
DriveInfo *fd[MAX_FD];
DeviceState *hpet = NULL;
- qemu_irq rtc_irq = NULL;
qemu_irq *a20_line;
ISADevice *i8042, *port92, *vmmouse, *pit = NULL;
qemu_irq *cpu_exit_irq;
@@ -1143,10 +1141,6 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
memory_region_init_io(ioportF0_io, &ioportF0_io_ops, NULL, "ioportF0", 1);
memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io);
- *rtc_state = rtc_init(isa_bus, 2000, rtc_irq);
-
- qemu_register_boot_set(pc_boot_set, *rtc_state);
-
if (!xen_enabled()) {
if (kvm_irqchip_in_kernel()) {
pit = kvm_pit_init(isa_bus, 0x40);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 8c9ea6f..80e29d2 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -177,7 +177,7 @@ static void pc_init1(MemoryRegion *system_memory,
}
/* init basic PC hardware */
- pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, xen_enabled());
+ pc_basic_device_init(isa_bus, gsi, &floppy, xen_enabled());
pc_nic_init(isa_bus, pci_bus);
@@ -201,6 +201,10 @@ static void pc_init1(MemoryRegion *system_memory,
}
}
+ /* FIXME */
+ rtc_state = ISA_DEVICE(object_resolve_path("rtc", NULL));
+ qemu_register_boot_set(pc_boot_set, rtc_state);
+
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
floppy, idebus[0], idebus[1], rtc_state);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 4797118..7673b8a 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -172,7 +172,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
pc_register_ferr_irq(gsi[13]);
/* init basic PC hardware */
- pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false);
+ pc_basic_device_init(isa_bus, gsi, &floppy, false);
/* connect pm stuff to lpc */
ich9_lpc_pm_init(lpc);
@@ -196,6 +196,10 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
0xb100),
8, NULL, 0);
+ /* FIXME */
+ rtc_state = ISA_DEVICE(object_resolve_path("rtc", NULL));
+ qemu_register_boot_set(pc_boot_set, rtc_state);
+
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
floppy, idebus[0], idebus[1], rtc_state);
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 8d6da8d..c50795a 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -45,6 +45,7 @@
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
#include "hw/timer/hpet.h"
+#include "hw/timer/mc146818rtc.h"
static int ich9_lpc_sci_irq(ICH9LPCState *lpc);
@@ -528,6 +529,7 @@ static const MemoryRegionOps ich9_rst_cnt_ops = {
static int ich9_lpc_realize(PCIDevice *d)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
+ qemu_irq rtc_irq;
ISABus *isa_bus;
isa_bus = isa_bus_new(&d->qdev, get_system_io());
@@ -552,6 +554,10 @@ static int ich9_lpc_realize(PCIDevice *d)
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
1);
+ /* Realize the RTC */
+ qdev_set_parent_bus(DEVICE(lpc->rtc), BUS(lpc->isa_bus));
+ qdev_init_nofail(DEVICE(lpc->rtc));
+
/* Realize HPET */
if (lpc->hpet) {
int i;
@@ -565,8 +571,13 @@ static int ich9_lpc_realize(PCIDevice *d)
for (i = 0; i < GSI_NUM_PINS; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(lpc->hpet), i, lpc->pic[i]);
}
+ rtc_irq = qdev_get_gpio_in(lpc->hpet, HPET_LEGACY_RTC_INT);
+ } else {
+ isa_init_irq(lpc->rtc, &rtc_irq, RTC_ISA_IRQ);
}
+ rtc_set_irq(lpc->rtc, rtc_irq);
+
return 0;
}
@@ -624,6 +635,10 @@ static void ich9_lpc_initfn(Object *obj)
s->hpet = DEVICE(object_new(TYPE_HPET));
object_property_add_child(obj, "hpet", OBJECT(s->hpet), NULL);
}
+
+ s->rtc = ISA_DEVICE(object_new(TYPE_MC146818_RTC));
+ qdev_prop_set_int32(DEVICE(s->rtc), "base_year", 2000);
+ object_property_add_child(obj, "rtc", OBJECT(s->rtc), NULL);
}
static void ich9_lpc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index b6bfdf0..60b16d8 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -33,6 +33,7 @@
#include "hw/pci-host/pam.h"
#include "sysemu/sysemu.h"
#include "hw/timer/hpet.h"
+#include "hw/timer/mc146818rtc.h"
/*
* I440FX chipset data sheet.
@@ -72,6 +73,7 @@ typedef struct PIIX3State {
ISABus *bus;
DeviceState *hpet;
+ ISADevice *rtc;
qemu_irq *pic;
@@ -579,9 +581,14 @@ static const MemoryRegionOps rcr_ops = {
static int piix3_realize(PCIDevice *dev)
{
PIIX3State *s = PIIX3(dev);
+ qemu_irq rtc_irq;
s->bus = isa_bus_new(DEVICE(s), pci_address_space_io(dev));
+ /* Realize the RTC */
+ qdev_set_parent_bus(DEVICE(s->rtc), BUS(s->bus));
+ qdev_init_nofail(DEVICE(s->rtc));
+
/* Realize HPET */
if (s->hpet) {
int i;
@@ -595,8 +602,13 @@ static int piix3_realize(PCIDevice *dev)
for (i = 0; i < GSI_NUM_PINS; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(s->hpet), i, s->pic[i]);
}
+ rtc_irq = qdev_get_gpio_in(s->hpet, HPET_LEGACY_RTC_INT);
+ } else {
+ isa_init_irq(s->rtc, &rtc_irq, RTC_ISA_IRQ);
}
+ rtc_set_irq(s->rtc, rtc_irq);
+
memory_region_init_io(&s->rcr_mem, &rcr_ops, s, "piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
&s->rcr_mem, 1);
@@ -619,6 +631,9 @@ static void piix3_initfn(Object *obj)
object_property_add_child(obj, "hpet", OBJECT(s->hpet), NULL);
}
+ s->rtc = ISA_DEVICE(object_new(TYPE_MC146818_RTC));
+ qdev_prop_set_int32(DEVICE(s->rtc), "base_year", 2000);
+ object_property_add_child(obj, "rtc", OBJECT(s->rtc), NULL);
}
static void piix3_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index 2fdae55..19429d0 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -729,7 +729,7 @@ static int rtc_post_load(void *opaque, int version_id)
}
static const VMStateDescription vmstate_rtc = {
- .name = "mc146818rtc",
+ .name = TYPE_MC146818_RTC,
.version_id = 3,
.minimum_version_id = 1,
.minimum_version_id_old = 1,
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index 8dc7d51..1d9f26a 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -63,6 +63,7 @@ typedef struct ICH9LPCState {
Notifier machine_ready;
DeviceState *hpet;
+ ISADevice *rtc;
qemu_irq *pic;
qemu_irq *ioapic;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index edd4618..99fef1c 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -92,7 +92,6 @@ void *pc_memory_init(MemoryRegion *system_memory,
qemu_irq *pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
- ISADevice **rtc_state,
ISADevice **floppy,
bool no_vmport);
void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
@@ -102,6 +101,7 @@ void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
ISADevice *s);
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_pci_device_init(PCIBus *pci_bus);
+int pc_boot_set(void *opaque, const char *boot_device);
typedef void (*cpu_set_smm_t)(int smm, void *arg);
void cpu_smm_register(cpu_set_smm_t callback, void *arg);
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 13/20] piix3, ich9: create pit through composition
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (11 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 12/20] piix3, ich9: create the RTC through composition Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 14/20] piix3, ich9: create pc speaker " Hu Tao
` (6 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc.c | 16 +---------------
hw/isa/lpc_ich9.c | 30 ++++++++++++++++++++++++++++++
hw/pci-host/piix.c | 32 ++++++++++++++++++++++++++++++++
include/hw/i386/ich9.h | 1 +
include/hw/timer/i8254.h | 3 +++
5 files changed, 67 insertions(+), 15 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 97bfad4..8438d0f 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1128,9 +1128,8 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
{
int i;
DriveInfo *fd[MAX_FD];
- DeviceState *hpet = NULL;
qemu_irq *a20_line;
- ISADevice *i8042, *port92, *vmmouse, *pit = NULL;
+ ISADevice *i8042, *port92, *vmmouse;
qemu_irq *cpu_exit_irq;
MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
@@ -1141,19 +1140,6 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
memory_region_init_io(ioportF0_io, &ioportF0_io_ops, NULL, "ioportF0", 1);
memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io);
- if (!xen_enabled()) {
- if (kvm_irqchip_in_kernel()) {
- pit = kvm_pit_init(isa_bus, 0x40);
- } else {
- pit = pit_init(isa_bus, 0x40, 0, NULL);
- }
- if (hpet) {
- /* connect PIT to output control line of the HPET */
- qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(&pit->qdev, 0));
- }
- pcspk_init(isa_bus, pit);
- }
-
for(i = 0; i < MAX_SERIAL_PORTS; i++) {
if (serial_hds[i]) {
serial_isa_init(isa_bus, i, serial_hds[i]);
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index c50795a..42f60b9 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -46,6 +46,8 @@
#include "sysemu/sysemu.h"
#include "hw/timer/hpet.h"
#include "hw/timer/mc146818rtc.h"
+#include "hw/audio/pcspk.h"
+#include "hw/timer/i8254.h"
static int ich9_lpc_sci_irq(ICH9LPCState *lpc);
@@ -530,6 +532,7 @@ static int ich9_lpc_realize(PCIDevice *d)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
qemu_irq rtc_irq;
+ qemu_irq pit_irq = NULL;
ISABus *isa_bus;
isa_bus = isa_bus_new(&d->qdev, get_system_io());
@@ -572,12 +575,31 @@ static int ich9_lpc_realize(PCIDevice *d)
sysbus_connect_irq(SYS_BUS_DEVICE(lpc->hpet), i, lpc->pic[i]);
}
rtc_irq = qdev_get_gpio_in(lpc->hpet, HPET_LEGACY_RTC_INT);
+ pit_irq = qdev_get_gpio_in(lpc->hpet, HPET_LEGACY_PIT_INT);
} else {
isa_init_irq(lpc->rtc, &rtc_irq, RTC_ISA_IRQ);
}
rtc_set_irq(lpc->rtc, rtc_irq);
+ /* Realize the PIT */
+ qdev_set_parent_bus(DEVICE(lpc->pit), BUS(lpc->isa_bus));
+ qdev_init_nofail(DEVICE(lpc->pit));
+
+ if (!pit_irq) {
+ pit_irq = isa_get_irq(lpc->pit, 0);
+ }
+ if (!kvm_irqchip_in_kernel()) {
+ qdev_connect_gpio_out(DEVICE(lpc->pit), 0, pit_irq);
+ }
+ if (lpc->hpet) {
+ qdev_connect_gpio_out(DEVICE(lpc->hpet), 0,
+ qdev_get_gpio_in(DEVICE(lpc->pit), 0));
+ }
+
+ /* FIXME this should be refactored */
+ pcspk_init(lpc->isa_bus, lpc->pit);
+
return 0;
}
@@ -639,6 +661,14 @@ static void ich9_lpc_initfn(Object *obj)
s->rtc = ISA_DEVICE(object_new(TYPE_MC146818_RTC));
qdev_prop_set_int32(DEVICE(s->rtc), "base_year", 2000);
object_property_add_child(obj, "rtc", OBJECT(s->rtc), NULL);
+
+ if (kvm_irqchip_in_kernel()) {
+ s->pit = ISA_DEVICE(object_new(TYPE_KVM_PIT));
+ } else {
+ s->pit = ISA_DEVICE(object_new(TYPE_PIT));
+ }
+ object_property_add_child(obj, "pit", OBJECT(s->pit), NULL);
+ qdev_prop_set_uint32(DEVICE(s->pit), "iobase", 0x40);
}
static void ich9_lpc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 60b16d8..f3f3856 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -34,6 +34,8 @@
#include "sysemu/sysemu.h"
#include "hw/timer/hpet.h"
#include "hw/timer/mc146818rtc.h"
+#include "hw/audio/pcspk.h"
+#include "hw/timer/i8254.h"
/*
* I440FX chipset data sheet.
@@ -74,6 +76,7 @@ typedef struct PIIX3State {
ISABus *bus;
DeviceState *hpet;
ISADevice *rtc;
+ ISADevice *pit;
qemu_irq *pic;
@@ -581,6 +584,7 @@ static const MemoryRegionOps rcr_ops = {
static int piix3_realize(PCIDevice *dev)
{
PIIX3State *s = PIIX3(dev);
+ qemu_irq pit_irq = NULL;
qemu_irq rtc_irq;
s->bus = isa_bus_new(DEVICE(s), pci_address_space_io(dev));
@@ -603,12 +607,32 @@ static int piix3_realize(PCIDevice *dev)
sysbus_connect_irq(SYS_BUS_DEVICE(s->hpet), i, s->pic[i]);
}
rtc_irq = qdev_get_gpio_in(s->hpet, HPET_LEGACY_RTC_INT);
+ pit_irq = qdev_get_gpio_in(s->hpet, HPET_LEGACY_PIT_INT);
} else {
isa_init_irq(s->rtc, &rtc_irq, RTC_ISA_IRQ);
}
rtc_set_irq(s->rtc, rtc_irq);
+ /* Realize the PIT */
+ qdev_set_parent_bus(DEVICE(s->pit), BUS(s->bus));
+ qdev_init_nofail(DEVICE(s->pit));
+
+ if (!pit_irq) {
+ pit_irq = isa_get_irq(s->pit, 0);
+ }
+ if (!kvm_irqchip_in_kernel()) {
+ qdev_connect_gpio_out(DEVICE(s->pit), 0, pit_irq);
+ }
+
+ if (s->hpet) {
+ qdev_connect_gpio_out(DEVICE(s->hpet), 0,
+ qdev_get_gpio_in(DEVICE(s->pit), 0));
+ }
+
+ /* FIXME this should be refactored */
+ pcspk_init(s->bus, s->pit);
+
memory_region_init_io(&s->rcr_mem, &rcr_ops, s, "piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
&s->rcr_mem, 1);
@@ -634,6 +658,14 @@ static void piix3_initfn(Object *obj)
s->rtc = ISA_DEVICE(object_new(TYPE_MC146818_RTC));
qdev_prop_set_int32(DEVICE(s->rtc), "base_year", 2000);
object_property_add_child(obj, "rtc", OBJECT(s->rtc), NULL);
+
+ if (kvm_irqchip_in_kernel()) {
+ s->pit = ISA_DEVICE(object_new(TYPE_KVM_PIT));
+ } else {
+ s->pit = ISA_DEVICE(object_new(TYPE_PIT));
+ }
+ object_property_add_child(obj, "pit", OBJECT(s->pit), NULL);
+ qdev_prop_set_uint32(DEVICE(s->pit), "iobase", 0x40);
}
static void piix3_class_init(ObjectClass *klass, void *data)
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index 1d9f26a..14ceafb 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -64,6 +64,7 @@ typedef struct ICH9LPCState {
DeviceState *hpet;
ISADevice *rtc;
+ ISADevice *pit;
qemu_irq *pic;
qemu_irq *ioapic;
diff --git a/include/hw/timer/i8254.h b/include/hw/timer/i8254.h
index 75bb530..10da2ea 100644
--- a/include/hw/timer/i8254.h
+++ b/include/hw/timer/i8254.h
@@ -30,6 +30,9 @@
#define PIT_FREQ 1193182
+#define TYPE_PIT "isa-pit"
+#define TYPE_KVM_PIT "kvm-pit"
+
typedef struct PITChannelInfo {
int gate;
int mode;
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 14/20] piix3, ich9: create pc speaker through composition
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (12 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 13/20] piix3, ich9: create pit " Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 15/20] i440fx pmc: create pmc through comosition Hu Tao
` (5 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/isa/lpc_ich9.c | 9 +++++++--
hw/pci-host/piix.c | 10 ++++++++--
include/hw/i386/ich9.h | 1 +
3 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 42f60b9..a1927b2 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -597,8 +597,9 @@ static int ich9_lpc_realize(PCIDevice *d)
qdev_get_gpio_in(DEVICE(lpc->pit), 0));
}
- /* FIXME this should be refactored */
- pcspk_init(lpc->isa_bus, lpc->pit);
+ /* Realize pcspk */
+ qdev_set_parent_bus(DEVICE(lpc->pcspk), BUS(lpc->isa_bus));
+ qdev_init_nofail(DEVICE(lpc->pcspk));
return 0;
}
@@ -669,6 +670,10 @@ static void ich9_lpc_initfn(Object *obj)
}
object_property_add_child(obj, "pit", OBJECT(s->pit), NULL);
qdev_prop_set_uint32(DEVICE(s->pit), "iobase", 0x40);
+
+ s->pcspk = ISA_DEVICE(object_new(TYPE_PC_SPEAKER));
+ qdev_prop_set_uint32(&s->pcspk->qdev, "iobase", 0x61);
+ qdev_prop_set_ptr(&s->pcspk->qdev, "pit", s->pit);
}
static void ich9_lpc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index f3f3856..0030cad 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -77,6 +77,7 @@ typedef struct PIIX3State {
DeviceState *hpet;
ISADevice *rtc;
ISADevice *pit;
+ ISADevice *pcspk;
qemu_irq *pic;
@@ -630,8 +631,9 @@ static int piix3_realize(PCIDevice *dev)
qdev_get_gpio_in(DEVICE(s->pit), 0));
}
- /* FIXME this should be refactored */
- pcspk_init(s->bus, s->pit);
+ /* Realize pcspk */
+ qdev_set_parent_bus(DEVICE(s->pcspk), BUS(s->bus));
+ qdev_init_nofail(DEVICE(s->pcspk));
memory_region_init_io(&s->rcr_mem, &rcr_ops, s, "piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
@@ -666,6 +668,10 @@ static void piix3_initfn(Object *obj)
}
object_property_add_child(obj, "pit", OBJECT(s->pit), NULL);
qdev_prop_set_uint32(DEVICE(s->pit), "iobase", 0x40);
+
+ s->pcspk = ISA_DEVICE(object_new(TYPE_PC_SPEAKER));
+ qdev_prop_set_uint32(&s->pcspk->qdev, "iobase", 0x61);
+ qdev_prop_set_ptr(&s->pcspk->qdev, "pit", s->pit);
}
static void piix3_class_init(ObjectClass *klass, void *data)
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index 14ceafb..ad76b15 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -65,6 +65,7 @@ typedef struct ICH9LPCState {
DeviceState *hpet;
ISADevice *rtc;
ISADevice *pit;
+ ISADevice *pcspk;
qemu_irq *pic;
qemu_irq *ioapic;
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 15/20] i440fx pmc: create pmc through comosition
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (13 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 14/20] piix3, ich9: create pc speaker " Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 16/20] i440fx-pmc: calculate PCI memory hole directly Hu Tao
` (4 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/pci-host/piix.c | 101 +++++++++++++++++++++++++++++++++--------------------
1 file changed, 64 insertions(+), 37 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 0030cad..1798060 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -105,6 +105,11 @@ struct I440FXPMCState {
PAMMemoryRegion pam_regions[13];
MemoryRegion smram_region;
uint8_t smm_enabled;
+ ram_addr_t ram_size;
+ hwaddr pci_hole_start;
+ hwaddr pci_hole_size;
+ hwaddr pci_hole64_start;
+ hwaddr pci_hole64_size;
};
#define TYPE_I440FX_DEVICE "i440FX"
@@ -117,6 +122,7 @@ typedef struct I440FXState {
MemoryRegion *pci_address_space;
PIIX3State piix3;
+ I440FXPMCState pmc;
} I440FXState;
#define I440FX_PAM 0x59
@@ -247,6 +253,9 @@ static int i440fx_realize(SysBusDevice *dev)
pci_bus_set_route_irq_fn(s->bus, piix3_route_intx_pin_to_irq);
}
+ qdev_set_parent_bus(DEVICE(&f->pmc), BUS(s->bus));
+ qdev_init_nofail(DEVICE(&f->pmc));
+
return 0;
}
@@ -266,11 +275,54 @@ static void i440fx_initfn(Object *obj)
qdev_prop_set_uint32(DEVICE(&f->piix3), "addr", PCI_DEVFN(1, 0));
qdev_prop_set_bit(DEVICE(&f->piix3), "multifunction", true);
object_property_add_child(OBJECT(f), "piix3", OBJECT(&f->piix3), NULL);
+
+ object_initialize(&f->pmc, TYPE_I440FX_PMC_DEVICE);
+ object_property_add_child(obj, "pmc", OBJECT(&f->pmc), NULL);
+ qdev_prop_set_uint32(DEVICE(&f->pmc), "addr", PCI_DEVFN(0, 0));
}
static int i440fx_pmc_initfn(PCIDevice *dev)
{
I440FXPMCState *d = I440FX_PMC_DEVICE(dev);
+ ram_addr_t ram_size;
+ int i;
+
+ g_assert(d->system_memory != NULL);
+ g_assert(d->pci_address_space != NULL);
+ g_assert(d->ram_memory != NULL);
+
+ memory_region_init_alias(&d->pci_hole, "pci-hole", d->pci_address_space,
+ d->pci_hole_start, d->pci_hole_size);
+ memory_region_add_subregion(d->system_memory, d->pci_hole_start,
+ &d->pci_hole);
+ memory_region_init_alias(&d->pci_hole_64bit, "pci-hole64",
+ d->pci_address_space,
+ d->pci_hole64_start, d->pci_hole64_size);
+ if (d->pci_hole64_size) {
+ memory_region_add_subregion(d->system_memory, d->pci_hole64_start,
+ &d->pci_hole_64bit);
+ }
+ memory_region_init_alias(&d->smram_region, "smram-region",
+ d->pci_address_space, 0xa0000, 0x20000);
+ memory_region_add_subregion_overlap(d->system_memory, 0xa0000,
+ &d->smram_region, 1);
+ memory_region_set_enabled(&d->smram_region, false);
+
+ init_pam(d->ram_memory, d->system_memory, d->pci_address_space,
+ &d->pam_regions[0], PAM_BIOS_BASE, PAM_BIOS_SIZE);
+ for (i = 0; i < 12; ++i) {
+ init_pam(d->ram_memory, d->system_memory, d->pci_address_space,
+ &d->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE,
+ PAM_EXPAN_SIZE);
+ }
+
+ ram_size = d->ram_size / 8 / 1024 / 1024;
+ if (ram_size > 255) {
+ ram_size = 255;
+ }
+ d->dev.config[0x57] = ram_size;
+
+ i440fx_pmc_update_memory_mappings(d);
d->dev.config[I440FX_SMRAM] = 0x02;
@@ -291,12 +343,10 @@ static PCIBus *i440fx_common_init(const char *device_name,
MemoryRegion *pci_address_space,
MemoryRegion *ram_memory)
{
- PCIDevice *d;
PCIHostState *s;
PIIX3State *piix3;
I440FXPMCState *f;
I440FXState *i440fx;
- unsigned i;
i440fx = I440FX_DEVICE(object_new(TYPE_I440FX_DEVICE));
s = PCI_HOST_BRIDGE(i440fx);
@@ -307,49 +357,26 @@ static PCIBus *i440fx_common_init(const char *device_name,
piix3 = &i440fx->piix3;
piix3->pic = pic;
- object_property_add_child(qdev_get_machine(), "i440fx",
- OBJECT(i440fx), NULL);
- qdev_set_parent_bus(DEVICE(i440fx), sysbus_get_default());
- qdev_init_nofail(DEVICE(i440fx));
+ /* FIXME these should be derived */
+ i440fx->pmc.pci_hole_start = pci_hole_start;
+ i440fx->pmc.pci_hole_size = pci_hole_size;
+ i440fx->pmc.pci_hole64_start = pci_hole64_start;
+ i440fx->pmc.pci_hole64_size = pci_hole64_size;
- d = pci_create_simple(s->bus, 0, device_name);
- f = I440FX_PMC_DEVICE(d);
+ f = &i440fx->pmc;
+ f->ram_size = ram_size;
f->system_memory = address_space_mem;
f->pci_address_space = pci_address_space;
f->ram_memory = ram_memory;
- memory_region_init_alias(&f->pci_hole, "pci-hole", f->pci_address_space,
- pci_hole_start, pci_hole_size);
- memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole);
- memory_region_init_alias(&f->pci_hole_64bit, "pci-hole64",
- f->pci_address_space,
- pci_hole64_start, pci_hole64_size);
- if (pci_hole64_size) {
- memory_region_add_subregion(f->system_memory, pci_hole64_start,
- &f->pci_hole_64bit);
- }
- memory_region_init_alias(&f->smram_region, "smram-region",
- f->pci_address_space, 0xa0000, 0x20000);
- memory_region_add_subregion_overlap(f->system_memory, 0xa0000,
- &f->smram_region, 1);
- memory_region_set_enabled(&f->smram_region, false);
- init_pam(f->ram_memory, f->system_memory, f->pci_address_space,
- &f->pam_regions[0], PAM_BIOS_BASE, PAM_BIOS_SIZE);
- for (i = 0; i < 12; ++i) {
- init_pam(f->ram_memory, f->system_memory, f->pci_address_space,
- &f->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE,
- PAM_EXPAN_SIZE);
- }
+
+ object_property_add_child(qdev_get_machine(), "i440fx",
+ OBJECT(i440fx), NULL);
+ qdev_set_parent_bus(DEVICE(i440fx), sysbus_get_default());
+ qdev_init_nofail(DEVICE(i440fx));
*isa_bus = piix3->bus;
*piix3_devfn = piix3->dev.devfn;
- ram_size = ram_size / 8 / 1024 / 1024;
- if (ram_size > 255)
- ram_size = 255;
- f->dev.config[0x57] = ram_size;
-
- i440fx_pmc_update_memory_mappings(f);
-
return s->bus;
}
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 16/20] i440fx-pmc: calculate PCI memory hole directly
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (14 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 15/20] i440fx pmc: create pmc through comosition Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 17/20] i440fx-pmc: create pci address space Hu Tao
` (3 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc_piix.c | 6 ------
hw/pci-host/piix.c | 49 ++++++++++++++++++++++++-------------------------
include/hw/i386/pc.h | 4 ----
3 files changed, 24 insertions(+), 35 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 80e29d2..79747fa 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -138,12 +138,6 @@ static void pc_init1(MemoryRegion *system_memory,
if (pci_enabled) {
pci_bus = i440fx_init(&piix3_devfn, &isa_bus, gsi,
system_memory, system_io, ram_size,
- below_4g_mem_size,
- 0x100000000ULL - below_4g_mem_size,
- 0x100000000ULL + above_4g_mem_size,
- (sizeof(hwaddr) == 4
- ? 0
- : ((uint64_t)1 << 62)),
pci_memory, ram_memory);
} else {
pci_bus = NULL;
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 1798060..c91607f 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -47,6 +47,9 @@
#define XEN_PIIX_NUM_PIRQS 128ULL
#define PIIX_PIRQC 0x60
+#define I440FX_PMC_PCI_HOLE 0xE0000000ULL
+#define I440FX_PMC_PCI_HOLE_END 0x100000000ULL
+
/*
* Reset Control Register: PCI-accessible ISA-Compatible Register at address
* 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000).
@@ -106,10 +109,6 @@ struct I440FXPMCState {
MemoryRegion smram_region;
uint8_t smm_enabled;
ram_addr_t ram_size;
- hwaddr pci_hole_start;
- hwaddr pci_hole_size;
- hwaddr pci_hole64_start;
- hwaddr pci_hole64_size;
};
#define TYPE_I440FX_DEVICE "i440FX"
@@ -285,21 +284,37 @@ static int i440fx_pmc_initfn(PCIDevice *dev)
{
I440FXPMCState *d = I440FX_PMC_DEVICE(dev);
ram_addr_t ram_size;
+ hwaddr pci_hole_start, pci_hole_size;
+ hwaddr pci_hole64_start, pci_hole64_size;
int i;
g_assert(d->system_memory != NULL);
g_assert(d->pci_address_space != NULL);
g_assert(d->ram_memory != NULL);
+ if(d->ram_size > I440FX_PMC_PCI_HOLE) {
+ pci_hole_start = I440FX_PMC_PCI_HOLE;
+ } else {
+ pci_hole_start = d->ram_size;
+ }
+ pci_hole_size = I440FX_PMC_PCI_HOLE_END - pci_hole_start;
+
+ pci_hole64_start = I440FX_PMC_PCI_HOLE_END + d->ram_size - pci_hole_start;
+ if (sizeof(hwaddr) == 4) {
+ pci_hole64_size = 0;
+ } else {
+ pci_hole64_size = (1ULL << 62);
+ }
+
memory_region_init_alias(&d->pci_hole, "pci-hole", d->pci_address_space,
- d->pci_hole_start, d->pci_hole_size);
- memory_region_add_subregion(d->system_memory, d->pci_hole_start,
+ pci_hole_start, pci_hole_size);
+ memory_region_add_subregion(d->system_memory, pci_hole_start,
&d->pci_hole);
memory_region_init_alias(&d->pci_hole_64bit, "pci-hole64",
d->pci_address_space,
- d->pci_hole64_start, d->pci_hole64_size);
- if (d->pci_hole64_size) {
- memory_region_add_subregion(d->system_memory, d->pci_hole64_start,
+ pci_hole64_start, pci_hole64_size);
+ if (pci_hole64_size) {
+ memory_region_add_subregion(d->system_memory, pci_hole64_start,
&d->pci_hole_64bit);
}
memory_region_init_alias(&d->smram_region, "smram-region",
@@ -336,10 +351,6 @@ static PCIBus *i440fx_common_init(const char *device_name,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- hwaddr pci_hole_start,
- hwaddr pci_hole_size,
- hwaddr pci_hole64_start,
- hwaddr pci_hole64_size,
MemoryRegion *pci_address_space,
MemoryRegion *ram_memory)
{
@@ -357,12 +368,6 @@ static PCIBus *i440fx_common_init(const char *device_name,
piix3 = &i440fx->piix3;
piix3->pic = pic;
- /* FIXME these should be derived */
- i440fx->pmc.pci_hole_start = pci_hole_start;
- i440fx->pmc.pci_hole_size = pci_hole_size;
- i440fx->pmc.pci_hole64_start = pci_hole64_start;
- i440fx->pmc.pci_hole64_size = pci_hole64_size;
-
f = &i440fx->pmc;
f->ram_size = ram_size;
f->system_memory = address_space_mem;
@@ -385,10 +390,6 @@ PCIBus *i440fx_init(int *piix3_devfn,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- hwaddr pci_hole_start,
- hwaddr pci_hole_size,
- hwaddr pci_hole64_start,
- hwaddr pci_hole64_size,
MemoryRegion *pci_memory, MemoryRegion *ram_memory)
{
@@ -397,8 +398,6 @@ PCIBus *i440fx_init(int *piix3_devfn,
b = i440fx_common_init(TYPE_I440FX_PMC_DEVICE,
piix3_devfn, isa_bus, pic,
address_space_mem, address_space_io, ram_size,
- pci_hole_start, pci_hole_size,
- pci_hole64_start, pci_hole64_size,
pci_memory, ram_memory);
return b;
}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 99fef1c..0875295 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -127,10 +127,6 @@ PCIBus *i440fx_init(int *piix_devfn,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- hwaddr pci_hole_start,
- hwaddr pci_hole_size,
- hwaddr pci_hole64_start,
- hwaddr pci_hole64_size,
MemoryRegion *pci_memory,
MemoryRegion *ram_memory);
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 17/20] i440fx-pmc: create pci address space
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (15 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 16/20] i440fx-pmc: calculate PCI memory hole directly Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 18/20] q35-mch: " Hu Tao
` (2 subsequent siblings)
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc_piix.c | 33 +++++++++++++++------------------
hw/pci-host/piix.c | 16 +++++++++-------
include/hw/i386/pc.h | 2 +-
3 files changed, 25 insertions(+), 26 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 79747fa..2120dc6 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -109,23 +109,6 @@ static void pc_init1(MemoryRegion *system_memory,
below_4g_mem_size = ram_size;
}
- if (pci_enabled) {
- pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, "pci", INT64_MAX);
- rom_memory = pci_memory;
- } else {
- pci_memory = NULL;
- rom_memory = system_memory;
- }
-
- /* allocate ram and load rom/bios */
- if (!xen_enabled()) {
- fw_cfg = pc_memory_init(system_memory,
- kernel_filename, kernel_cmdline, initrd_filename,
- below_4g_mem_size, above_4g_mem_size,
- rom_memory, &ram_memory);
- }
-
gsi_state = g_malloc0(sizeof(*gsi_state));
if (kvm_irqchip_in_kernel()) {
kvm_pc_setup_irq_routing(pci_enabled);
@@ -138,7 +121,7 @@ static void pc_init1(MemoryRegion *system_memory,
if (pci_enabled) {
pci_bus = i440fx_init(&piix3_devfn, &isa_bus, gsi,
system_memory, system_io, ram_size,
- pci_memory, ram_memory);
+ &pci_memory, ram_memory);
} else {
pci_bus = NULL;
isa_bus = isa_bus_new(NULL, system_io);
@@ -146,6 +129,20 @@ static void pc_init1(MemoryRegion *system_memory,
}
isa_bus_irqs(isa_bus, gsi);
+ if (pci_enabled) {
+ rom_memory = pci_memory;
+ } else {
+ rom_memory = system_memory;
+ }
+
+ /* allocate ram and load rom/bios */
+ if (!xen_enabled()) {
+ fw_cfg = pc_memory_init(system_memory,
+ kernel_filename, kernel_cmdline, initrd_filename,
+ below_4g_mem_size, above_4g_mem_size,
+ rom_memory, &ram_memory);
+ }
+
if (kvm_irqchip_in_kernel()) {
i8259 = kvm_i8259_init(isa_bus);
} else if (xen_enabled()) {
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index c91607f..7246265 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -118,7 +118,7 @@ struct I440FXPMCState {
typedef struct I440FXState {
PCIHostState parent_obj;
MemoryRegion *address_space_io;
- MemoryRegion *pci_address_space;
+ MemoryRegion pci_address_space;
PIIX3State piix3;
I440FXPMCState pmc;
@@ -227,7 +227,7 @@ static int i440fx_realize(SysBusDevice *dev)
PCIHostState *s = PCI_HOST_BRIDGE(dev);
I440FXState *f = I440FX_DEVICE(dev);
- s->bus = pci_bus_new(DEVICE(f), NULL, f->pci_address_space,
+ s->bus = pci_bus_new(DEVICE(f), NULL, &f->pci_address_space,
f->address_space_io, 0, TYPE_PCI_BUS);
memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s,
@@ -252,6 +252,8 @@ static int i440fx_realize(SysBusDevice *dev)
pci_bus_set_route_irq_fn(s->bus, piix3_route_intx_pin_to_irq);
}
+ f->pmc.pci_address_space = &f->pci_address_space;
+
qdev_set_parent_bus(DEVICE(&f->pmc), BUS(s->bus));
qdev_init_nofail(DEVICE(&f->pmc));
@@ -278,6 +280,8 @@ static void i440fx_initfn(Object *obj)
object_initialize(&f->pmc, TYPE_I440FX_PMC_DEVICE);
object_property_add_child(obj, "pmc", OBJECT(&f->pmc), NULL);
qdev_prop_set_uint32(DEVICE(&f->pmc), "addr", PCI_DEVFN(0, 0));
+
+ memory_region_init(&f->pci_address_space, "pci", INT64_MAX);
}
static int i440fx_pmc_initfn(PCIDevice *dev)
@@ -289,7 +293,6 @@ static int i440fx_pmc_initfn(PCIDevice *dev)
int i;
g_assert(d->system_memory != NULL);
- g_assert(d->pci_address_space != NULL);
g_assert(d->ram_memory != NULL);
if(d->ram_size > I440FX_PMC_PCI_HOLE) {
@@ -351,7 +354,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- MemoryRegion *pci_address_space,
+ MemoryRegion **pci_address_space,
MemoryRegion *ram_memory)
{
PCIHostState *s;
@@ -363,7 +366,6 @@ static PCIBus *i440fx_common_init(const char *device_name,
s = PCI_HOST_BRIDGE(i440fx);
i440fx->address_space_io = address_space_io;
- i440fx->pci_address_space = pci_address_space;
piix3 = &i440fx->piix3;
piix3->pic = pic;
@@ -371,7 +373,6 @@ static PCIBus *i440fx_common_init(const char *device_name,
f = &i440fx->pmc;
f->ram_size = ram_size;
f->system_memory = address_space_mem;
- f->pci_address_space = pci_address_space;
f->ram_memory = ram_memory;
object_property_add_child(qdev_get_machine(), "i440fx",
@@ -381,6 +382,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
*isa_bus = piix3->bus;
*piix3_devfn = piix3->dev.devfn;
+ *pci_address_space = &i440fx->pci_address_space;
return s->bus;
}
@@ -390,7 +392,7 @@ PCIBus *i440fx_init(int *piix3_devfn,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- MemoryRegion *pci_memory, MemoryRegion *ram_memory)
+ MemoryRegion **pci_memory, MemoryRegion *ram_memory)
{
PCIBus *b;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 0875295..c733e68 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -127,7 +127,7 @@ PCIBus *i440fx_init(int *piix_devfn,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- MemoryRegion *pci_memory,
+ MemoryRegion **pci_memory,
MemoryRegion *ram_memory);
/* piix4.c */
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 18/20] q35-mch: create pci address space
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (16 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 17/20] i440fx-pmc: create pci address space Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 19/20] i440fx-pmc: move ram initialization into i440fx-pmc Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 20/20] q35-mch: move ram initialization into q35-mch Hu Tao
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc_q35.c | 13 ++++---------
hw/pci-host/q35.c | 12 +++++++-----
include/hw/pci-host/q35.h | 1 +
3 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 7673b8a..a6d1eae 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -64,7 +64,6 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
BusState *idebus[MAX_SATA_PORTS];
ISADevice *rtc_state;
ISADevice *floppy;
- MemoryRegion *pci_memory;
MemoryRegion *rom_memory;
MemoryRegion *ram_memory;
GSIState *gsi_state;
@@ -87,6 +86,9 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
kvmclock_create();
+ /* create pci host bus */
+ q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
+
if (ram_size >= 0xb0000000) {
above_4g_mem_size = ram_size - 0xb0000000;
below_4g_mem_size = 0xb0000000;
@@ -97,11 +99,8 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
/* pci enabled */
if (pci_enabled) {
- pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, "pci", INT64_MAX);
- rom_memory = pci_memory;
+ rom_memory = &q35_host->pci_address_space;
} else {
- pci_memory = NULL;
rom_memory = get_system_memory();
}
@@ -122,11 +121,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
}
- /* create pci host bus */
- q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
-
q35_host->mch.ram_memory = ram_memory;
- q35_host->mch.pci_address_space = pci_memory;
q35_host->mch.system_memory = get_system_memory();
q35_host->mch.address_space_io = get_system_io();
q35_host->mch.below_4g_mem_size = below_4g_mem_size;
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 8467f86..c57ab06 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -36,8 +36,7 @@
static int q35_host_init(SysBusDevice *dev)
{
- PCIBus *b;
- PCIHostState *pci = FROM_SYSBUS(PCIHostState, dev);
+ PCIHostState *pci = PCI_HOST_BRIDGE(dev);
Q35PCIHost *s = Q35_HOST_DEVICE(&dev->qdev);
memory_region_init_io(&pci->conf_mem, &pci_host_conf_le_ops, pci,
@@ -53,11 +52,12 @@ static int q35_host_init(SysBusDevice *dev)
if (pcie_host_init(&s->host) < 0) {
return -1;
}
- b = pci_bus_new(&s->host.pci.busdev.qdev, "pcie.0",
+
+ s->mch.pci_address_space = &s->pci_address_space;
+ pci->bus = pci_bus_new(DEVICE(s), "pcie.0",
s->mch.pci_address_space, s->mch.address_space_io,
0, TYPE_PCIE_BUS);
- s->host.pci.bus = b;
- qdev_set_parent_bus(DEVICE(&s->mch), BUS(b));
+ qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus));
qdev_init_nofail(DEVICE(&s->mch));
return 0;
@@ -86,6 +86,8 @@ static void q35_host_initfn(Object *obj)
object_property_add_child(OBJECT(s), "mch", OBJECT(&s->mch), NULL);
qdev_prop_set_uint32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false);
+
+ memory_region_init(&s->pci_address_space, "pci", INT64_MAX);
}
static const TypeInfo q35_host_info = {
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index e182c82..1c02420 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -60,6 +60,7 @@ typedef struct MCHPCIState {
typedef struct Q35PCIHost {
PCIExpressHost host;
MCHPCIState mch;
+ MemoryRegion pci_address_space;
} Q35PCIHost;
#define Q35_MASK(bit, ms_bit, ls_bit) \
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 19/20] i440fx-pmc: move ram initialization into i440fx-pmc
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (17 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 18/20] q35-mch: " Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 20/20] q35-mch: move ram initialization into q35-mch Hu Tao
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc.c | 27 ++-------------------------
hw/i386/pc_piix.c | 5 ++---
hw/pci-host/piix.c | 39 +++++++++++++++++++++++++++++++--------
include/hw/i386/pc.h | 6 ++----
4 files changed, 37 insertions(+), 40 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 8438d0f..45d9701 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1018,37 +1018,14 @@ void *pc_memory_init(MemoryRegion *system_memory,
const char *initrd_filename,
ram_addr_t below_4g_mem_size,
ram_addr_t above_4g_mem_size,
- MemoryRegion *rom_memory,
- MemoryRegion **ram_memory)
+ MemoryRegion *rom_memory)
{
int linux_boot, i;
- MemoryRegion *ram, *option_rom_mr;
- MemoryRegion *ram_below_4g, *ram_above_4g;
+ MemoryRegion *option_rom_mr;
void *fw_cfg;
linux_boot = (kernel_filename != NULL);
- /* Allocate RAM. We allocate it as a single memory region and use
- * aliases to address portions of it, mostly for backwards compatibility
- * with older qemus that used qemu_ram_alloc().
- */
- ram = g_malloc(sizeof(*ram));
- memory_region_init_ram(ram, "pc.ram",
- below_4g_mem_size + above_4g_mem_size);
- vmstate_register_ram_global(ram);
- *ram_memory = ram;
- ram_below_4g = g_malloc(sizeof(*ram_below_4g));
- memory_region_init_alias(ram_below_4g, "ram-below-4g", ram,
- 0, below_4g_mem_size);
- memory_region_add_subregion(system_memory, 0, ram_below_4g);
- if (above_4g_mem_size > 0) {
- ram_above_4g = g_malloc(sizeof(*ram_above_4g));
- memory_region_init_alias(ram_above_4g, "ram-above-4g", ram,
- below_4g_mem_size, above_4g_mem_size);
- memory_region_add_subregion(system_memory, 0x100000000ULL,
- ram_above_4g);
- }
-
/* Initialize PC system firmware */
pc_system_firmware_init(rom_memory);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 2120dc6..cf22a25 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -84,7 +84,6 @@ static void pc_init1(MemoryRegion *system_memory,
BusState *idebus[MAX_IDE_BUS];
ISADevice *rtc_state;
ISADevice *floppy;
- MemoryRegion *ram_memory;
MemoryRegion *pci_memory;
MemoryRegion *rom_memory;
DeviceState *icc_bridge;
@@ -121,7 +120,7 @@ static void pc_init1(MemoryRegion *system_memory,
if (pci_enabled) {
pci_bus = i440fx_init(&piix3_devfn, &isa_bus, gsi,
system_memory, system_io, ram_size,
- &pci_memory, ram_memory);
+ &pci_memory);
} else {
pci_bus = NULL;
isa_bus = isa_bus_new(NULL, system_io);
@@ -140,7 +139,7 @@ static void pc_init1(MemoryRegion *system_memory,
fw_cfg = pc_memory_init(system_memory,
kernel_filename, kernel_cmdline, initrd_filename,
below_4g_mem_size, above_4g_mem_size,
- rom_memory, &ram_memory);
+ rom_memory);
}
if (kvm_irqchip_in_kernel()) {
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 7246265..9c9d577 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -109,6 +109,10 @@ struct I440FXPMCState {
MemoryRegion smram_region;
uint8_t smm_enabled;
ram_addr_t ram_size;
+ MemoryRegion ram;
+ MemoryRegion ram_below_4g;
+ MemoryRegion ram_above_4g;
+
};
#define TYPE_I440FX_DEVICE "i440FX"
@@ -288,18 +292,39 @@ static int i440fx_pmc_initfn(PCIDevice *dev)
{
I440FXPMCState *d = I440FX_PMC_DEVICE(dev);
ram_addr_t ram_size;
+ hwaddr below_4g_mem_size, above_4g_mem_size;
hwaddr pci_hole_start, pci_hole_size;
hwaddr pci_hole64_start, pci_hole64_size;
int i;
g_assert(d->system_memory != NULL);
- g_assert(d->ram_memory != NULL);
if(d->ram_size > I440FX_PMC_PCI_HOLE) {
- pci_hole_start = I440FX_PMC_PCI_HOLE;
+ below_4g_mem_size = I440FX_PMC_PCI_HOLE;
+ above_4g_mem_size = d->ram_size - I440FX_PMC_PCI_HOLE;
} else {
- pci_hole_start = d->ram_size;
+ below_4g_mem_size = d->ram_size;
+ above_4g_mem_size = 0;
}
+
+ /* Allocate RAM. We allocate it as a single memory region and use
+ * aliases to address portions of it, mostly for backwards compatibility
+ * with older qemus that used qemu_ram_alloc().
+ */
+ memory_region_init_ram(&d->ram, "pc.ram",
+ below_4g_mem_size + above_4g_mem_size);
+ vmstate_register_ram_global(&d->ram);
+ memory_region_init_alias(&d->ram_below_4g, "ram-below-4g", &d->ram,
+ 0, below_4g_mem_size);
+ memory_region_add_subregion(d->system_memory, 0, &d->ram_below_4g);
+ if (above_4g_mem_size > 0) {
+ memory_region_init_alias(&d->ram_above_4g, "ram-above-4g", &d->ram,
+ below_4g_mem_size, above_4g_mem_size);
+ memory_region_add_subregion(d->system_memory, I440FX_PMC_PCI_HOLE_END,
+ &d->ram_above_4g);
+ }
+
+ pci_hole_start = below_4g_mem_size;
pci_hole_size = I440FX_PMC_PCI_HOLE_END - pci_hole_start;
pci_hole64_start = I440FX_PMC_PCI_HOLE_END + d->ram_size - pci_hole_start;
@@ -354,8 +379,7 @@ static PCIBus *i440fx_common_init(const char *device_name,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- MemoryRegion **pci_address_space,
- MemoryRegion *ram_memory)
+ MemoryRegion **pci_address_space)
{
PCIHostState *s;
PIIX3State *piix3;
@@ -373,7 +397,6 @@ static PCIBus *i440fx_common_init(const char *device_name,
f = &i440fx->pmc;
f->ram_size = ram_size;
f->system_memory = address_space_mem;
- f->ram_memory = ram_memory;
object_property_add_child(qdev_get_machine(), "i440fx",
OBJECT(i440fx), NULL);
@@ -392,7 +415,7 @@ PCIBus *i440fx_init(int *piix3_devfn,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- MemoryRegion **pci_memory, MemoryRegion *ram_memory)
+ MemoryRegion **pci_memory)
{
PCIBus *b;
@@ -400,7 +423,7 @@ PCIBus *i440fx_init(int *piix3_devfn,
b = i440fx_common_init(TYPE_I440FX_PMC_DEVICE,
piix3_devfn, isa_bus, pic,
address_space_mem, address_space_io, ram_size,
- pci_memory, ram_memory);
+ pci_memory);
return b;
}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index c733e68..202d107 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -87,8 +87,7 @@ void *pc_memory_init(MemoryRegion *system_memory,
const char *initrd_filename,
ram_addr_t below_4g_mem_size,
ram_addr_t above_4g_mem_size,
- MemoryRegion *rom_memory,
- MemoryRegion **ram_memory);
+ MemoryRegion *rom_memory);
qemu_irq *pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
@@ -127,8 +126,7 @@ PCIBus *i440fx_init(int *piix_devfn,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
- MemoryRegion **pci_memory,
- MemoryRegion *ram_memory);
+ MemoryRegion **pci_memory);
/* piix4.c */
extern PCIDevice *piix4_dev;
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [RFC PATCH v1 20/20] q35-mch: move ram initialization into q35-mch
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
` (18 preceding siblings ...)
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 19/20] i440fx-pmc: move ram initialization into i440fx-pmc Hu Tao
@ 2013-05-22 5:33 ` Hu Tao
19 siblings, 0 replies; 22+ messages in thread
From: Hu Tao @ 2013-05-22 5:33 UTC (permalink / raw)
To: qemu-devel
Cc: Vasilis Liaskovitis, Jan Kiszka, Anthony Liguori,
Andreas Färber, Wanpeng Li
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
hw/i386/pc_q35.c | 7 ++-----
hw/pci-host/q35.c | 36 +++++++++++++++++++++++++++++++-----
include/hw/pci-host/q35.h | 9 +++++++--
3 files changed, 40 insertions(+), 12 deletions(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index a6d1eae..32c882e 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -65,7 +65,6 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
ISADevice *rtc_state;
ISADevice *floppy;
MemoryRegion *rom_memory;
- MemoryRegion *ram_memory;
GSIState *gsi_state;
ISABus *isa_bus;
int pci_enabled = 1;
@@ -108,7 +107,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
if (!xen_enabled()) {
pc_memory_init(get_system_memory(), kernel_filename, kernel_cmdline,
initrd_filename, below_4g_mem_size, above_4g_mem_size,
- rom_memory, &ram_memory);
+ rom_memory);
}
/* irq lines */
@@ -121,11 +120,9 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
}
- q35_host->mch.ram_memory = ram_memory;
+ q35_host->mch.ram_size = ram_size;
q35_host->mch.system_memory = get_system_memory();
q35_host->mch.address_space_io = get_system_io();
- q35_host->mch.below_4g_mem_size = below_4g_mem_size;
- q35_host->mch.above_4g_mem_size = above_4g_mem_size;
/* pci */
qdev_init_nofail(DEVICE(q35_host));
host_bus = q35_host->host.pci.bus;
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index c57ab06..dddfc3c 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -243,24 +243,50 @@ static int mch_init(PCIDevice *d)
{
int i;
hwaddr pci_hole64_size;
+ hwaddr below_4g_mem_size, above_4g_mem_size;
MCHPCIState *mch = MCH_PCI_DEVICE(d);
+ if(mch->ram_size > MCH_PCI_HOLE) {
+ below_4g_mem_size = MCH_PCI_HOLE;
+ above_4g_mem_size = mch->ram_size - MCH_PCI_HOLE;
+ } else {
+ below_4g_mem_size = mch->ram_size;
+ above_4g_mem_size = 0;
+ }
+
+ /* Allocate RAM. We allocate it as a single memory region and use
+ * aliases to address portions of it, mostly for backwards compatibility
+ * with older qemus that used qemu_ram_alloc().
+ */
+ memory_region_init_ram(&mch->ram, "pc.ram",
+ below_4g_mem_size + above_4g_mem_size);
+ vmstate_register_ram_global(&mch->ram);
+ memory_region_init_alias(&mch->ram_below_4g, "ram-below-4g", &mch->ram,
+ 0, below_4g_mem_size);
+ memory_region_add_subregion(mch->system_memory, 0, &mch->ram_below_4g);
+ if (above_4g_mem_size > 0) {
+ memory_region_init_alias(&mch->ram_above_4g, "ram-above-4g", &mch->ram,
+ below_4g_mem_size, above_4g_mem_size);
+ memory_region_add_subregion(mch->system_memory, MCH_PCI_HOLE_END,
+ &mch->ram_above_4g);
+ }
+
/* setup pci memory regions */
memory_region_init_alias(&mch->pci_hole, "pci-hole",
mch->pci_address_space,
- mch->below_4g_mem_size,
- 0x100000000ULL - mch->below_4g_mem_size);
- memory_region_add_subregion(mch->system_memory, mch->below_4g_mem_size,
+ below_4g_mem_size,
+ 0x100000000ULL - below_4g_mem_size);
+ memory_region_add_subregion(mch->system_memory, below_4g_mem_size,
&mch->pci_hole);
pci_hole64_size = (sizeof(hwaddr) == 4 ? 0 :
((uint64_t)1 << 62));
memory_region_init_alias(&mch->pci_hole_64bit, "pci-hole64",
mch->pci_address_space,
- 0x100000000ULL + mch->above_4g_mem_size,
+ 0x100000000ULL + above_4g_mem_size,
pci_hole64_size);
if (pci_hole64_size) {
memory_region_add_subregion(mch->system_memory,
- 0x100000000ULL + mch->above_4g_mem_size,
+ 0x100000000ULL + above_4g_mem_size,
&mch->pci_hole_64bit);
}
/* smram */
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index 1c02420..1e985b4 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -53,8 +53,10 @@ typedef struct MCHPCIState {
MemoryRegion pci_hole;
MemoryRegion pci_hole_64bit;
uint8_t smm_enabled;
- ram_addr_t below_4g_mem_size;
- ram_addr_t above_4g_mem_size;
+ ram_addr_t ram_size;
+ MemoryRegion ram;
+ MemoryRegion ram_below_4g;
+ MemoryRegion ram_above_4g;
} MCHPCIState;
typedef struct Q35PCIHost {
@@ -147,4 +149,7 @@ typedef struct Q35PCIHost {
#define MCH_PCIE_DEV 1
#define MCH_PCIE_FUNC 0
+#define MCH_PCI_HOLE 0xB0000000ULL
+#define MCH_PCI_HOLE_END 0x100000000ULL
+
#endif /* HW_Q35_H */
--
1.8.2.3
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] [Qemu-trivial] [RFC PATCH v1 08/20] rtc: remove rtc_set_date
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 08/20] rtc: remove rtc_set_date Hu Tao
@ 2013-05-27 19:41 ` Michael Tokarev
0 siblings, 0 replies; 22+ messages in thread
From: Michael Tokarev @ 2013-05-27 19:41 UTC (permalink / raw)
To: Hu Tao
Cc: Anthony Liguori, qemu-trivial, Jan Kiszka, qemu-devel,
Vasilis Liaskovitis, Andreas Färber
22.05.2013 09:33, Hu Tao wrote:
> Since it's not defined and used anywhere.
Thanks, applied to the trivial-patches queue.
If the need arises to bring it back, it can be done
together with the implementation and some users :)
/mjt
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2013-05-27 19:42 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-05-22 5:33 [Qemu-devel] [RFC PATCH v1 00/20] Refactor PC machine to take advantage of QOM Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 01/20] i440fx: remove unused parameter i440fx_state of i440fx_init Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 02/20] i440fx: rename i440FX to i440FX-PMC Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 03/20] i440fx: rename i440FX-pcihost to i440FX Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 04/20] i440fx: prepare for composition Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 05/20] piix3: make PIIX3-xen a subclass of PIIX3 Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 06/20] piix3: prepare for composition Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 07/20] piix3: create piix3 through composition Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 08/20] rtc: remove rtc_set_date Hu Tao
2013-05-27 19:41 ` [Qemu-devel] [Qemu-trivial] " Michael Tokarev
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 09/20] ich9: function rename Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 10/20] piix3, ich9: create the HPET through composition Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 11/20] add rtc_set_irq Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 12/20] piix3, ich9: create the RTC through composition Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 13/20] piix3, ich9: create pit " Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 14/20] piix3, ich9: create pc speaker " Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 15/20] i440fx pmc: create pmc through comosition Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 16/20] i440fx-pmc: calculate PCI memory hole directly Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 17/20] i440fx-pmc: create pci address space Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 18/20] q35-mch: " Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 19/20] i440fx-pmc: move ram initialization into i440fx-pmc Hu Tao
2013-05-22 5:33 ` [Qemu-devel] [RFC PATCH v1 20/20] q35-mch: move ram initialization into q35-mch Hu Tao
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