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From: Stefan Brankovic <stefan.brankovic@rt-rk.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: david@gibson.dropbear.id.au
Subject: Re: [Qemu-devel] [PATCH 8/8] target/ppc: Refactor emulation of vmrgew and vmrgow instructions
Date: Mon, 17 Jun 2019 13:43:52 +0200	[thread overview]
Message-ID: <5eb76d01-ecf6-b915-5c8b-92de38b64cc0@rt-rk.com> (raw)
In-Reply-To: <7879c550-f333-7703-e47f-ca734ad47bf7@linaro.org>


On 6.6.19. 22:43, Richard Henderson wrote:
> On 6/6/19 5:15 AM, Stefan Brankovic wrote:
>> +/*
>> + * We use this macro if one instruction is realized with direct
>> + * translation, and second one with helper.
>> + */
>> +#define GEN_VXFORM_TRANS_DUAL(name0, flg0, flg2_0, name1, flg1, flg2_1)\
>> +static void glue(gen_, name0##_##name1)(DisasContext *ctx)             \
>> +{                                                                      \
>> +    if ((Rc(ctx->opcode) == 0) &&                                      \
>> +        ((ctx->insns_flags & flg0) || (ctx->insns_flags2 & flg2_0))) { \
>> +        trans_##name0(ctx);                                            \
>> +    } else if ((Rc(ctx->opcode) == 1) &&                               \
>> +        ((ctx->insns_flags & flg1) || (ctx->insns_flags2 & flg2_1))) { \
>> +        gen_##name1(ctx);                                              \
>> +    } else {                                                           \
>> +        gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL);            \
>> +    }                                                                  \
>> +}
>> +
>>   /* Adds support to provide invalid mask */
>>   #define GEN_VXFORM_DUAL_EXT(name0, flg0, flg2_0, inval0,                \
>>                               name1, flg1, flg2_1, inval1)                \
>> @@ -431,20 +449,13 @@ GEN_VXFORM(vmrglb, 6, 4);
>>   GEN_VXFORM(vmrglh, 6, 5);
>>   GEN_VXFORM(vmrglw, 6, 6);
>>   
>> -static void gen_vmrgew(DisasContext *ctx)
>> +static void trans_vmrgew(DisasContext *ctx)
>>   {
>> -    TCGv_i64 tmp;
>> -    TCGv_i64 avr;
>> -    int VT, VA, VB;
>> -    if (unlikely(!ctx->altivec_enabled)) {
>> -        gen_exception(ctx, POWERPC_EXCP_VPU);
>> -        return;
>> -    }
> This appears to drop the check for altivec_enabled.
>
Thank you for spotting this, I will fix this bug in v2.

Kind Regards,

Stefan

> r~


  reply	other threads:[~2019-06-17 12:09 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-06 10:15 [Qemu-devel] [PATCH 0/8] Optimize emulation of ten Altivec instructions: lvsl, Stefan Brankovic
2019-06-06 10:15 ` [Qemu-devel] [PATCH 1/8] target/ppc: Optimize emulation of lvsl and lvsr instructions Stefan Brankovic
2019-06-06 16:46   ` Richard Henderson
2019-06-17 11:31     ` Stefan Brankovic
2019-06-06 10:15 ` [Qemu-devel] [PATCH 2/8] target/ppc: Optimize emulation of vsl and vsr instructions Stefan Brankovic
2019-06-06 17:03   ` Richard Henderson
2019-06-17 11:36     ` Stefan Brankovic
2019-06-06 10:15 ` [Qemu-devel] [PATCH 3/8] target/ppc: Optimize emulation of vpkpx instruction Stefan Brankovic
2019-06-06 10:15 ` [Qemu-devel] [PATCH 4/8] target/ppc: Optimize emulation of vgbbd instruction Stefan Brankovic
2019-06-06 18:19   ` Richard Henderson
2019-06-17 11:58     ` Stefan Brankovic
2019-06-06 10:15 ` [Qemu-devel] [PATCH 5/8] target/ppc: Optimize emulation of vclzd instruction Stefan Brankovic
2019-06-06 18:26   ` Richard Henderson
2019-06-06 10:15 ` [Qemu-devel] [PATCH 6/8] target/ppc: Optimize emulation of vclzw instruction Stefan Brankovic
2019-06-06 18:34   ` Richard Henderson
2019-06-17 11:50     ` Stefan Brankovic
2019-06-06 10:15 ` [Qemu-devel] [PATCH 7/8] target/ppc: Optimize emulation of vclzh and vclzb instructions Stefan Brankovic
2019-06-06 20:38   ` Richard Henderson
2019-06-17 11:42     ` Stefan Brankovic
2019-06-06 10:15 ` [Qemu-devel] [PATCH 8/8] target/ppc: Refactor emulation of vmrgew and vmrgow instructions Stefan Brankovic
2019-06-06 20:43   ` Richard Henderson
2019-06-17 11:43     ` Stefan Brankovic [this message]
2019-06-06 17:13 ` [Qemu-devel] [PATCH 0/8] Optimize emulation of ten Altivec instructions: lvsl, Richard Henderson
2019-06-12  7:31   ` [Qemu-devel] ?==?utf-8?q? ?==?utf-8?q? [PATCH 0/8] Optimize emulation of ten Altivec instructions:?==?utf-8?q? lvsl, Stefan Brankovic
2019-06-17 11:32   ` [Qemu-devel] [PATCH 0/8] Optimize emulation of ten Altivec instructions: lvsl, Stefan Brankovic
2019-06-07  3:51 ` Howard Spoelstra
2019-06-19 11:03 [Qemu-devel] [PATCH 0/8] target/ppc: Optimize emulation of some Altivec instructions Stefan Brankovic
2019-06-19 11:03 ` [Qemu-devel] [PATCH 8/8] target/ppc: Refactor emulation of vmrgew and vmrgow instructions Stefan Brankovic

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