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From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: "Jason Wang" <jasowang@redhat.com>,
	"Riku Voipio" <riku.voipio@iki.fi>,
	groug@kaod.org, "Laurent Vivier" <laurent@vivier.eu>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	philmd@redhat.com
Subject: Re: [PATCH v4 07/19] spapr: Formalize notion of active interrupt controller
Date: Wed, 9 Oct 2019 11:16:43 +0200	[thread overview]
Message-ID: <68ad60ba-997e-8ed9-f953-52595bd2dd53@kaod.org> (raw)
In-Reply-To: <20191009060818.29719-8-david@gibson.dropbear.id.au>

On 09/10/2019 08:08, David Gibson wrote:
> spapr now has the mechanism of constructing both XICS and XIVE instances of
> the SpaprInterruptController interface.  However, only one of the interrupt
> controllers will actually be active at any given time, depending on feature
> negotiation with the guest.  This is handled in the current code via
> spapr_irq_current() which checks the OV5 vector from feature negotiation to
> determine the current backend.
> 
> Determining the active controller at the point we need it like this
> can be pretty confusing, because it makes it very non obvious at what
> points the active controller can change.  This can make it difficult
> to reason about the code and where a change of active controller could
> appear in sequence with other events.
> 
> Make this mechanism more explicit by adding an 'active_intc' pointer
> and an explicit spapr_irq_update_active_intc() function to update it
> from the CAS state.  We also add hooks on the intc backend which will
> get called when it is activated or deactivated.
> 
> For now we just introduce the switch and hooks, later patches will
> actually start using them.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> Reviewed-by: Greg Kurz <groug@kaod.org>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

> ---
>  hw/ppc/spapr_irq.c         | 51 ++++++++++++++++++++++++++++++++++++++
>  include/hw/ppc/spapr.h     |  5 ++--
>  include/hw/ppc/spapr_irq.h |  5 ++++
>  3 files changed, 59 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
> index 83882cfad3..249a2688ac 100644
> --- a/hw/ppc/spapr_irq.c
> +++ b/hw/ppc/spapr_irq.c
> @@ -586,6 +586,7 @@ qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq)
>  
>  int spapr_irq_post_load(SpaprMachineState *spapr, int version_id)
>  {
> +    spapr_irq_update_active_intc(spapr);
>      return spapr->irq->post_load(spapr, version_id);
>  }
>  
> @@ -593,6 +594,8 @@ void spapr_irq_reset(SpaprMachineState *spapr, Error **errp)
>  {
>      assert(!spapr->irq_map || bitmap_empty(spapr->irq_map, spapr->irq_map_nr));
>  
> +    spapr_irq_update_active_intc(spapr);
> +
>      if (spapr->irq->reset) {
>          spapr->irq->reset(spapr, errp);
>      }
> @@ -619,6 +622,54 @@ int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp)
>      return phandle;
>  }
>  
> +static void set_active_intc(SpaprMachineState *spapr,
> +                            SpaprInterruptController *new_intc)
> +{
> +    SpaprInterruptControllerClass *sicc;
> +
> +    assert(new_intc);
> +
> +    if (new_intc == spapr->active_intc) {
> +        /* Nothing to do */
> +        return;
> +    }
> +
> +    if (spapr->active_intc) {
> +        sicc = SPAPR_INTC_GET_CLASS(spapr->active_intc);
> +        if (sicc->deactivate) {
> +            sicc->deactivate(spapr->active_intc);
> +        }
> +    }
> +
> +    sicc = SPAPR_INTC_GET_CLASS(new_intc);
> +    if (sicc->activate) {
> +        sicc->activate(new_intc, &error_fatal);
> +    }
> +
> +    spapr->active_intc = new_intc;
> +}
> +
> +void spapr_irq_update_active_intc(SpaprMachineState *spapr)
> +{
> +    SpaprInterruptController *new_intc;
> +
> +    if (!spapr->ics) {
> +        /*
> +         * XXX before we run CAS, ov5_cas is initialized empty, which
> +         * indicates XICS, even if we have ic-mode=xive.  TODO: clean
> +         * up the CAS path so that we have a clearer way of handling
> +         * this.
> +         */
> +        new_intc = SPAPR_INTC(spapr->xive);
> +    } else if (spapr_ovec_test(spapr->ov5_cas, OV5_XIVE_EXPLOIT)) {
> +        new_intc = SPAPR_INTC(spapr->xive);
> +    } else {
> +        new_intc = SPAPR_INTC(spapr->ics);
> +    }
> +
> +    set_active_intc(spapr, new_intc);
> +}
> +
>  /*
>   * XICS legacy routines - to deprecate one day
>   */
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index cbd1a4c9f3..763da757f0 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -143,7 +143,6 @@ struct SpaprMachineState {
>      struct SpaprVioBus *vio_bus;
>      QLIST_HEAD(, SpaprPhbState) phbs;
>      struct SpaprNvram *nvram;
> -    ICSState *ics;
>      SpaprRtcState rtc;
>  
>      SpaprResizeHpt resize_hpt;
> @@ -195,9 +194,11 @@ struct SpaprMachineState {
>  
>      int32_t irq_map_nr;
>      unsigned long *irq_map;
> -    SpaprXive  *xive;
>      SpaprIrq *irq;
>      qemu_irq *qirqs;
> +    SpaprInterruptController *active_intc;
> +    ICSState *ics;
> +    SpaprXive *xive;
>  
>      bool cmd_line_caps[SPAPR_CAP_NUM];
>      SpaprCapabilities def, eff, mig;
> diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
> index adfef0fcbe..593059eff5 100644
> --- a/include/hw/ppc/spapr_irq.h
> +++ b/include/hw/ppc/spapr_irq.h
> @@ -44,6 +44,9 @@ typedef struct SpaprInterruptController SpaprInterruptController;
>  typedef struct SpaprInterruptControllerClass {
>      InterfaceClass parent;
>  
> +    int (*activate)(SpaprInterruptController *intc, Error **errp);
> +    void (*deactivate)(SpaprInterruptController *intc);
> +
>      /*
>       * These methods will typically be called on all intcs, active and
>       * inactive
> @@ -55,6 +58,8 @@ typedef struct SpaprInterruptControllerClass {
>      void (*free_irq)(SpaprInterruptController *intc, int irq);
>  } SpaprInterruptControllerClass;
>  
> +void spapr_irq_update_active_intc(SpaprMachineState *spapr);
> +
>  int spapr_irq_cpu_intc_create(SpaprMachineState *spapr,
>                                PowerPCCPU *cpu, Error **errp);
>  
> 



  reply	other threads:[~2019-10-09 17:03 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-09  6:07 [PATCH v4 00/19] spapr: IRQ subsystem cleanup David Gibson
2019-10-09  6:08 ` [PATCH v4 01/19] xive: Make some device types not user creatable David Gibson
2019-10-09  6:08 ` [PATCH v4 02/19] xics: " David Gibson
2019-10-09  6:08 ` [PATCH v4 03/19] target/ppc: Fix for optimized vsl/vsr instructions David Gibson
2019-10-09  6:08 ` [PATCH v4 04/19] spapr, xics, xive: Introduce SpaprInterruptController QOM interface David Gibson
2019-10-09  6:08 ` [PATCH v4 05/19] spapr, xics, xive: Move cpu_intc_create from SpaprIrq to SpaprInterruptController David Gibson
2019-10-09  6:08 ` [PATCH v4 06/19] spapr, xics, xive: Move irq claim and free " David Gibson
2019-10-09  6:08 ` [PATCH v4 07/19] spapr: Formalize notion of active interrupt controller David Gibson
2019-10-09  9:16   ` Cédric Le Goater [this message]
2019-10-09  9:19   ` Cédric Le Goater
2019-10-09 11:38     ` David Gibson
2019-10-09  6:08 ` [PATCH v4 08/19] spapr, xics, xive: Move set_irq from SpaprIrq to SpaprInterruptController David Gibson
2019-10-09  9:18   ` Cédric Le Goater
2019-10-09  6:08 ` [PATCH v4 09/19] spapr, xics, xive: Move print_info " David Gibson
2019-10-09  9:19   ` Cédric Le Goater
2019-10-09  6:08 ` [PATCH v4 10/19] spapr, xics, xive: Move dt_populate " David Gibson
2019-10-09  9:20   ` Cédric Le Goater
2019-10-09  6:08 ` [PATCH v4 11/19] spapr, xics, xive: Match signatures for XICS and XIVE KVM connect routines David Gibson
2019-10-09  6:08 ` [PATCH v4 12/19] spapr: Remove SpaprIrq::init_kvm hook David Gibson
2019-10-09  6:08 ` [PATCH v4 13/19] spapr, xics, xive: Move SpaprIrq::reset hook logic into activate/deactivate David Gibson
2019-10-09 14:25   ` Greg Kurz
2019-10-09 15:56     ` Cédric Le Goater
2019-10-09 15:56   ` Cédric Le Goater
2019-10-09  6:08 ` [PATCH v4 14/19] spapr, xics, xive: Move SpaprIrq::post_load hook to backends David Gibson
2019-10-09 15:57   ` Cédric Le Goater
2019-10-09  6:08 ` [PATCH v4 15/19] spapr: Remove SpaprIrq::nr_msis David Gibson
2019-10-09 15:59   ` Cédric Le Goater
2019-10-10  1:56     ` David Gibson
2019-10-09  6:08 ` [PATCH v4 16/19] spapr: Move SpaprIrq::nr_xirqs to SpaprMachineClass David Gibson
2019-10-09 16:01   ` Cédric Le Goater
2019-10-09  6:08 ` [PATCH v4 17/19] spapr: Remove last pieces of SpaprIrq David Gibson
2019-10-09 16:44   ` Cédric Le Goater
2019-10-10  1:59     ` David Gibson
2019-10-09 17:02   ` Greg Kurz
2019-10-10  2:02     ` David Gibson
2019-10-10  6:29       ` Greg Kurz
2019-10-10 20:33         ` Greg Kurz
2019-10-11  5:07           ` David Gibson
2019-10-11  6:13             ` Greg Kurz
2019-10-11  8:33               ` Greg Kurz
2019-10-12  0:00               ` David Gibson
2019-10-14  9:15                 ` Greg Kurz
2019-11-20  5:38                   ` David Gibson
2019-11-20  8:36                     ` Greg Kurz
2019-10-09  6:08 ` [PATCH v4 18/19] spapr: Handle irq backend changes with VFIO PCI devices David Gibson
2019-10-09  8:57   ` David Gibson
2019-10-09  6:08 ` [PATCH v4 19/19] spapr: Work around spurious warnings from vfio INTx initialization David Gibson
2019-10-09  8:37   ` Greg Kurz
2019-10-09  8:52     ` David Gibson
2019-10-09 17:16       ` Greg Kurz
2019-10-10  2:02         ` David Gibson
2019-10-09  9:02 ` [PATCH v4 00/19] spapr: IRQ subsystem cleanup David Gibson
2019-10-16 16:04 ` Greg Kurz
2019-10-17  0:26   ` David Gibson

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