From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Kumar Gala <kumar.gala@linaro.org>,
Kevin Townsend <kevin.townsend@linaro.org>
Subject: Re: [PATCH 2/3] hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping
Date: Tue, 13 Apr 2021 18:30:46 +0200 [thread overview]
Message-ID: <6979704a-842b-0691-f02d-c921ed00b730@amsat.org> (raw)
In-Reply-To: <20210412134317.12501-3-peter.maydell@linaro.org>
On 4/12/21 3:43 PM, Peter Maydell wrote:
> On some boards, SCC config register CFG0 bit 0 controls whether
> parts of the board memory map are remapped. Support this with:
> * a device property scc-cfg0 so the board can specify the
> initial value of the CFG0 register
> * an outbound GPIO line which tracks bit 0 and which the board
> can wire up to provide the remapping
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> include/hw/misc/mps2-scc.h | 9 +++++++++
> hw/misc/mps2-scc.c | 13 ++++++++++---
> 2 files changed, 19 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
next prev parent reply other threads:[~2021-04-13 16:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-12 13:43 [PATCH 0/3] mps3-an524: support memory remapping Peter Maydell
2021-04-12 13:43 ` [PATCH 1/3] hw/misc/mps2-scc: Add "QEMU interface" comment Peter Maydell
2021-04-12 13:43 ` [PATCH 2/3] hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping Peter Maydell
2021-04-13 16:30 ` Philippe Mathieu-Daudé [this message]
2021-04-12 13:43 ` [PATCH 3/3] hw/arm/mps2-tz: Implement AN524 memory remapping via machine property Peter Maydell
2021-04-13 16:51 ` Philippe Mathieu-Daudé
2021-04-12 14:37 ` [PATCH 0/3] mps3-an524: support memory remapping Philippe Mathieu-Daudé
2021-04-12 14:48 ` Peter Maydell
2021-04-13 16:29 ` Philippe Mathieu-Daudé
2021-04-13 16:33 ` Philippe Mathieu-Daudé
2021-04-12 18:39 ` Richard Henderson
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