* [PATCH 0/2] virtio-gpu: Shared memory capability
@ 2021-11-10 16:42 Antonio Caggiano
2021-11-10 16:42 ` [PATCH 1/2] virtio-gpu: hostmem Antonio Caggiano
2021-11-10 16:42 ` [PATCH 2/2] virtio: Add shared memory capability Antonio Caggiano
0 siblings, 2 replies; 6+ messages in thread
From: Antonio Caggiano @ 2021-11-10 16:42 UTC (permalink / raw)
To: qemu-devel
Previously RFC [0] part of [0], now a patch series on its own.
This patch series cherry picks two commits from [1] and applies one fix
according to [2], which should answer Gerd's comment [3] on previous
patch.
[0] https://www.mail-archive.com/qemu-devel@nongnu.org/msg840405.html
[1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg826897.html
[2] https://gitlab.freedesktop.org/virgl/qemu/-/commits/virtio-gpu-next/
[3] https://github.com/torvalds/linux/commit/0dd4ff93f4c8dba016ad79384007da4938cd54a1
[4] https://www.mail-archive.com/qemu-devel@nongnu.org/msg827306.html
Dr. David Alan Gilbert (1):
virtio: Add shared memory capability
Gerd Hoffmann (1):
virtio-gpu: hostmem
hw/display/virtio-gpu-pci.c | 14 ++++++++++++++
hw/display/virtio-gpu.c | 1 +
hw/display/virtio-vga.c | 32 +++++++++++++++++++++++---------
hw/virtio/virtio-pci.c | 19 +++++++++++++++++++
hw/virtio/virtio-pci.h | 4 ++++
include/hw/virtio/virtio-gpu.h | 5 +++++
6 files changed, 66 insertions(+), 9 deletions(-)
--
2.32.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] virtio-gpu: hostmem
2021-11-10 16:42 [PATCH 0/2] virtio-gpu: Shared memory capability Antonio Caggiano
@ 2021-11-10 16:42 ` Antonio Caggiano
2022-01-06 9:41 ` Michael S. Tsirkin
2021-11-10 16:42 ` [PATCH 2/2] virtio: Add shared memory capability Antonio Caggiano
1 sibling, 1 reply; 6+ messages in thread
From: Antonio Caggiano @ 2021-11-10 16:42 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann, Michael S. Tsirkin
From: Gerd Hoffmann <kraxel@redhat.com>
Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu.
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
---
hw/display/virtio-gpu-pci.c | 14 ++++++++++++++
hw/display/virtio-gpu.c | 1 +
hw/display/virtio-vga.c | 32 +++++++++++++++++++++++---------
include/hw/virtio/virtio-gpu.h | 5 +++++
4 files changed, 43 insertions(+), 9 deletions(-)
diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c
index e36eee0c40..a79bd751b2 100644
--- a/hw/display/virtio-gpu-pci.c
+++ b/hw/display/virtio-gpu-pci.c
@@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
DeviceState *vdev = DEVICE(g);
int i;
+ if (virtio_gpu_hostmem_enabled(g->conf)) {
+ vpci_dev->msix_bar_idx = 1;
+ vpci_dev->modern_mem_bar_idx = 2;
+ memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
+ g->conf.hostmem);
+ pci_register_bar(&vpci_dev->pci_dev, 4,
+ PCI_BASE_ADDRESS_SPACE_MEMORY |
+ PCI_BASE_ADDRESS_MEM_PREFETCH |
+ PCI_BASE_ADDRESS_MEM_TYPE_64,
+ &g->hostmem);
+ virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
+ }
+
+ qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp);
virtio_pci_force_virtio_1(vpci_dev);
if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
return;
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index d78b9700c7..1cfcb81c1b 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -1418,6 +1418,7 @@ static Property virtio_gpu_properties[] = {
256 * MiB),
DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags,
VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
+ DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c
index 9e57f61e9e..ca841a0799 100644
--- a/hw/display/virtio-vga.c
+++ b/hw/display/virtio-vga.c
@@ -125,16 +125,30 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
pci_register_bar(&vpci_dev->pci_dev, 0,
PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
- /*
- * Configure virtio bar and regions
- *
- * We use bar #2 for the mmio regions, to be compatible with stdvga.
- * virtio regions are moved to the end of bar #2, to make room for
- * the stdvga mmio registers at the start of bar #2.
- */
- vpci_dev->modern_mem_bar_idx = 2;
- vpci_dev->msix_bar_idx = 4;
vpci_dev->modern_io_bar_idx = 5;
+
+ if (!virtio_gpu_hostmem_enabled(g->conf)) {
+ /*
+ * Configure virtio bar and regions
+ *
+ * We use bar #2 for the mmio regions, to be compatible with stdvga.
+ * virtio regions are moved to the end of bar #2, to make room for
+ * the stdvga mmio registers at the start of bar #2.
+ */
+ vpci_dev->modern_mem_bar_idx = 2;
+ vpci_dev->msix_bar_idx = 4;
+ } else {
+ vpci_dev->msix_bar_idx = 1;
+ vpci_dev->modern_mem_bar_idx = 2;
+ memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
+ g->conf.hostmem);
+ pci_register_bar(&vpci_dev->pci_dev, 4,
+ PCI_BASE_ADDRESS_SPACE_MEMORY |
+ PCI_BASE_ADDRESS_MEM_PREFETCH |
+ PCI_BASE_ADDRESS_MEM_TYPE_64,
+ &g->hostmem);
+ virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
+ }
if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
/*
diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
index acfba7c76c..3963cb4f86 100644
--- a/include/hw/virtio/virtio-gpu.h
+++ b/include/hw/virtio/virtio-gpu.h
@@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags {
(_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED))
#define virtio_gpu_blob_enabled(_cfg) \
(_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED))
+#define virtio_gpu_hostmem_enabled(_cfg) \
+ (_cfg.hostmem > 0)
struct virtio_gpu_base_conf {
uint32_t max_outputs;
uint32_t flags;
uint32_t xres;
uint32_t yres;
+ uint64_t hostmem;
};
struct virtio_gpu_ctrl_command {
@@ -131,6 +134,8 @@ struct VirtIOGPUBase {
int renderer_blocked;
int enable;
+ MemoryRegion hostmem;
+
struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
int enabled_output_bitmask;
--
2.32.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] virtio: Add shared memory capability
2021-11-10 16:42 [PATCH 0/2] virtio-gpu: Shared memory capability Antonio Caggiano
2021-11-10 16:42 ` [PATCH 1/2] virtio-gpu: hostmem Antonio Caggiano
@ 2021-11-10 16:42 ` Antonio Caggiano
2022-01-06 9:48 ` Michael S. Tsirkin
1 sibling, 1 reply; 6+ messages in thread
From: Antonio Caggiano @ 2021-11-10 16:42 UTC (permalink / raw)
To: qemu-devel; +Cc: Dr. David Alan Gilbert, Michael S. Tsirkin
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG'
and the data structure 'virtio_pci_shm_cap' to go with it.
They allow defining shared memory regions with sizes and offsets
of 2^32 and more.
Multiple instances of the capability are allowed and distinguished
by a device-specific 'id'.
v2: Remove virtio_pci_shm_cap as virtio_pci_cap64 is used instead.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
(cherry picked from commit a5d628a3a3c5e60b98b15ffff197c36a77056115)
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
---
hw/virtio/virtio-pci.c | 19 +++++++++++++++++++
hw/virtio/virtio-pci.h | 4 ++++
2 files changed, 23 insertions(+)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 750aa47ec1..8152d3c1b3 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1162,6 +1162,25 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
return offset;
}
+int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
+ uint8_t bar, uint64_t offset, uint64_t length,
+ uint8_t id)
+{
+ struct virtio_pci_cap64 cap = {
+ .cap.cap_len = sizeof cap,
+ .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG,
+ };
+ uint32_t mask32 = ~0;
+
+ cap.cap.bar = bar;
+ cap.cap.length = cpu_to_le32(length & mask32);
+ cap.length_hi = cpu_to_le32((length >> 32) & mask32);
+ cap.cap.offset = cpu_to_le32(offset & mask32);
+ cap.offset_hi = cpu_to_le32((offset >> 32) & mask32);
+ cap.cap.id = id;
+ return virtio_pci_add_mem_cap(proxy, &cap.cap);
+}
+
static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
unsigned size)
{
diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h
index 2446dcd9ae..5e5c4a4c6d 100644
--- a/hw/virtio/virtio-pci.h
+++ b/hw/virtio/virtio-pci.h
@@ -252,4 +252,8 @@ void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t);
*/
unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues);
+int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
+ uint8_t bar, uint64_t offset, uint64_t length,
+ uint8_t id);
+
#endif
--
2.32.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] virtio-gpu: hostmem
2021-11-10 16:42 ` [PATCH 1/2] virtio-gpu: hostmem Antonio Caggiano
@ 2022-01-06 9:41 ` Michael S. Tsirkin
0 siblings, 0 replies; 6+ messages in thread
From: Michael S. Tsirkin @ 2022-01-06 9:41 UTC (permalink / raw)
To: Antonio Caggiano; +Cc: qemu-devel, Gerd Hoffmann
On Wed, Nov 10, 2021 at 05:42:19PM +0100, Antonio Caggiano wrote:
> From: Gerd Hoffmann <kraxel@redhat.com>
>
> Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu.
>
> Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
I guess Gerd can apply this as appropriate.
Acked-by: Michael S. Tsirkin <mst@redhat.com>
> ---
> hw/display/virtio-gpu-pci.c | 14 ++++++++++++++
> hw/display/virtio-gpu.c | 1 +
> hw/display/virtio-vga.c | 32 +++++++++++++++++++++++---------
> include/hw/virtio/virtio-gpu.h | 5 +++++
> 4 files changed, 43 insertions(+), 9 deletions(-)
>
> diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c
> index e36eee0c40..a79bd751b2 100644
> --- a/hw/display/virtio-gpu-pci.c
> +++ b/hw/display/virtio-gpu-pci.c
> @@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
> DeviceState *vdev = DEVICE(g);
> int i;
>
> + if (virtio_gpu_hostmem_enabled(g->conf)) {
> + vpci_dev->msix_bar_idx = 1;
> + vpci_dev->modern_mem_bar_idx = 2;
> + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
> + g->conf.hostmem);
> + pci_register_bar(&vpci_dev->pci_dev, 4,
> + PCI_BASE_ADDRESS_SPACE_MEMORY |
> + PCI_BASE_ADDRESS_MEM_PREFETCH |
> + PCI_BASE_ADDRESS_MEM_TYPE_64,
> + &g->hostmem);
> + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
> + }
> +
> + qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp);
> virtio_pci_force_virtio_1(vpci_dev);
> if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
> return;
> diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
> index d78b9700c7..1cfcb81c1b 100644
> --- a/hw/display/virtio-gpu.c
> +++ b/hw/display/virtio-gpu.c
> @@ -1418,6 +1418,7 @@ static Property virtio_gpu_properties[] = {
> 256 * MiB),
> DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags,
> VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
> + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c
> index 9e57f61e9e..ca841a0799 100644
> --- a/hw/display/virtio-vga.c
> +++ b/hw/display/virtio-vga.c
> @@ -125,16 +125,30 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
> pci_register_bar(&vpci_dev->pci_dev, 0,
> PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
>
> - /*
> - * Configure virtio bar and regions
> - *
> - * We use bar #2 for the mmio regions, to be compatible with stdvga.
> - * virtio regions are moved to the end of bar #2, to make room for
> - * the stdvga mmio registers at the start of bar #2.
> - */
> - vpci_dev->modern_mem_bar_idx = 2;
> - vpci_dev->msix_bar_idx = 4;
> vpci_dev->modern_io_bar_idx = 5;
> +
> + if (!virtio_gpu_hostmem_enabled(g->conf)) {
> + /*
> + * Configure virtio bar and regions
> + *
> + * We use bar #2 for the mmio regions, to be compatible with stdvga.
> + * virtio regions are moved to the end of bar #2, to make room for
> + * the stdvga mmio registers at the start of bar #2.
> + */
> + vpci_dev->modern_mem_bar_idx = 2;
> + vpci_dev->msix_bar_idx = 4;
> + } else {
> + vpci_dev->msix_bar_idx = 1;
> + vpci_dev->modern_mem_bar_idx = 2;
> + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
> + g->conf.hostmem);
> + pci_register_bar(&vpci_dev->pci_dev, 4,
> + PCI_BASE_ADDRESS_SPACE_MEMORY |
> + PCI_BASE_ADDRESS_MEM_PREFETCH |
> + PCI_BASE_ADDRESS_MEM_TYPE_64,
> + &g->hostmem);
> + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
> + }
>
> if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
> /*
> diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
> index acfba7c76c..3963cb4f86 100644
> --- a/include/hw/virtio/virtio-gpu.h
> +++ b/include/hw/virtio/virtio-gpu.h
> @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags {
> (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED))
> #define virtio_gpu_blob_enabled(_cfg) \
> (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED))
> +#define virtio_gpu_hostmem_enabled(_cfg) \
> + (_cfg.hostmem > 0)
>
Don't much like the lower-case macro here, but I guess it's
consistent with rest of the code.
> struct virtio_gpu_base_conf {
> uint32_t max_outputs;
> uint32_t flags;
> uint32_t xres;
> uint32_t yres;
> + uint64_t hostmem;
> };
>
> struct virtio_gpu_ctrl_command {
> @@ -131,6 +134,8 @@ struct VirtIOGPUBase {
> int renderer_blocked;
> int enable;
>
> + MemoryRegion hostmem;
> +
> struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
>
> int enabled_output_bitmask;
> --
> 2.32.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] virtio: Add shared memory capability
2021-11-10 16:42 ` [PATCH 2/2] virtio: Add shared memory capability Antonio Caggiano
@ 2022-01-06 9:48 ` Michael S. Tsirkin
2022-01-06 15:45 ` Antonio Caggiano
0 siblings, 1 reply; 6+ messages in thread
From: Michael S. Tsirkin @ 2022-01-06 9:48 UTC (permalink / raw)
To: Antonio Caggiano; +Cc: qemu-devel, Dr. David Alan Gilbert
On Wed, Nov 10, 2021 at 05:42:20PM +0100, Antonio Caggiano wrote:
> From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
>
> Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG'
> and the data structure 'virtio_pci_shm_cap' to go with it.
> They allow defining shared memory regions with sizes and offsets
> of 2^32 and more.
> Multiple instances of the capability are allowed and distinguished
> by a device-specific 'id'.
>
> v2: Remove virtio_pci_shm_cap as virtio_pci_cap64 is used instead.
>
> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
> (cherry picked from commit a5d628a3a3c5e60b98b15ffff197c36a77056115)
Where's that commit? I think we should drop this, right?
> Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
> ---
> hw/virtio/virtio-pci.c | 19 +++++++++++++++++++
> hw/virtio/virtio-pci.h | 4 ++++
> 2 files changed, 23 insertions(+)
>
> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> index 750aa47ec1..8152d3c1b3 100644
> --- a/hw/virtio/virtio-pci.c
> +++ b/hw/virtio/virtio-pci.c
> @@ -1162,6 +1162,25 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
> return offset;
> }
>
> +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
> + uint8_t bar, uint64_t offset, uint64_t length,
> + uint8_t id)
> +{
> + struct virtio_pci_cap64 cap = {
> + .cap.cap_len = sizeof cap,
> + .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG,
> + };
> + uint32_t mask32 = ~0;
> +
> + cap.cap.bar = bar;
> + cap.cap.length = cpu_to_le32(length & mask32);
> + cap.length_hi = cpu_to_le32((length >> 32) & mask32);
> + cap.cap.offset = cpu_to_le32(offset & mask32);
> + cap.offset_hi = cpu_to_le32((offset >> 32) & mask32);
> + cap.cap.id = id;
> + return virtio_pci_add_mem_cap(proxy, &cap.cap);
You don't need & mask32 I think. cpu_to_le32 will truncate
the value.
> +}
> +
> static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
> unsigned size)
> {
> diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h
> index 2446dcd9ae..5e5c4a4c6d 100644
> --- a/hw/virtio/virtio-pci.h
> +++ b/hw/virtio/virtio-pci.h
> @@ -252,4 +252,8 @@ void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t);
> */
> unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues);
>
> +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
> + uint8_t bar, uint64_t offset, uint64_t length,
> + uint8_t id);
> +
> #endif
So it's a new API, but where's the user?
I guess just include this patch with where-ever it's actually used.
> --
> 2.32.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] virtio: Add shared memory capability
2022-01-06 9:48 ` Michael S. Tsirkin
@ 2022-01-06 15:45 ` Antonio Caggiano
0 siblings, 0 replies; 6+ messages in thread
From: Antonio Caggiano @ 2022-01-06 15:45 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: qemu-devel, Dr. David Alan Gilbert
> Where's that commit? I think we should drop this, right?
Yes, I will submit another version without that line.
> You don't need & mask32 I think. cpu_to_le32 will truncate
> the value.
Makes sense, will be fixed in next version.
> So it's a new API, but where's the user?
> I guess just include this patch with where-ever it's actually used.
The user of virtio_pci_add_shm_cap is in the previous commits.
My original patch [0] was actually a squash of the current two commits,
but Dr. David Alan Gilbert explicitly asked me [1] to split them in
order to preserve his original virtio-pci patch [2]. I could squash
these two commits together again, but we will be back to square one [1].
[0] https://www.mail-archive.com/qemu-devel@nongnu.org/msg826814.html
[1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg826890.html
[2]
https://gitlab.freedesktop.org/virgl/qemu/-/commit/7fa847fde7143ca2ef5b0a2a13c5f669d3beb195
^ permalink raw reply [flat|nested] 6+ messages in thread
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2022-01-06 9:41 ` Michael S. Tsirkin
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