From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 0/2] arm: Implement M-profile trapping on division by zero
Date: Mon, 2 Aug 2021 12:23:05 -1000 [thread overview]
Message-ID: <98703606-f970-774f-f8ac-5bad2e67013d@linaro.org> (raw)
In-Reply-To: <20210730151636.17254-1-peter.maydell@linaro.org>
On 7/30/21 5:16 AM, Peter Maydell wrote:
> Unlike A-profile, for M-profile the UDIV and SDIV insns can be
> configured to raise an exception on division by zero, using the CCR
> DIV_0_TRP bit. This patchset implements that missing functionality
> by having the udiv and sdiv helpers raise an exception if needed.
>
> Some questions:
>
> Is it worth allowing A-profile to retain the mildly better codegen it
> gets from not having to pass in 'env' and marking the helper as
> no-side-effects (ie having M-specific udiv/sdiv helpers) ?
Probably not.
> Is it worth inlining either udiv or sdiv for the A-profile case?
Probably not.
> mov_i32 tmp3,r2
> mov_i32 tmp6,r3
> movcond_i32 tmp3,tmp6,$0x0,$0x0,tmp3,eq
> movcond_i32 tmp6,tmp6,$0x0,$0x1,tmp6,eq
> mov_i32 tmp7,$0x0
> divu2_i32 tmp3,tmp7,tmp3,tmp7,tmp6
> mov_i32 r3,tmp3
>
> but the x86 code is
> 0x7f5f1807dc0c: 45 33 f6 xorl %r14d, %r14d
> 0x7f5f1807dc0f: 45 85 ed testl %r13d, %r13d
> 0x7f5f1807dc12: 45 0f 44 e6 cmovel %r14d, %r12d
At the start of the first movcond, $0x0 is not allocated to a register, and the
constraints allow a constant for argument 3. Then, constraints do not allow a constant
for argument 4 so we load $0x0 into a register.
> 0x7f5f1807dc16: 41 bf 01 00 00 00 movl $1, %r15d
> 0x7f5f1807dc1c: 45 3b ee cmpl %r14d, %r13d
> 0x7f5f1807dc1f: 45 0f 44 ef cmovel %r15d, %r13d
At the start of the second movcond, $0x0 is loaded into a register, so we use it.
> (Ideally of
> course it would notice that it already had generated the condition
> check and not repeat it.)
Yep.
r~
prev parent reply other threads:[~2021-08-02 22:24 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-30 15:16 [PATCH 0/2] arm: Implement M-profile trapping on division by zero Peter Maydell
2021-07-30 15:16 ` [PATCH 1/2] target/arm: Re-indent sdiv and udiv helpers Peter Maydell
2021-08-02 22:23 ` Richard Henderson
2021-07-30 15:16 ` [PATCH 2/2] target/arm: Implement M-profile trapping on division by zero Peter Maydell
2021-08-02 22:23 ` Richard Henderson
2021-08-02 22:23 ` Richard Henderson [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=98703606-f970-774f-f8ac-5bad2e67013d@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).