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* [PULL v2 0/3] Trivial branch patches
@ 2019-11-05 17:50 Laurent Vivier
  2019-11-05 17:50 ` [PULL v2 1/3] hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers Laurent Vivier
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: Laurent Vivier @ 2019-11-05 17:50 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Stefano Stabellini, Eduardo Habkost, Paul Durrant,
	qemu-trivial, Claudio Fontana, Cleber Rosa, Michael Tokarev,
	Laurent Vivier, Fabien Chouteau, KONRAD Frederic, qemu-arm,
	qemu-ppc, Cédric Le Goater, Marc-André Lureau,
	Anthony Perard, xen-devel, David Gibson

The following changes since commit 36609b4fa36f0ac934874371874416f7533a5408:

  Merge remote-tracking branch 'remotes/palmer/tags/palmer-for-master-4.2-sf1' into staging (2019-11-02 17:59:03 +0000)

are available in the Git repository at:

  git://github.com/vivier/qemu.git tags/trivial-branch-pull-request

for you to fetch changes up to e187e55ec65039ed6bd982debee632450ace3bae:

  global: Squash 'the the' (2019-11-05 18:39:14 +0100)

----------------------------------------------------------------
Trivial fixes (20191105-v2)

----------------------------------------------------------------

Dr. David Alan Gilbert (1):
  global: Squash 'the the'

Philippe Mathieu-Daudé (2):
  hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers
  hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses

 disas/libvixl/vixl/invalset.h       |  2 +-
 docs/interop/pr-helper.rst          |  2 +-
 docs/specs/ppc-spapr-hotplug.txt    |  2 +-
 docs/specs/ppc-xive.rst             |  2 +-
 docs/specs/tpm.txt                  |  2 +-
 hw/misc/grlib_ahb_apb_pnp.c         | 12 ++++++++++++
 include/hw/xen/interface/io/blkif.h |  2 +-
 scripts/dump-guest-memory.py        |  2 +-
 8 files changed, 19 insertions(+), 7 deletions(-)

-- 
v2: remove patch from Greg that has lines with more than 80 columns
2.21.0



^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PULL v2 1/3] hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers
  2019-11-05 17:50 [PULL v2 0/3] Trivial branch patches Laurent Vivier
@ 2019-11-05 17:50 ` Laurent Vivier
  2019-11-05 17:50 ` [PULL v2 2/3] hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses Laurent Vivier
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 8+ messages in thread
From: Laurent Vivier @ 2019-11-05 17:50 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Stefano Stabellini, Eduardo Habkost, Paul Durrant,
	qemu-trivial, Claudio Fontana, Cleber Rosa, Michael Tokarev,
	Laurent Vivier, Fabien Chouteau, KONRAD Frederic, qemu-arm,
	qemu-ppc, Cédric Le Goater, Marc-André Lureau,
	Anthony Perard, xen-devel, Philippe Mathieu-Daudé,
	David Gibson

From: Philippe Mathieu-Daudé <philmd@redhat.com>

Guests can crash QEMU when writting to PnP registers:

  $ echo 'writeb 0x800ff042 69' | qemu-system-sparc -M leon3_generic -S -bios /etc/magic -qtest stdio
  [I 1571938309.932255] OPENED
  [R +0.063474] writeb 0x800ff042 69
  Segmentation fault (core dumped)

  (gdb) bt
  #0  0x0000000000000000 in  ()
  #1  0x0000555f4bcdf0bc in memory_region_write_with_attrs_accessor (mr=0x555f4d7be8c0, addr=66, value=0x7fff07d00f08, size=1, shift=0, mask=255, attrs=...) at memory.c:503
  #2  0x0000555f4bcdf185 in access_with_adjusted_size (addr=66, value=0x7fff07d00f08, size=1, access_size_min=1, access_size_max=4, access_fn=0x555f4bcdeff4 <memory_region_write_with_attrs_accessor>, mr=0x555f4d7be8c0, attrs=...) at memory.c:539
  #3  0x0000555f4bce2243 in memory_region_dispatch_write (mr=0x555f4d7be8c0, addr=66, data=69, op=MO_8, attrs=...) at memory.c:1489
  #4  0x0000555f4bc80b20 in flatview_write_continue (fv=0x555f4d92c400, addr=2148528194, attrs=..., buf=0x7fff07d01120 "E", len=1, addr1=66, l=1, mr=0x555f4d7be8c0) at exec.c:3161
  #5  0x0000555f4bc80c65 in flatview_write (fv=0x555f4d92c400, addr=2148528194, attrs=..., buf=0x7fff07d01120 "E", len=1) at exec.c:3201
  #6  0x0000555f4bc80fb0 in address_space_write (as=0x555f4d7aa460, addr=2148528194, attrs=..., buf=0x7fff07d01120 "E", len=1) at exec.c:3291
  #7  0x0000555f4bc8101d in address_space_rw (as=0x555f4d7aa460, addr=2148528194, attrs=..., buf=0x7fff07d01120 "E", len=1, is_write=true) at exec.c:3301
  #8  0x0000555f4bcdb388 in qtest_process_command (chr=0x555f4c2ed7e0 <qtest_chr>, words=0x555f4db0c5d0) at qtest.c:432

Instead of crashing, log the access as unimplemented.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
Message-Id: <20191025110114.27091-2-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 hw/misc/grlib_ahb_apb_pnp.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/hw/misc/grlib_ahb_apb_pnp.c b/hw/misc/grlib_ahb_apb_pnp.c
index 7338461694c9..f3c015d2c35f 100644
--- a/hw/misc/grlib_ahb_apb_pnp.c
+++ b/hw/misc/grlib_ahb_apb_pnp.c
@@ -22,6 +22,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/log.h"
 #include "hw/sysbus.h"
 #include "hw/misc/grlib_ahb_apb_pnp.h"
 
@@ -231,8 +232,15 @@ static uint64_t grlib_apb_pnp_read(void *opaque, hwaddr offset, unsigned size)
     return apb_pnp->regs[offset >> 2];
 }
 
+static void grlib_apb_pnp_write(void *opaque, hwaddr addr,
+                                uint64_t val, unsigned size)
+{
+    qemu_log_mask(LOG_UNIMP, "%s not implemented\n", __func__);
+}
+
 static const MemoryRegionOps grlib_apb_pnp_ops = {
     .read       = grlib_apb_pnp_read,
+    .write      = grlib_apb_pnp_write,
     .endianness = DEVICE_BIG_ENDIAN,
 };
 
-- 
2.21.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PULL v2 2/3] hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses
  2019-11-05 17:50 [PULL v2 0/3] Trivial branch patches Laurent Vivier
  2019-11-05 17:50 ` [PULL v2 1/3] hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers Laurent Vivier
@ 2019-11-05 17:50 ` Laurent Vivier
  2019-11-05 17:50 ` [PULL v2 3/3] global: Squash 'the the' Laurent Vivier
  2019-11-05 19:20 ` [Xen-devel] [PULL v2 0/3] Trivial branch patches no-reply
  3 siblings, 0 replies; 8+ messages in thread
From: Laurent Vivier @ 2019-11-05 17:50 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Stefano Stabellini, Eduardo Habkost, Paul Durrant,
	qemu-trivial, Claudio Fontana, Cleber Rosa, Michael Tokarev,
	Laurent Vivier, Fabien Chouteau, KONRAD Frederic, qemu-arm,
	qemu-ppc, Cédric Le Goater, Marc-André Lureau,
	Anthony Perard, xen-devel, Philippe Mathieu-Daudé,
	Jiri Gaisler, David Gibson

From: Philippe Mathieu-Daudé <philmd@redhat.com>

The Plug & Play region of the AHB/APB bridge can be accessed
by various word size, however the implementation is clearly
restricted to 32-bit:

  static uint64_t grlib_apb_pnp_read(void *opaque, hwaddr offset, unsigned size)
  {
      APBPnp *apb_pnp = GRLIB_APB_PNP(opaque);

      return apb_pnp->regs[offset >> 2];
  }

Set the MemoryRegionOps::impl min/max fields to 32-bit, so
memory.c::access_with_adjusted_size() can adjust when the
access is not 32-bit.

This is required to run RTEMS on leon3, the grlib scanning
functions do byte accesses.

Reported-by: Jiri Gaisler <jiri@gaisler.se>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
Message-Id: <20191025110114.27091-3-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 hw/misc/grlib_ahb_apb_pnp.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/misc/grlib_ahb_apb_pnp.c b/hw/misc/grlib_ahb_apb_pnp.c
index f3c015d2c35f..e230e2536361 100644
--- a/hw/misc/grlib_ahb_apb_pnp.c
+++ b/hw/misc/grlib_ahb_apb_pnp.c
@@ -242,6 +242,10 @@ static const MemoryRegionOps grlib_apb_pnp_ops = {
     .read       = grlib_apb_pnp_read,
     .write      = grlib_apb_pnp_write,
     .endianness = DEVICE_BIG_ENDIAN,
+    .impl = {
+        .min_access_size = 4,
+        .max_access_size = 4,
+    },
 };
 
 static void grlib_apb_pnp_realize(DeviceState *dev, Error **errp)
-- 
2.21.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PULL v2 3/3] global: Squash 'the the'
  2019-11-05 17:50 [PULL v2 0/3] Trivial branch patches Laurent Vivier
  2019-11-05 17:50 ` [PULL v2 1/3] hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers Laurent Vivier
  2019-11-05 17:50 ` [PULL v2 2/3] hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses Laurent Vivier
@ 2019-11-05 17:50 ` Laurent Vivier
  2019-11-05 19:20 ` [Xen-devel] [PULL v2 0/3] Trivial branch patches no-reply
  3 siblings, 0 replies; 8+ messages in thread
From: Laurent Vivier @ 2019-11-05 17:50 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Stefano Stabellini, Eduardo Habkost, Paul Durrant,
	qemu-trivial, Claudio Fontana, Cleber Rosa, Michael Tokarev,
	Laurent Vivier, Fabien Chouteau, Dr. David Alan Gilbert,
	KONRAD Frederic, qemu-arm, qemu-ppc, Cédric Le Goater,
	Marc-André Lureau, Anthony Perard, xen-devel,
	Philippe Mathieu-Daudé,
	Alex Bennée, David Gibson

From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>

'the' has a tendency to double up; squash them back down.

Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20191104185202.102504-1-dgilbert@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 disas/libvixl/vixl/invalset.h       | 2 +-
 docs/interop/pr-helper.rst          | 2 +-
 docs/specs/ppc-spapr-hotplug.txt    | 2 +-
 docs/specs/ppc-xive.rst             | 2 +-
 docs/specs/tpm.txt                  | 2 +-
 include/hw/xen/interface/io/blkif.h | 2 +-
 scripts/dump-guest-memory.py        | 2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/disas/libvixl/vixl/invalset.h b/disas/libvixl/vixl/invalset.h
index ffdc0237b47c..ef5e49d6feb2 100644
--- a/disas/libvixl/vixl/invalset.h
+++ b/disas/libvixl/vixl/invalset.h
@@ -102,7 +102,7 @@ template<TEMPLATE_INVALSET_P_DECL> class InvalSet {
   size_t size() const;
 
   // Returns true if no elements are stored in the set.
-  // Note that this does not mean the the backing storage is empty: it can still
+  // Note that this does not mean the backing storage is empty: it can still
   // contain invalid elements.
   bool empty() const;
 
diff --git a/docs/interop/pr-helper.rst b/docs/interop/pr-helper.rst
index 9f76d5bcf98f..e926f0a6c9cb 100644
--- a/docs/interop/pr-helper.rst
+++ b/docs/interop/pr-helper.rst
@@ -10,7 +10,7 @@ can delegate implementation of persistent reservations to an external
 restricting access to block devices to specific initiators in a shared
 storage setup.
 
-For a more detailed reference please refer the the SCSI Primary
+For a more detailed reference please refer to the SCSI Primary
 Commands standard, specifically the section on Reservations and the
 "PERSISTENT RESERVE IN" and "PERSISTENT RESERVE OUT" commands.
 
diff --git a/docs/specs/ppc-spapr-hotplug.txt b/docs/specs/ppc-spapr-hotplug.txt
index cc7833108e12..859d52cce6c8 100644
--- a/docs/specs/ppc-spapr-hotplug.txt
+++ b/docs/specs/ppc-spapr-hotplug.txt
@@ -385,7 +385,7 @@ Each LMB list entry consists of the following elements:
   is used to retrieve the right associativity list to be used for this
   LMB.
 - A 32bit flags word. The bit at bit position 0x00000008 defines whether
-  the LMB is assigned to the the partition as of boot time.
+  the LMB is assigned to the partition as of boot time.
 
 ibm,dynamic-memory-v2
 
diff --git a/docs/specs/ppc-xive.rst b/docs/specs/ppc-xive.rst
index 148d57eb6ab2..83d43f658b90 100644
--- a/docs/specs/ppc-xive.rst
+++ b/docs/specs/ppc-xive.rst
@@ -163,7 +163,7 @@ Interrupt Priority Register (PIPR) is also updated using the IPB. This
 register represent the priority of the most favored pending
 notification.
 
-The PIPR is then compared to the the Current Processor Priority
+The PIPR is then compared to the Current Processor Priority
 Register (CPPR). If it is more favored (numerically less than), the
 CPU interrupt line is raised and the EO bit of the Notification Source
 Register (NSR) is updated to notify the presence of an exception for
diff --git a/docs/specs/tpm.txt b/docs/specs/tpm.txt
index 5d8c26b1adba..9c8cca042da8 100644
--- a/docs/specs/tpm.txt
+++ b/docs/specs/tpm.txt
@@ -89,7 +89,7 @@ TPM upon reboot. The PPI specification defines the operation requests and the
 actions the firmware has to take. The system administrator passes the operation
 request number to the firmware through an ACPI interface which writes this
 number to a memory location that the firmware knows. Upon reboot, the firmware
-finds the number and sends commands to the the TPM. The firmware writes the TPM
+finds the number and sends commands to the TPM. The firmware writes the TPM
 result code and the operation request number to a memory location that ACPI can
 read from and pass the result on to the administrator.
 
diff --git a/include/hw/xen/interface/io/blkif.h b/include/hw/xen/interface/io/blkif.h
index 8b1be50ce81e..d07fa1e07822 100644
--- a/include/hw/xen/interface/io/blkif.h
+++ b/include/hw/xen/interface/io/blkif.h
@@ -341,7 +341,7 @@
  *      access (even when it should be read-only). If the frontend hits the
  *      maximum number of allowed persistently mapped grants, it can fallback
  *      to non persistent mode. This will cause a performance degradation,
- *      since the the backend driver will still try to map those grants
+ *      since the backend driver will still try to map those grants
  *      persistently. Since the persistent grants protocol is compatible with
  *      the previous protocol, a frontend driver can choose to work in
  *      persistent mode even when the backend doesn't support it.
diff --git a/scripts/dump-guest-memory.py b/scripts/dump-guest-memory.py
index 2c587cbefc57..9371e4581308 100644
--- a/scripts/dump-guest-memory.py
+++ b/scripts/dump-guest-memory.py
@@ -170,7 +170,7 @@ class ELF(object):
         self.ehdr.e_phnum += 1
 
     def to_file(self, elf_file):
-        """Writes all ELF structures to the the passed file.
+        """Writes all ELF structures to the passed file.
 
         Structure:
         Ehdr
-- 
2.21.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [Xen-devel] [PULL v2 0/3] Trivial branch patches
  2019-11-05 17:50 [PULL v2 0/3] Trivial branch patches Laurent Vivier
                   ` (2 preceding siblings ...)
  2019-11-05 17:50 ` [PULL v2 3/3] global: Squash 'the the' Laurent Vivier
@ 2019-11-05 19:20 ` no-reply
  2019-11-05 20:06   ` Laurent Vivier
  3 siblings, 1 reply; 8+ messages in thread
From: no-reply @ 2019-11-05 19:20 UTC (permalink / raw)
  To: laurent
  Cc: peter.maydell, sstabellini, ehabkost, paul, qemu-trivial, mjt,
	claudio.fontana, qemu-devel, chouteau, laurent, xen-devel,
	frederic.konrad, qemu-arm, qemu-ppc, clg, crosa, anthony.perard,
	marcandre.lureau, david

Patchew URL: https://patchew.org/QEMU/20191105175010.2591-1-laurent@vivier.eu/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [Xen-devel] [PULL v2 0/3] Trivial branch patches
Type: series
Message-id: 20191105175010.2591-1-laurent@vivier.eu

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
49a55f7 global: Squash 'the the'
c0b5513 hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses
eb43395 hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers

=== OUTPUT BEGIN ===
1/3 Checking commit eb43395bf8f1 (hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers)
2/3 Checking commit c0b5513f971a (hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses)
3/3 Checking commit 49a55f7feb19 (global: Squash 'the the')
ERROR: do not use C99 // comments
#26: FILE: disas/libvixl/vixl/invalset.h:105:
+  // Note that this does not mean the backing storage is empty: it can still

total: 1 errors, 0 warnings, 56 lines checked

Patch 3/3 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20191105175010.2591-1-laurent@vivier.eu/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Xen-devel] [PULL v2 0/3] Trivial branch patches
  2019-11-05 19:20 ` [Xen-devel] [PULL v2 0/3] Trivial branch patches no-reply
@ 2019-11-05 20:06   ` Laurent Vivier
  2019-11-06 16:05     ` Peter Maydell
  0 siblings, 1 reply; 8+ messages in thread
From: Laurent Vivier @ 2019-11-05 20:06 UTC (permalink / raw)
  To: qemu-devel
  Cc: peter.maydell, sstabellini, ehabkost, paul, qemu-trivial, mjt,
	claudio.fontana, chouteau, xen-devel, frederic.konrad, qemu-arm,
	qemu-ppc, clg, crosa, anthony.perard, marcandre.lureau, david

Le 05/11/2019 à 20:20, no-reply@patchew.org a écrit :
> Patchew URL: https://patchew.org/QEMU/20191105175010.2591-1-laurent@vivier.eu/
> 
> 
> 
> Hi,
> 
> This series seems to have some coding style problems. See output below for
> more information:
> 
> Subject: [Xen-devel] [PULL v2 0/3] Trivial branch patches
> Type: series
> Message-id: 20191105175010.2591-1-laurent@vivier.eu
> 
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
> git rev-parse base > /dev/null || exit 0
> git config --local diff.renamelimit 0
> git config --local diff.renames True
> git config --local diff.algorithm histogram
> ./scripts/checkpatch.pl --mailback base..
> === TEST SCRIPT END ===
> 
> Switched to a new branch 'test'
> 49a55f7 global: Squash 'the the'
> c0b5513 hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses
> eb43395 hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers
> 
> === OUTPUT BEGIN ===
> 1/3 Checking commit eb43395bf8f1 (hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers)
> 2/3 Checking commit c0b5513f971a (hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses)
> 3/3 Checking commit 49a55f7feb19 (global: Squash 'the the')
> ERROR: do not use C99 // comments
> #26: FILE: disas/libvixl/vixl/invalset.h:105:
> +  // Note that this does not mean the backing storage is empty: it can still

As reported by David Gilbert, this is a false positive as this file is a
C++ file.

Thanks,
LAurent



^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Xen-devel] [PULL v2 0/3] Trivial branch patches
  2019-11-05 20:06   ` Laurent Vivier
@ 2019-11-06 16:05     ` Peter Maydell
  2019-11-06 16:17       ` Laurent Vivier
  0 siblings, 1 reply; 8+ messages in thread
From: Peter Maydell @ 2019-11-06 16:05 UTC (permalink / raw)
  To: Laurent Vivier
  Cc: Stefano Stabellini, Eduardo Habkost, Paul Durrant, QEMU Trivial,
	Michael Tokarev, Claudio Fontana, QEMU Developers,
	Fabien Chouteau, open list:X86, KONRAD Frederic, qemu-arm,
	qemu-ppc, Cédric Le Goater, Cleber Rosa, Anthony PERARD,
	Marc-André Lureau, David Gibson

On Tue, 5 Nov 2019 at 20:06, Laurent Vivier <laurent@vivier.eu> wrote:
>
> Le 05/11/2019 à 20:20, no-reply@patchew.org a écrit :
> > Patchew URL: https://patchew.org/QEMU/20191105175010.2591-1-laurent@vivier.eu/
> >
> >
> >
> > Hi,
> >
> > This series seems to have some coding style problems. See output below for
> > more information:
> >
> > Subject: [Xen-devel] [PULL v2 0/3] Trivial branch patches
> > Type: series
> > Message-id: 20191105175010.2591-1-laurent@vivier.eu
> >
> > === TEST SCRIPT BEGIN ===
> > #!/bin/bash
> > git rev-parse base > /dev/null || exit 0
> > git config --local diff.renamelimit 0
> > git config --local diff.renames True
> > git config --local diff.algorithm histogram
> > ./scripts/checkpatch.pl --mailback base..
> > === TEST SCRIPT END ===
> >
> > Switched to a new branch 'test'
> > 49a55f7 global: Squash 'the the'
> > c0b5513 hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses
> > eb43395 hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers
> >
> > === OUTPUT BEGIN ===
> > 1/3 Checking commit eb43395bf8f1 (hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers)
> > 2/3 Checking commit c0b5513f971a (hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses)
> > 3/3 Checking commit 49a55f7feb19 (global: Squash 'the the')
> > ERROR: do not use C99 // comments
> > #26: FILE: disas/libvixl/vixl/invalset.h:105:
> > +  // Note that this does not mean the backing storage is empty: it can still
>
> As reported by David Gilbert, this is a false positive as this file is a
> C++ file.

True, but it's also a third-party dependency that we have
taken a copy of. If we care about fixing its typos in comments
we should do that by submitting the fixes upstream. We should
avoid making changes to our local copy of this code because
it just makes it unnecessarily more difficult to do updates to
newer versions.

Could you drop that change, please? (Sorry I didn't notice
it going by when the patch was originally on list.)

thanks
-- PMM


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Xen-devel] [PULL v2 0/3] Trivial branch patches
  2019-11-06 16:05     ` Peter Maydell
@ 2019-11-06 16:17       ` Laurent Vivier
  0 siblings, 0 replies; 8+ messages in thread
From: Laurent Vivier @ 2019-11-06 16:17 UTC (permalink / raw)
  To: Peter Maydell
  Cc: Stefano Stabellini, Eduardo Habkost, Paul Durrant, QEMU Trivial,
	Michael Tokarev, Claudio Fontana, QEMU Developers,
	Marc-André Lureau, KONRAD Frederic, qemu-arm, qemu-ppc,
	Cédric Le Goater, Cleber Rosa, Anthony PERARD,
	open list:X86, David Gibson

Le 06/11/2019 à 17:05, Peter Maydell a écrit :
> On Tue, 5 Nov 2019 at 20:06, Laurent Vivier <laurent@vivier.eu> wrote:
>>
>> Le 05/11/2019 à 20:20, no-reply@patchew.org a écrit :
>>> Patchew URL: https://patchew.org/QEMU/20191105175010.2591-1-laurent@vivier.eu/
>>>
>>>
>>>
>>> Hi,
>>>
>>> This series seems to have some coding style problems. See output below for
>>> more information:
>>>
>>> Subject: [Xen-devel] [PULL v2 0/3] Trivial branch patches
>>> Type: series
>>> Message-id: 20191105175010.2591-1-laurent@vivier.eu
>>>
>>> === TEST SCRIPT BEGIN ===
>>> #!/bin/bash
>>> git rev-parse base > /dev/null || exit 0
>>> git config --local diff.renamelimit 0
>>> git config --local diff.renames True
>>> git config --local diff.algorithm histogram
>>> ./scripts/checkpatch.pl --mailback base..
>>> === TEST SCRIPT END ===
>>>
>>> Switched to a new branch 'test'
>>> 49a55f7 global: Squash 'the the'
>>> c0b5513 hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses
>>> eb43395 hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers
>>>
>>> === OUTPUT BEGIN ===
>>> 1/3 Checking commit eb43395bf8f1 (hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers)
>>> 2/3 Checking commit c0b5513f971a (hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses)
>>> 3/3 Checking commit 49a55f7feb19 (global: Squash 'the the')
>>> ERROR: do not use C99 // comments
>>> #26: FILE: disas/libvixl/vixl/invalset.h:105:
>>> +  // Note that this does not mean the backing storage is empty: it can still
>>
>> As reported by David Gilbert, this is a false positive as this file is a
>> C++ file.
> 
> True, but it's also a third-party dependency that we have
> taken a copy of. If we care about fixing its typos in comments
> we should do that by submitting the fixes upstream. We should
> avoid making changes to our local copy of this code because
> it just makes it unnecessarily more difficult to do updates to
> newer versions.
> 
> Could you drop that change, please? (Sorry I didn't notice
> it going by when the patch was originally on list.)

Sure.

Thanks,
Laurent



^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2019-11-06 16:21 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-05 17:50 [PULL v2 0/3] Trivial branch patches Laurent Vivier
2019-11-05 17:50 ` [PULL v2 1/3] hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers Laurent Vivier
2019-11-05 17:50 ` [PULL v2 2/3] hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses Laurent Vivier
2019-11-05 17:50 ` [PULL v2 3/3] global: Squash 'the the' Laurent Vivier
2019-11-05 19:20 ` [Xen-devel] [PULL v2 0/3] Trivial branch patches no-reply
2019-11-05 20:06   ` Laurent Vivier
2019-11-06 16:05     ` Peter Maydell
2019-11-06 16:17       ` Laurent Vivier

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