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* [PATCH v8 000/133] Fixes curses on msys2/mingw
@ 2020-10-05 15:52 Yonggang Luo
  2020-10-05 15:52 ` [PATCH v8 001/133] target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check Yonggang Luo
  2020-10-05 15:59 ` [PATCH v8 000/133] Fixes curses on msys2/mingw 罗勇刚(Yonggang Luo)
  0 siblings, 2 replies; 3+ messages in thread
From: Yonggang Luo @ 2020-10-05 15:52 UTC (permalink / raw)
  To: qemu-devel, Daniel P . Berrangé
  Cc: QEMU Trivial, Alex Bennée, Richard Henderson,
	Laurent Vivier, Yonggang Luo, Gerd Hoffmann, Paolo Bonzini,
	Philippe Mathieu-Daudé

V7-V8
Rebase to master and  resolve conflict of
*configure: fixes indent of $meson setup

V6-V7
Update the configure script for
* curses: Fixes compiler error that complain don't have langinfo.h on msys2/m=
ingw

V5-V6
Dropping configure: Fixes ncursesw detection under msys2/mingw by convert the=
m to meson first.
That need the meson 0.56 upstream to fixes the curses detection.
Add
* configure: fixes indent of $meson setup

Alberto Garcia (2):
  docs: Document the throttle block filter
  qcow2: Use L1E_SIZE in qcow2_write_l1_entry()

Alex Benn=C3=A9e (2):
  gitlab: move linux-user plugins test across to gitlab
  gitlab: split deprecated job into build/check stages

Collin L. Walling (7):
  s390/sclp: get machine once during read scp/cpu info
  s390/sclp: rework sclp boundary checks
  s390/sclp: read sccb from mem based on provided length
  s390/sclp: check sccb len before filling in data
  s390/sclp: use cpu offset to locate cpu entries
  s390/sclp: add extended-length sccb support for kvm guest
  s390: guest support for diagnose 0x318

Cornelia Huck (1):
  vfio-ccw: plug memory leak while getting region info

David Hildenbrand (10):
  s390x/tcg: Implement MONITOR CALL
  s390x/cpumodel: S390_FEAT_MISC_INSTRUCTION_EXT ->
    S390_FEAT_MISC_INSTRUCTION_EXT2
  s390x/tcg: Implement ADD HALFWORD (AGH)
  s390x/tcg: Implement SUBTRACT HALFWORD (SGH)
  s390x/tcg: Implement MULTIPLY (MG, MGRK)
  s390x/tcg: Implement MULTIPLY HALFWORD (MGH)
  s390x/tcg: Implement BRANCH INDIRECT ON CONDITION (BIC)
  s390x/tcg: Implement MULTIPLY SINGLE (MSC, MSGC, MSGRKC, MSRKC)
  s390x/tcg: We support Miscellaneous-Instruction-Extensions Facility 2
  s390x/tcg: Implement CIPHER MESSAGE WITH AUTHENTICATION (KMA)

Dr. David Alan Gilbert (1):
  qemu-io-cmds: Simplify help_oneline

John Snow (8):
  MAINTAINERS: Update my git address
  ide: rename cmd_write to ctrl_write
  ide: don't tamper with the device register
  ide: model HOB correctly
  ide: reorder set/get sector functions
  ide: remove magic constants from the device register
  ide: clear interrupt on command write
  ide: cancel pending callbacks on SRST

Kevin Wolf (32):
  nbd: Remove unused nbd_export_get_blockdev()
  qapi: Create block-export module
  qapi: Rename BlockExport to BlockExportOptions
  block/export: Add BlockExport infrastructure and block-export-add
  qemu-storage-daemon: Use qmp_block_export_add()
  qemu-nbd: Use raw block driver for --offset
  block/export: Remove magic from block-export-add
  nbd: Add max-connections to nbd-server-start
  nbd: Add writethrough to block-export-add
  nbd: Remove NBDExport.close callback
  qemu-nbd: Use blk_exp_add() to create the export
  nbd/server: Simplify export shutdown
  block/export: Move refcount from NBDExport to BlockExport
  block/export: Move AioContext from NBDExport to BlockExport
  block/export: Add node-name to BlockExportOptions
  block/export: Allocate BlockExport in blk_exp_add()
  block/export: Add blk_exp_close_all(_type)
  block/export: Add 'id' option to block-export-add
  block/export: Move strong user reference to block_exports
  block/export: Add block-export-del
  block/export: Add BLOCK_EXPORT_DELETED event
  block/export: Move blk to BlockExport
  block/export: Create BlockBackend in blk_exp_add()
  block/export: Add query-block-exports
  block/export: Move writable to BlockExportOptions
  nbd: Merge nbd_export_new() and nbd_export_create()
  nbd: Deprecate nbd-server-add/remove
  iotests: Factor out qemu_tool_pipe_and_status()
  iotests: Introduce qemu_nbd_list_log()
  iotests: Allow supported and unsupported formats at the same time
  iotests: Test block-export-* QMP interface
  qemu-storage-daemon: Fix help line for --export

Paolo Bonzini (17):
  travis: remove TCI test
  default-configs: move files to default-configs/devices/
  configure: convert accelerator variables to meson options
  configure: rewrite accelerator defaults as tests
  configure: move accelerator logic to meson
  configure: remove dead variable
  configure: compute derivatives of target name in meson
  configure: remove useless config-target.mak symbols
  configure: remove target configuration
  default-configs: remove default-configs/devices for user-mode targets
  configure: move OpenBSD W^X test to meson
  default-configs: use TARGET_ARCH key
  default-configs: remove redundant keys
  meson: move sparse detection to Meson and rewrite check_sparse.py
  tests: tcg: do not use implicit rules
  dockerfiles: add diffutils to Fedora
  readthedocs: build with Python 3.6

Peter Maydell (5):
  target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
  target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters
  hw/intc/armv7m_nvic: Only show ID register values for Main Extension
    CPUs
  target/arm: Add ID register values for Cortex-M0
  target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile

Philippe Mathieu-Daud=C3=A9 (14):
  hw/arm/raspi: Define various blocks base addresses
  hw/arm/bcm2835: Add more unimplemented peripherals
  hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
  hw/arm/raspi: Display the board revision in the machine description
  hw/arm/raspi: Load the firmware on the first core
  hw/arm/raspi: Move arm_boot_info structure to RaspiMachineState
  hw/arm/raspi: Avoid using TypeInfo::class_data pointer
  hw/arm/raspi: Use more specific machine names
  hw/arm/raspi: Introduce RaspiProcessorId enum
  hw/arm/raspi: Use RaspiProcessorId to set the firmware load address
  hw/arm/raspi: Remove use of the 'version' value in the board code
  hw/ide/ahci: Do not dma_memory_unmap(NULL)
  hw/s390x/css: Remove double initialization
  block/sheepdog: Replace magic val by NANOSECONDS_PER_SECOND definition

Richard Henderson (13):
  target/arm: Fix sve ldr/str
  target/arm: Fix SVE splice
  capstone: Convert Makefile bits to meson bits
  capstone: Update to upstream "next" branch
  capstone: Require version 4.0 from a system library
  disas: Move host asm annotations to tb_gen_code
  disas: Clean up CPUDebug initialization
  disas: Use qemu/bswap.h for bfd endian loads
  disas: Cleanup plugin_disas
  disas: Configure capstone for aarch64 host without libvixl
  disas: Split out capstone code to disas/capstone.c
  disas: Enable capstone disassembly for s390x
  disas/capstone: Add skipdata hook for s390x

Thomas Huth (13):
  migration: Silence compiler warning in global_state_store_running()
  travis.yml: Drop the default softmmu builds
  travis.yml: Update Travis to use Bionic and Focal instead of Xenial
  travis.yml: Drop the superfluous Python 3.6 build
  travis.yml: Drop the Python 3.5 build
  tests/docker: Use Fedora containers for MinGW cross-builds in the
    gitlab-CI
  gitlab-ci: Remove the Debian9-based containers and containers-layer3
  tests/docker: Update the tricore container to debian 10
  shippable.yml: Remove the Debian9-based MinGW cross-compiler tests
  tests/docker: Remove old Debian 9 containers
  gitlab-ci: Increase the timeout for the cross-compiler builds
  configure: Bump the minimum required Python version to 3.6
  tests/check-block: Do not run the iotests with old versions of bash

Yonggang Luo (5):
  gitignore: ignore a bit more
  configure: fixes indent of $meson setup
  curses: Fixes compiler error that complain don't have langinfo.h on
    msys2/mingw
  curses: Fixes curses compiling errors.
  win32: Simplify gmtime_r detection not depends on if  _POSIX_C_SOURCE
    are defined on msys2/mingw

Zhenwei Pi (3):
  target-i386: seperate MCIP & MCE_MASK error reason
  qapi/run-state.json: introduce memory failure event
  target-i386: post memory failure event to QMP

--=20
2.28.0.windows.1



^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH v8 001/133] target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
  2020-10-05 15:52 [PATCH v8 000/133] Fixes curses on msys2/mingw Yonggang Luo
@ 2020-10-05 15:52 ` Yonggang Luo
  2020-10-05 15:59 ` [PATCH v8 000/133] Fixes curses on msys2/mingw 罗勇刚(Yonggang Luo)
  1 sibling, 0 replies; 3+ messages in thread
From: Yonggang Luo @ 2020-10-05 15:52 UTC (permalink / raw)
  To: qemu-devel, Daniel P . Berrangé
  Cc: Peter Maydell, QEMU Trivial, Alex Bennée, Richard Henderson,
	Laurent Vivier, Gerd Hoffmann, Paolo Bonzini,
	Philippe Mathieu-Daudé

From: Peter Maydell <peter.maydell@linaro.org>

The ARM_FEATURE_PXN bit indicates whether the CPU supports the PXN
bit in short-descriptor translation table format descriptors.  This
is indicated by ID_MMFR0.VMSA being at least 0b0100.  Replace the
feature bit with an ID register check, in line with our preference
for ID register checks over feature bits.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200910173855.4068-2-peter.maydell@linaro.org
---
 target/arm/cpu.c    |  1 -
 target/arm/cpu.h    | 15 ++++++++++++++-
 target/arm/helper.c |  5 +++--
 3 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index a7643deab4..d13a7b8717 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1588,7 +1588,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
     }
     if (arm_feature(env, ARM_FEATURE_LPAE)) {
         set_feature(env, ARM_FEATURE_V7MP);
-        set_feature(env, ARM_FEATURE_PXN);
     }
     if (arm_feature(env, ARM_FEATURE_CBAR_RO)) {
         set_feature(env, ARM_FEATURE_CBAR);
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 6036f61d60..14a673d8e9 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1772,6 +1772,15 @@ FIELD(ID_ISAR6, FHM, 8, 4)
 FIELD(ID_ISAR6, SB, 12, 4)
 FIELD(ID_ISAR6, SPECRES, 16, 4)
 
+FIELD(ID_MMFR0, VMSA, 0, 4)
+FIELD(ID_MMFR0, PMSA, 4, 4)
+FIELD(ID_MMFR0, OUTERSHR, 8, 4)
+FIELD(ID_MMFR0, SHARELVL, 12, 4)
+FIELD(ID_MMFR0, TCM, 16, 4)
+FIELD(ID_MMFR0, AUXREG, 20, 4)
+FIELD(ID_MMFR0, FCSE, 24, 4)
+FIELD(ID_MMFR0, INNERSHR, 28, 4)
+
 FIELD(ID_MMFR3, CMAINTVA, 0, 4)
 FIELD(ID_MMFR3, CMAINTSW, 4, 4)
 FIELD(ID_MMFR3, BPMAINT, 8, 4)
@@ -1949,7 +1958,6 @@ enum arm_features {
     ARM_FEATURE_CACHE_DIRTY_REG, /* 1136/1176 cache dirty status register */
     ARM_FEATURE_CACHE_BLOCK_OPS, /* v6 optional cache block operations */
     ARM_FEATURE_MPIDR, /* has cp15 MPIDR */
-    ARM_FEATURE_PXN, /* has Privileged Execute Never bit */
     ARM_FEATURE_LPAE, /* has Large Physical Address Extension */
     ARM_FEATURE_V8,
     ARM_FEATURE_AARCH64, /* supports 64 bit mode */
@@ -3615,6 +3623,11 @@ static inline bool isar_feature_aa32_vminmaxnm(const ARMISARegisters *id)
     return FIELD_EX32(id->mvfr2, MVFR2, FPMISC) >= 4;
 }
 
+static inline bool isar_feature_aa32_pxn(const ARMISARegisters *id)
+{
+    return FIELD_EX32(id->id_mmfr0, ID_MMFR0, VMSA) >= 4;
+}
+
 static inline bool isar_feature_aa32_pan(const ARMISARegisters *id)
 {
     return FIELD_EX32(id->id_mmfr3, ID_MMFR3, PAN) != 0;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 88bd9dd35d..ab6ca23b64 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10537,6 +10537,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
                              target_ulong *page_size, ARMMMUFaultInfo *fi)
 {
     CPUState *cs = env_cpu(env);
+    ARMCPU *cpu = env_archcpu(env);
     int level = 1;
     uint32_t table;
     uint32_t desc;
@@ -10563,7 +10564,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
         goto do_fault;
     }
     type = (desc & 3);
-    if (type == 0 || (type == 3 && !arm_feature(env, ARM_FEATURE_PXN))) {
+    if (type == 0 || (type == 3 && !cpu_isar_feature(aa32_pxn, cpu))) {
         /* Section translation fault, or attempt to use the encoding
          * which is Reserved on implementations without PXN.
          */
@@ -10605,7 +10606,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
         pxn = desc & 1;
         ns = extract32(desc, 19, 1);
     } else {
-        if (arm_feature(env, ARM_FEATURE_PXN)) {
+        if (cpu_isar_feature(aa32_pxn, cpu)) {
             pxn = (desc >> 2) & 1;
         }
         ns = extract32(desc, 3, 1);
-- 
2.28.0.windows.1



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH v8 000/133] Fixes curses on msys2/mingw
  2020-10-05 15:52 [PATCH v8 000/133] Fixes curses on msys2/mingw Yonggang Luo
  2020-10-05 15:52 ` [PATCH v8 001/133] target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check Yonggang Luo
@ 2020-10-05 15:59 ` 罗勇刚(Yonggang Luo)
  1 sibling, 0 replies; 3+ messages in thread
From: 罗勇刚(Yonggang Luo) @ 2020-10-05 15:59 UTC (permalink / raw)
  To: qemu-level, Daniel P . Berrangé
  Cc: QEMU Trivial, Alex Bennée, Richard Henderson,
	Laurent Vivier, Gerd Hoffmann, Paolo Bonzini,
	Philippe Mathieu-Daudé

[-- Attachment #1: Type: text/plain, Size: 8440 bytes --]

Err, sorry for this, don't know if this would broken the patchew

On Mon, Oct 5, 2020 at 11:54 PM Yonggang Luo <luoyonggang@gmail.com> wrote:
>
> V7-V8
> Rebase to master and  resolve conflict of
> *configure: fixes indent of $meson setup
>
> V6-V7
> Update the configure script for
> * curses: Fixes compiler error that complain don't have langinfo.h on
msys2/m=
> ingw
>
> V5-V6
> Dropping configure: Fixes ncursesw detection under msys2/mingw by convert
the=
> m to meson first.
> That need the meson 0.56 upstream to fixes the curses detection.
> Add
> * configure: fixes indent of $meson setup
>
> Alberto Garcia (2):
>   docs: Document the throttle block filter
>   qcow2: Use L1E_SIZE in qcow2_write_l1_entry()
>
> Alex Benn=C3=A9e (2):
>   gitlab: move linux-user plugins test across to gitlab
>   gitlab: split deprecated job into build/check stages
>
> Collin L. Walling (7):
>   s390/sclp: get machine once during read scp/cpu info
>   s390/sclp: rework sclp boundary checks
>   s390/sclp: read sccb from mem based on provided length
>   s390/sclp: check sccb len before filling in data
>   s390/sclp: use cpu offset to locate cpu entries
>   s390/sclp: add extended-length sccb support for kvm guest
>   s390: guest support for diagnose 0x318
>
> Cornelia Huck (1):
>   vfio-ccw: plug memory leak while getting region info
>
> David Hildenbrand (10):
>   s390x/tcg: Implement MONITOR CALL
>   s390x/cpumodel: S390_FEAT_MISC_INSTRUCTION_EXT ->
>     S390_FEAT_MISC_INSTRUCTION_EXT2
>   s390x/tcg: Implement ADD HALFWORD (AGH)
>   s390x/tcg: Implement SUBTRACT HALFWORD (SGH)
>   s390x/tcg: Implement MULTIPLY (MG, MGRK)
>   s390x/tcg: Implement MULTIPLY HALFWORD (MGH)
>   s390x/tcg: Implement BRANCH INDIRECT ON CONDITION (BIC)
>   s390x/tcg: Implement MULTIPLY SINGLE (MSC, MSGC, MSGRKC, MSRKC)
>   s390x/tcg: We support Miscellaneous-Instruction-Extensions Facility 2
>   s390x/tcg: Implement CIPHER MESSAGE WITH AUTHENTICATION (KMA)
>
> Dr. David Alan Gilbert (1):
>   qemu-io-cmds: Simplify help_oneline
>
> John Snow (8):
>   MAINTAINERS: Update my git address
>   ide: rename cmd_write to ctrl_write
>   ide: don't tamper with the device register
>   ide: model HOB correctly
>   ide: reorder set/get sector functions
>   ide: remove magic constants from the device register
>   ide: clear interrupt on command write
>   ide: cancel pending callbacks on SRST
>
> Kevin Wolf (32):
>   nbd: Remove unused nbd_export_get_blockdev()
>   qapi: Create block-export module
>   qapi: Rename BlockExport to BlockExportOptions
>   block/export: Add BlockExport infrastructure and block-export-add
>   qemu-storage-daemon: Use qmp_block_export_add()
>   qemu-nbd: Use raw block driver for --offset
>   block/export: Remove magic from block-export-add
>   nbd: Add max-connections to nbd-server-start
>   nbd: Add writethrough to block-export-add
>   nbd: Remove NBDExport.close callback
>   qemu-nbd: Use blk_exp_add() to create the export
>   nbd/server: Simplify export shutdown
>   block/export: Move refcount from NBDExport to BlockExport
>   block/export: Move AioContext from NBDExport to BlockExport
>   block/export: Add node-name to BlockExportOptions
>   block/export: Allocate BlockExport in blk_exp_add()
>   block/export: Add blk_exp_close_all(_type)
>   block/export: Add 'id' option to block-export-add
>   block/export: Move strong user reference to block_exports
>   block/export: Add block-export-del
>   block/export: Add BLOCK_EXPORT_DELETED event
>   block/export: Move blk to BlockExport
>   block/export: Create BlockBackend in blk_exp_add()
>   block/export: Add query-block-exports
>   block/export: Move writable to BlockExportOptions
>   nbd: Merge nbd_export_new() and nbd_export_create()
>   nbd: Deprecate nbd-server-add/remove
>   iotests: Factor out qemu_tool_pipe_and_status()
>   iotests: Introduce qemu_nbd_list_log()
>   iotests: Allow supported and unsupported formats at the same time
>   iotests: Test block-export-* QMP interface
>   qemu-storage-daemon: Fix help line for --export
>
> Paolo Bonzini (17):
>   travis: remove TCI test
>   default-configs: move files to default-configs/devices/
>   configure: convert accelerator variables to meson options
>   configure: rewrite accelerator defaults as tests
>   configure: move accelerator logic to meson
>   configure: remove dead variable
>   configure: compute derivatives of target name in meson
>   configure: remove useless config-target.mak symbols
>   configure: remove target configuration
>   default-configs: remove default-configs/devices for user-mode targets
>   configure: move OpenBSD W^X test to meson
>   default-configs: use TARGET_ARCH key
>   default-configs: remove redundant keys
>   meson: move sparse detection to Meson and rewrite check_sparse.py
>   tests: tcg: do not use implicit rules
>   dockerfiles: add diffutils to Fedora
>   readthedocs: build with Python 3.6
>
> Peter Maydell (5):
>   target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
>   target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters
>   hw/intc/armv7m_nvic: Only show ID register values for Main Extension
>     CPUs
>   target/arm: Add ID register values for Cortex-M0
>   target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile
>
> Philippe Mathieu-Daud=C3=A9 (14):
>   hw/arm/raspi: Define various blocks base addresses
>   hw/arm/bcm2835: Add more unimplemented peripherals
>   hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
>   hw/arm/raspi: Display the board revision in the machine description
>   hw/arm/raspi: Load the firmware on the first core
>   hw/arm/raspi: Move arm_boot_info structure to RaspiMachineState
>   hw/arm/raspi: Avoid using TypeInfo::class_data pointer
>   hw/arm/raspi: Use more specific machine names
>   hw/arm/raspi: Introduce RaspiProcessorId enum
>   hw/arm/raspi: Use RaspiProcessorId to set the firmware load address
>   hw/arm/raspi: Remove use of the 'version' value in the board code
>   hw/ide/ahci: Do not dma_memory_unmap(NULL)
>   hw/s390x/css: Remove double initialization
>   block/sheepdog: Replace magic val by NANOSECONDS_PER_SECOND definition
>
> Richard Henderson (13):
>   target/arm: Fix sve ldr/str
>   target/arm: Fix SVE splice
>   capstone: Convert Makefile bits to meson bits
>   capstone: Update to upstream "next" branch
>   capstone: Require version 4.0 from a system library
>   disas: Move host asm annotations to tb_gen_code
>   disas: Clean up CPUDebug initialization
>   disas: Use qemu/bswap.h for bfd endian loads
>   disas: Cleanup plugin_disas
>   disas: Configure capstone for aarch64 host without libvixl
>   disas: Split out capstone code to disas/capstone.c
>   disas: Enable capstone disassembly for s390x
>   disas/capstone: Add skipdata hook for s390x
>
> Thomas Huth (13):
>   migration: Silence compiler warning in global_state_store_running()
>   travis.yml: Drop the default softmmu builds
>   travis.yml: Update Travis to use Bionic and Focal instead of Xenial
>   travis.yml: Drop the superfluous Python 3.6 build
>   travis.yml: Drop the Python 3.5 build
>   tests/docker: Use Fedora containers for MinGW cross-builds in the
>     gitlab-CI
>   gitlab-ci: Remove the Debian9-based containers and containers-layer3
>   tests/docker: Update the tricore container to debian 10
>   shippable.yml: Remove the Debian9-based MinGW cross-compiler tests
>   tests/docker: Remove old Debian 9 containers
>   gitlab-ci: Increase the timeout for the cross-compiler builds
>   configure: Bump the minimum required Python version to 3.6
>   tests/check-block: Do not run the iotests with old versions of bash
>
> Yonggang Luo (5):
>   gitignore: ignore a bit more
>   configure: fixes indent of $meson setup
>   curses: Fixes compiler error that complain don't have langinfo.h on
>     msys2/mingw
>   curses: Fixes curses compiling errors.
>   win32: Simplify gmtime_r detection not depends on if  _POSIX_C_SOURCE
>     are defined on msys2/mingw
>
> Zhenwei Pi (3):
>   target-i386: seperate MCIP & MCE_MASK error reason
>   qapi/run-state.json: introduce memory failure event
>   target-i386: post memory failure event to QMP
>
> --=20
> 2.28.0.windows.1
>


--
         此致
礼
罗勇刚
Yours
    sincerely,
Yonggang Luo

[-- Attachment #2: Type: text/html, Size: 9671 bytes --]

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2020-10-05 15:52 [PATCH v8 000/133] Fixes curses on msys2/mingw Yonggang Luo
2020-10-05 15:52 ` [PATCH v8 001/133] target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check Yonggang Luo
2020-10-05 15:59 ` [PATCH v8 000/133] Fixes curses on msys2/mingw 罗勇刚(Yonggang Luo)

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