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* [Qemu-devel] i386: EFER vs 32-bit CPU
@ 2019-05-29 11:26 Pavel Dovgalyuk
  2019-05-29 11:30 ` Dr. David Alan Gilbert
                   ` (2 more replies)
  0 siblings, 3 replies; 11+ messages in thread
From: Pavel Dovgalyuk @ 2019-05-29 11:26 UTC (permalink / raw)
  To: qemu-devel, pbonzini, rth, ehabkost, quintela, dgilbert

Hello!

 

I found this while debugging the inconsistent saved/restored state of the virtual machine.

 

i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault processing).

But it does not included in VMState, because "efer" field is disabled with #ifdef TARGET_X86_64

 

I think that efer should be saved for i386 too, but how it should be made to preserve the backward
compatibility?

Should we add a section for i386, which duplicates efer, or just version_id of the main VMSD should
be updated?

 

Pavel Dovgalyuk

 


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-29 11:26 [Qemu-devel] i386: EFER vs 32-bit CPU Pavel Dovgalyuk
@ 2019-05-29 11:30 ` Dr. David Alan Gilbert
  2019-05-29 11:39   ` Paolo Bonzini
  2019-05-30  0:52 ` Peter Xu
  2019-05-30 11:00 ` TeLeMan
  2 siblings, 1 reply; 11+ messages in thread
From: Dr. David Alan Gilbert @ 2019-05-29 11:30 UTC (permalink / raw)
  To: Pavel Dovgalyuk; +Cc: pbonzini, quintela, qemu-devel, ehabkost, rth

* Pavel Dovgalyuk (dovgaluk@ispras.ru) wrote:
> Hello!
> 
>  
> 
> I found this while debugging the inconsistent saved/restored state of the virtual machine.
> 
>  
> 
> i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault processing).
> 
> But it does not included in VMState, because "efer" field is disabled with #ifdef TARGET_X86_64
> 
>  
> 
> I think that efer should be saved for i386 too, but how it should be made to preserve the backward
> compatibility?
> 
> Should we add a section for i386, which duplicates efer, or just version_id of the main VMSD should
> be updated?

You could do:

#ifdef TARGET_X86_64
        VMSTATE_UINT64(env.efer, X86CPU),
        VMSTATE_UINT64(env.star, X86CPU),
...

to become:

        VMSTATE_UINT64_TEST(env.efer, X86CPU, efer_needed)
#ifdef TARGET_X86_64
        VMSTATE_UINT64(env.star, X86CPU),


and then make efer_needed a function that returns true if
TARGET_X86_64 or it's a new machine type that knows about whatever
you're going to do with it.

Dave

>  
> 
> Pavel Dovgalyuk
> 
>  
> 
--
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-29 11:30 ` Dr. David Alan Gilbert
@ 2019-05-29 11:39   ` Paolo Bonzini
  2019-05-29 11:53     ` Pavel Dovgalyuk
  0 siblings, 1 reply; 11+ messages in thread
From: Paolo Bonzini @ 2019-05-29 11:39 UTC (permalink / raw)
  To: Dr. David Alan Gilbert, Pavel Dovgalyuk
  Cc: quintela, qemu-devel, ehabkost, rth

On 29/05/19 13:30, Dr. David Alan Gilbert wrote:
>> Should we add a section for i386, which duplicates efer, or just version_id of the main VMSD should
>> be updated?
> 
> You could do:
> 
> #ifdef TARGET_X86_64
>         VMSTATE_UINT64(env.efer, X86CPU),
>         VMSTATE_UINT64(env.star, X86CPU),
> ...
> 
> to become:
> 
>         VMSTATE_UINT64_TEST(env.efer, X86CPU, efer_needed)
> #ifdef TARGET_X86_64
>         VMSTATE_UINT64(env.star, X86CPU),
> 
> 
> and then make efer_needed a function that returns true if
> TARGET_X86_64 or it's a new machine type that knows about whatever
> you're going to do with it.

I prefer adding a subsection for 32-bit, so that EFER is saved/restored
if nonzero.

Paolo



^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-29 11:39   ` Paolo Bonzini
@ 2019-05-29 11:53     ` Pavel Dovgalyuk
  2019-05-29 12:36       ` Dr. David Alan Gilbert
  0 siblings, 1 reply; 11+ messages in thread
From: Pavel Dovgalyuk @ 2019-05-29 11:53 UTC (permalink / raw)
  To: 'Paolo Bonzini', 'Dr. David Alan Gilbert'
  Cc: quintela, qemu-devel, ehabkost, rth

> From: Paolo Bonzini [mailto:pbonzini@redhat.com]
> On 29/05/19 13:30, Dr. David Alan Gilbert wrote:
> >> Should we add a section for i386, which duplicates efer, or just version_id of the main
> VMSD should
> >> be updated?
> >
> > You could do:
> >
> > #ifdef TARGET_X86_64
> >         VMSTATE_UINT64(env.efer, X86CPU),
> >         VMSTATE_UINT64(env.star, X86CPU),
> > ...
> >
> > to become:
> >
> >         VMSTATE_UINT64_TEST(env.efer, X86CPU, efer_needed)
> > #ifdef TARGET_X86_64
> >         VMSTATE_UINT64(env.star, X86CPU),
> >
> >
> > and then make efer_needed a function that returns true if
> > TARGET_X86_64 or it's a new machine type that knows about whatever
> > you're going to do with it.
> 
> I prefer adding a subsection for 32-bit, so that EFER is saved/restored
> if nonzero.

The question is: should we remove EFER from the original VMSD?

Pavel Dovgalyuk



^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-29 11:53     ` Pavel Dovgalyuk
@ 2019-05-29 12:36       ` Dr. David Alan Gilbert
  2019-05-29 14:03         ` Pavel Dovgalyuk
  0 siblings, 1 reply; 11+ messages in thread
From: Dr. David Alan Gilbert @ 2019-05-29 12:36 UTC (permalink / raw)
  To: Pavel Dovgalyuk
  Cc: 'Paolo Bonzini', quintela, qemu-devel, ehabkost, rth

* Pavel Dovgalyuk (dovgaluk@ispras.ru) wrote:
> > From: Paolo Bonzini [mailto:pbonzini@redhat.com]
> > On 29/05/19 13:30, Dr. David Alan Gilbert wrote:
> > >> Should we add a section for i386, which duplicates efer, or just version_id of the main
> > VMSD should
> > >> be updated?
> > >
> > > You could do:
> > >
> > > #ifdef TARGET_X86_64
> > >         VMSTATE_UINT64(env.efer, X86CPU),
> > >         VMSTATE_UINT64(env.star, X86CPU),
> > > ...
> > >
> > > to become:
> > >
> > >         VMSTATE_UINT64_TEST(env.efer, X86CPU, efer_needed)
> > > #ifdef TARGET_X86_64
> > >         VMSTATE_UINT64(env.star, X86CPU),
> > >
> > >
> > > and then make efer_needed a function that returns true if
> > > TARGET_X86_64 or it's a new machine type that knows about whatever
> > > you're going to do with it.
> > 
> > I prefer adding a subsection for 32-bit, so that EFER is saved/restored
> > if nonzero.
> 
> The question is: should we remove EFER from the original VMSD?

No, because that would break 64bit compat.

Dave

> Pavel Dovgalyuk
> 
--
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-29 12:36       ` Dr. David Alan Gilbert
@ 2019-05-29 14:03         ` Pavel Dovgalyuk
  0 siblings, 0 replies; 11+ messages in thread
From: Pavel Dovgalyuk @ 2019-05-29 14:03 UTC (permalink / raw)
  To: 'Dr. David Alan Gilbert'
  Cc: 'Paolo Bonzini', quintela, qemu-devel, ehabkost, rth

> From: Dr. David Alan Gilbert [mailto:dgilbert@redhat.com]
> * Pavel Dovgalyuk (dovgaluk@ispras.ru) wrote:
> > > From: Paolo Bonzini [mailto:pbonzini@redhat.com]
> > > On 29/05/19 13:30, Dr. David Alan Gilbert wrote:
> > > >> Should we add a section for i386, which duplicates efer, or just version_id of the main
> > > VMSD should
> > > >> be updated?
> > > >
> > > > You could do:
> > > >
> > > > #ifdef TARGET_X86_64
> > > >         VMSTATE_UINT64(env.efer, X86CPU),
> > > >         VMSTATE_UINT64(env.star, X86CPU),
> > > > ...
> > > >
> > > > to become:
> > > >
> > > >         VMSTATE_UINT64_TEST(env.efer, X86CPU, efer_needed)
> > > > #ifdef TARGET_X86_64
> > > >         VMSTATE_UINT64(env.star, X86CPU),
> > > >
> > > >
> > > > and then make efer_needed a function that returns true if
> > > > TARGET_X86_64 or it's a new machine type that knows about whatever
> > > > you're going to do with it.
> > >
> > > I prefer adding a subsection for 32-bit, so that EFER is saved/restored
> > > if nonzero.
> >
> > The question is: should we remove EFER from the original VMSD?
> 
> No, because that would break 64bit compat.

Thanks. Already posted a patch here:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg06796.html

Pavel Dovgalyuk



^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-29 11:26 [Qemu-devel] i386: EFER vs 32-bit CPU Pavel Dovgalyuk
  2019-05-29 11:30 ` Dr. David Alan Gilbert
@ 2019-05-30  0:52 ` Peter Xu
  2019-05-30  5:54   ` Pavel Dovgalyuk
  2019-05-30 11:00 ` TeLeMan
  2 siblings, 1 reply; 11+ messages in thread
From: Peter Xu @ 2019-05-30  0:52 UTC (permalink / raw)
  To: Pavel Dovgalyuk; +Cc: ehabkost, quintela, dgilbert, qemu-devel, pbonzini, rth

On Wed, May 29, 2019 at 02:26:39PM +0300, Pavel Dovgalyuk wrote:
> Hello!
> 
>  
> 
> I found this while debugging the inconsistent saved/restored state of the virtual machine.
> 
>  
> 
> i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault processing).

Sorry if this question is elementary, but... why would a 32bit guest
use IA32_EFER?  From SDM I only see 4 bits defined in this MSR (SCE,
LME, LMA, NXE) but is there any of them that should be set in a 32bit
guest?

Regards,

-- 
Peter Xu


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-30  0:52 ` Peter Xu
@ 2019-05-30  5:54   ` Pavel Dovgalyuk
  2019-05-30  9:00     ` Peter Xu
  0 siblings, 1 reply; 11+ messages in thread
From: Pavel Dovgalyuk @ 2019-05-30  5:54 UTC (permalink / raw)
  To: 'Peter Xu'
  Cc: ehabkost, quintela, dgilbert, qemu-devel, pbonzini, rth

> From: Peter Xu [mailto:peterx@redhat.com]
> On Wed, May 29, 2019 at 02:26:39PM +0300, Pavel Dovgalyuk wrote:
> > Hello!
> >
> >
> >
> > I found this while debugging the inconsistent saved/restored state of the virtual machine.
> >
> >
> >
> > i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault processing).
> 
> Sorry if this question is elementary, but... why would a 32bit guest
> use IA32_EFER?  From SDM I only see 4 bits defined in this MSR (SCE,
> LME, LMA, NXE) but is there any of them that should be set in a 32bit
> guest?

Ubuntu server 16.04 (32 bit) sets NXE while booting.
NXE affects the MMU fault processing and exception generation.

Pavel Dovgalyuk



^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-30  5:54   ` Pavel Dovgalyuk
@ 2019-05-30  9:00     ` Peter Xu
  2019-05-30  9:04       ` Peter Xu
  0 siblings, 1 reply; 11+ messages in thread
From: Peter Xu @ 2019-05-30  9:00 UTC (permalink / raw)
  To: Pavel Dovgalyuk; +Cc: ehabkost, quintela, dgilbert, qemu-devel, pbonzini, rth

On Thu, May 30, 2019 at 08:54:38AM +0300, Pavel Dovgalyuk wrote:
> > From: Peter Xu [mailto:peterx@redhat.com]
> > On Wed, May 29, 2019 at 02:26:39PM +0300, Pavel Dovgalyuk wrote:
> > > Hello!
> > >
> > >
> > >
> > > I found this while debugging the inconsistent saved/restored state of the virtual machine.
> > >
> > >
> > >
> > > i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault processing).
> > 
> > Sorry if this question is elementary, but... why would a 32bit guest
> > use IA32_EFER?  From SDM I only see 4 bits defined in this MSR (SCE,
> > LME, LMA, NXE) but is there any of them that should be set in a 32bit
> > guest?
> 
> Ubuntu server 16.04 (32 bit) sets NXE while booting.
> NXE affects the MMU fault processing and exception generation.

But this is what I read from the spec (SDM 4.6.1):

Instruction fetches:

  - Access rights depend on the mode of the linear address, the paging
    mode, and the value of IA32_EFER.NXE:

    - For 32-bit paging or if IA32_EFER.NXE = 0, instructions may be
      fetched from any user-mode address.

    - For PAE paging or 4-level paging with IA32_EFER.NXE = 1,
      instructions may be fetched from any user-mode address with a
      translation for which the XD flag is 0 in every paging-structure
      entry controlling the translation.

    - Instructions may not be fetched from any supervisor-mode address.

I'm not an expert of x86 arch but it seems to me that no matter what
NXE bit should be meaningless on x86 32bit according to above.

Also, above spec seems to match with the kvm code too, since in
init_kvm_tdp_mmu() where kvm_mmu.nx is only set with either long mode
or PAE, but never 32bit.  So I'm a bit confused on why that should be
migrated for 32bit (or even, whether should EFER MSR be visible to
such a guest at all?).

Regards,

-- 
Peter Xu


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-30  9:00     ` Peter Xu
@ 2019-05-30  9:04       ` Peter Xu
  0 siblings, 0 replies; 11+ messages in thread
From: Peter Xu @ 2019-05-30  9:04 UTC (permalink / raw)
  To: Pavel Dovgalyuk; +Cc: ehabkost, quintela, dgilbert, qemu-devel, pbonzini, rth

On Thu, May 30, 2019 at 05:00:28PM +0800, Peter Xu wrote:
> On Thu, May 30, 2019 at 08:54:38AM +0300, Pavel Dovgalyuk wrote:
> > > From: Peter Xu [mailto:peterx@redhat.com]
> > > On Wed, May 29, 2019 at 02:26:39PM +0300, Pavel Dovgalyuk wrote:
> > > > Hello!
> > > >
> > > >
> > > >
> > > > I found this while debugging the inconsistent saved/restored state of the virtual machine.
> > > >
> > > >
> > > >
> > > > i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault processing).
> > > 
> > > Sorry if this question is elementary, but... why would a 32bit guest
> > > use IA32_EFER?  From SDM I only see 4 bits defined in this MSR (SCE,
> > > LME, LMA, NXE) but is there any of them that should be set in a 32bit
> > > guest?
> > 
> > Ubuntu server 16.04 (32 bit) sets NXE while booting.
> > NXE affects the MMU fault processing and exception generation.
> 
> But this is what I read from the spec (SDM 4.6.1):
> 
> Instruction fetches:
> 
>   - Access rights depend on the mode of the linear address, the paging
>     mode, and the value of IA32_EFER.NXE:
> 
>     - For 32-bit paging or if IA32_EFER.NXE = 0, instructions may be
>       fetched from any user-mode address.
> 
>     - For PAE paging or 4-level paging with IA32_EFER.NXE = 1,
>       instructions may be fetched from any user-mode address with a
>       translation for which the XD flag is 0 in every paging-structure
>       entry controlling the translation.
> 
>     - Instructions may not be fetched from any supervisor-mode address.
> 
> I'm not an expert of x86 arch but it seems to me that no matter what
> NXE bit should be meaningless on x86 32bit according to above.
> 
> Also, above spec seems to match with the kvm code too, since in
> init_kvm_tdp_mmu() where kvm_mmu.nx is only set with either long mode
> or PAE, but never 32bit.  So I'm a bit confused on why that should be
> migrated for 32bit (or even, whether should EFER MSR be visible to
> such a guest at all?).

Ouch, I obviously overlooked on that PAE is 32bit... I am sorry for
the noise.

-- 
Peter Xu


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] i386: EFER vs 32-bit CPU
  2019-05-29 11:26 [Qemu-devel] i386: EFER vs 32-bit CPU Pavel Dovgalyuk
  2019-05-29 11:30 ` Dr. David Alan Gilbert
  2019-05-30  0:52 ` Peter Xu
@ 2019-05-30 11:00 ` TeLeMan
  2 siblings, 0 replies; 11+ messages in thread
From: TeLeMan @ 2019-05-30 11:00 UTC (permalink / raw)
  To: Pavel Dovgalyuk
  Cc: ehabkost, Juan Quintela, dgilbert, qemu-devel, Paolo Bonzini,
	Richard Henderson

On Wed, May 29, 2019 at 7:27 PM Pavel Dovgalyuk <dovgaluk@ispras.ru> wrote:
>
> Hello!
>
>
>
> I found this while debugging the inconsistent saved/restored state of the virtual machine.
>
>
>
> i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault processing).
>
> But it does not included in VMState, because "efer" field is disabled with #ifdef TARGET_X86_64
>
>
>
> I think that efer should be saved for i386 too, but how it should be made to preserve the backward
> compatibility?
>
> Should we add a section for i386, which duplicates efer, or just version_id of the main VMSD should
> be updated?
>
>
>
> Pavel Dovgalyuk
>
>
>

Nobody followed this issue 10 years ago:

https://lists.gnu.org/archive/html/qemu-devel/2009-10/msg01765.html


^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2019-05-30 11:01 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-29 11:26 [Qemu-devel] i386: EFER vs 32-bit CPU Pavel Dovgalyuk
2019-05-29 11:30 ` Dr. David Alan Gilbert
2019-05-29 11:39   ` Paolo Bonzini
2019-05-29 11:53     ` Pavel Dovgalyuk
2019-05-29 12:36       ` Dr. David Alan Gilbert
2019-05-29 14:03         ` Pavel Dovgalyuk
2019-05-30  0:52 ` Peter Xu
2019-05-30  5:54   ` Pavel Dovgalyuk
2019-05-30  9:00     ` Peter Xu
2019-05-30  9:04       ` Peter Xu
2019-05-30 11:00 ` TeLeMan

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