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* [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
@ 2021-04-06 22:48 Alistair Francis
  2021-04-07  1:40 ` Bin Meng
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Alistair Francis @ 2021-04-06 22:48 UTC (permalink / raw)
  To: qemu-devel, qemu-riscv
  Cc: sagark, kbastian, alistair.francis, alistair23, palmer, bmeng.cn

Update the RISC-V maintainers by removing Sagar and Bastian who haven't
been involved recently.

Also add Bin who has been helping with reviews.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
I have run this by all of the people involved and they are all ok with
the change.

 MAINTAINERS | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 69003cdc3c..541bd264b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -295,9 +295,8 @@ F: tests/acceptance/machine_ppc.py
 
 RISC-V TCG CPUs
 M: Palmer Dabbelt <palmer@dabbelt.com>
-M: Alistair Francis <Alistair.Francis@wdc.com>
-M: Sagar Karandikar <sagark@eecs.berkeley.edu>
-M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
+M: Alistair Francis <alistair.francis@wdc.com>
+M: Bin Meng <bin.meng@windriver.com>
 L: qemu-riscv@nongnu.org
 S: Supported
 F: target/riscv/
-- 
2.31.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2021-04-07 14:28 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-06 22:48 [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers Alistair Francis
2021-04-07  1:40 ` Bin Meng
2021-04-07  8:14 ` Bastian Koppelmann
2021-04-07 12:15 ` Philippe Mathieu-Daudé
2021-04-07 14:23 ` Alistair Francis

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