From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: Alistair Francis <alistair23@gmail.com>,
Palmer Dabbelt <palmer@sifive.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v1 6/6] riscv/virt: Jump to pflash if specified
Date: Fri, 20 Sep 2019 13:15:04 +0800 [thread overview]
Message-ID: <CAEUhbmVcupHEesoyrfnyCfSUg4Q8pZnyUt=3hpC_g11BL1wxwg@mail.gmail.com> (raw)
In-Reply-To: <a3649f52a79eff39c707546d88ecd25b753dbf33.1568931866.git.alistair.francis@wdc.com>
On Fri, Sep 20, 2019 at 6:35 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> If the user supplied pflash to QEMU then change the reset code to jump
> to the pflash base address instead of the DRAM base address.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> hw/riscv/virt.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index ca002ecea7..ed25cc6761 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -441,6 +441,7 @@ static void riscv_virt_board_init(MachineState *machine)
> MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
> char *plic_hart_config;
> size_t plic_hart_config_len;
> + target_ulong start_addr = memmap[VIRT_DRAM].base;
> int i;
> unsigned int smp_cpus = machine->smp.cpus;
>
> @@ -487,6 +488,13 @@ static void riscv_virt_board_init(MachineState *machine)
> }
> }
>
> + if (drive_get(IF_PFLASH, 0, 0)) {
> + /* Pflash was supplied, let's overwrite the address we jump to after
nits: wrong multi-line comment format
> + * reset to the base of the flash.
> + */
> + start_addr = virt_memmap[VIRT_FLASH].base;
> + }
> +
> /* reset vector */
> uint32_t reset_vec[8] = {
> 0x00000297, /* 1: auipc t0, %pcrel_hi(dtb) */
> @@ -499,7 +507,7 @@ static void riscv_virt_board_init(MachineState *machine)
> #endif
> 0x00028067, /* jr t0 */
> 0x00000000,
> - memmap[VIRT_DRAM].base, /* start: .dword memmap[VIRT_DRAM].base */
> + start_addr, /* start: .dword */
> 0x00000000,
> /* dtb: */
> };
> --
Otherwise,
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
next prev parent reply other threads:[~2019-09-20 5:17 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-19 22:24 [PATCH v1 0/6] RISC-V: Add more machine memory Alistair Francis
2019-09-19 22:24 ` [PATCH v1 1/6] riscv/sifive_u: Add L2-LIM cache memory Alistair Francis
2019-09-20 5:15 ` Bin Meng
2019-09-19 22:24 ` [PATCH v1 2/6] riscv/sifive_u: Add QSPI memory region Alistair Francis
2019-09-20 5:15 ` Bin Meng
2019-09-19 22:25 ` [PATCH v1 3/6] riscv/sifive_u: Manually define the machine Alistair Francis
2019-09-20 5:15 ` Bin Meng
2019-09-19 22:25 ` [PATCH v1 4/6] riscv/sifive_u: Add the start-in-flash property Alistair Francis
2019-09-20 5:15 ` Bin Meng
2019-09-20 22:07 ` Alistair Francis
2019-09-22 2:19 ` Bin Meng
2019-09-23 17:51 ` Alistair Francis
2019-09-24 0:57 ` Bin Meng
2019-09-19 22:25 ` [PATCH v1 5/6] riscv/virt: Add the PFlash CFI01 device Alistair Francis
2019-09-20 5:15 ` Bin Meng
2019-09-20 22:12 ` Alistair Francis
2019-09-22 2:15 ` Bin Meng
2019-09-23 20:08 ` Alistair Francis
2019-09-23 21:46 ` Peter Maydell
2019-09-24 9:32 ` Philippe Mathieu-Daudé
2019-09-24 17:12 ` Laszlo Ersek
2019-09-25 0:55 ` Alistair Francis
2019-09-25 11:15 ` Philippe Mathieu-Daudé
2019-09-25 0:54 ` Alistair Francis
2019-09-25 9:00 ` Markus Armbruster
2019-09-27 21:49 ` Alistair Francis
2019-09-19 22:25 ` [PATCH v1 6/6] riscv/virt: Jump to pflash if specified Alistair Francis
2019-09-20 5:15 ` Bin Meng [this message]
2019-09-23 9:09 ` Philippe Mathieu-Daudé
2019-09-20 22:40 ` [PATCH v1 0/6] RISC-V: Add more machine memory Palmer Dabbelt
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