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* [PATCH] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register
@ 2020-02-15 16:19 Philippe Mathieu-Daudé
  2020-02-17 10:22 ` Peter Maydell
  0 siblings, 1 reply; 3+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-02-15 16:19 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, qemu-arm, Philippe Mathieu-Daudé

Fix warning reported by Clang static code analyzer:

    CC      hw/misc/iotkit-secctl.o
  hw/misc/iotkit-secctl.c:343:9: warning: Value stored to 'value' is never read
          value &= 0x00f000f3;
          ^        ~~~~~~~~~~

Fixes: b3717c23e1c
Reported-by: Clang Static Analyzer
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/misc/iotkit-secctl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
index 609869821a..0d5556dd17 100644
--- a/hw/misc/iotkit-secctl.c
+++ b/hw/misc/iotkit-secctl.c
@@ -340,7 +340,7 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
         qemu_set_irq(s->sec_resp_cfg, s->secrespcfg);
         break;
     case A_SECPPCINTCLR:
-        value &= 0x00f000f3;
+        s->secppcintstat = ~value & 0x00f000f3;
         foreach_ppc(s, iotkit_secctl_ppc_update_irq_clear);
         break;
     case A_SECPPCINTEN:
-- 
2.21.1



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register
  2020-02-15 16:19 [PATCH] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register Philippe Mathieu-Daudé
@ 2020-02-17 10:22 ` Peter Maydell
  2020-02-17 10:57   ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 3+ messages in thread
From: Peter Maydell @ 2020-02-17 10:22 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé; +Cc: qemu-arm, QEMU Developers

On Sat, 15 Feb 2020 at 16:19, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Fix warning reported by Clang static code analyzer:
>
>     CC      hw/misc/iotkit-secctl.o
>   hw/misc/iotkit-secctl.c:343:9: warning: Value stored to 'value' is never read
>           value &= 0x00f000f3;
>           ^        ~~~~~~~~~~
>
> Fixes: b3717c23e1c
> Reported-by: Clang Static Analyzer
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/misc/iotkit-secctl.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
> index 609869821a..0d5556dd17 100644
> --- a/hw/misc/iotkit-secctl.c
> +++ b/hw/misc/iotkit-secctl.c
> @@ -340,7 +340,7 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
>          qemu_set_irq(s->sec_resp_cfg, s->secrespcfg);
>          break;
>      case A_SECPPCINTCLR:
> -        value &= 0x00f000f3;
> +        s->secppcintstat = ~value & 0x00f000f3;

This is (obviously) a bug, but I don't think your fix is right.
This register has bits which are write-one-to-clear,
(plus some other bits that are reserved and RAZ/WI)
so we want:
  s->secppcintstat &= ~(value & 0x00f000f3);

(In particular bitwise-not has higher precedence than
bitwise-and, so your expression will end up writing zero
to s->specppcintstat for any valid guest write.)

My guess is that when I originally wrote the code I meant
to write something like
   value &= 0x00f000f3;
   s->secppcintstat &= ~value;
and forgot the second line.

thanks
-- PMM


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register
  2020-02-17 10:22 ` Peter Maydell
@ 2020-02-17 10:57   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 3+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-02-17 10:57 UTC (permalink / raw)
  To: Peter Maydell; +Cc: qemu-arm, QEMU Developers

On Mon, Feb 17, 2020 at 11:22 AM Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Sat, 15 Feb 2020 at 16:19, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> >
> > Fix warning reported by Clang static code analyzer:
> >
> >     CC      hw/misc/iotkit-secctl.o
> >   hw/misc/iotkit-secctl.c:343:9: warning: Value stored to 'value' is never read
> >           value &= 0x00f000f3;
> >           ^        ~~~~~~~~~~
> >
> > Fixes: b3717c23e1c
> > Reported-by: Clang Static Analyzer
> > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > ---
> >  hw/misc/iotkit-secctl.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
> > index 609869821a..0d5556dd17 100644
> > --- a/hw/misc/iotkit-secctl.c
> > +++ b/hw/misc/iotkit-secctl.c
> > @@ -340,7 +340,7 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
> >          qemu_set_irq(s->sec_resp_cfg, s->secrespcfg);
> >          break;
> >      case A_SECPPCINTCLR:
> > -        value &= 0x00f000f3;
> > +        s->secppcintstat = ~value & 0x00f000f3;
>
> This is (obviously) a bug, but I don't think your fix is right.
> This register has bits which are write-one-to-clear,
> (plus some other bits that are reserved and RAZ/WI)
> so we want:
>   s->secppcintstat &= ~(value & 0x00f000f3);
>
> (In particular bitwise-not has higher precedence than
> bitwise-and, so your expression will end up writing zero
> to s->specppcintstat for any valid guest write.)

Oops indeed :)

> My guess is that when I originally wrote the code I meant
> to write something like
>    value &= 0x00f000f3;
>    s->secppcintstat &= ~value;
> and forgot the second line.
>
> thanks
> -- PMM


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-02-17 10:58 UTC | newest]

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2020-02-15 16:19 [PATCH] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register Philippe Mathieu-Daudé
2020-02-17 10:22 ` Peter Maydell
2020-02-17 10:57   ` Philippe Mathieu-Daudé

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