From: Peter Maydell <peter.maydell@linaro.org>
To: QEMU Developers <qemu-devel@nongnu.org>,
Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PULL 00/34] target-arm queue
Date: Mon, 11 May 2020 15:25:08 +0100 [thread overview]
Message-ID: <CAFEAcA8r61ohVvm1QO2kZUk0veA2yvU60KS2pHWuqA8ALK5KMQ@mail.gmail.com> (raw)
In-Reply-To: <CAFEAcA9PZ2S1uiC7dOorOW19m7hkH7b0JmYiO4ay8QSrTvp3kQ@mail.gmail.com>
On Mon, 11 May 2020 at 15:03, Peter Maydell <peter.maydell@linaro.org> wrote:
> Hmm. I get this link failure, but only on non-x86 hosts
> (aarch64, ppc, s390 [aarch32 ran into a temporary connectivity
> problem and didn't run]):
>
> linux-user/vm86.o: In function `do_int':
> /home/pm/qemu/linux-user/vm86.c:224: undefined reference to `cpu_ldl_data'
This seems to be because we're using a stale vm86.o (if you touch
linux-user/vm86.c then the build succeeds), which is in turn
because the build tree has i386-linux-user/linux-user/vm86.o but
no i386-linux-user/linux-user/vm86.d so it has no dependency
file to tell it that the header change means the object file
needs rebuilding. I have no idea how a build tree could get into
that state -- half the .o files in the i386-linux-user/linux-user/
directory have no .d, but half do...
thanks
-- PMM
next prev parent reply other threads:[~2020-05-11 14:27 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-11 13:33 [PULL 00/34] target-arm queue Peter Maydell
2020-05-11 13:33 ` [PULL 01/34] aspeed: Add boot stub for smp booting Peter Maydell
2020-05-11 13:33 ` [PULL 02/34] target/arm: Drop access_el3_aa32ns_aa64any() Peter Maydell
2020-05-11 13:33 ` [PULL 03/34] aspeed: Support AST2600A1 silicon revision Peter Maydell
2020-05-11 13:33 ` [PULL 04/34] aspeed: sdmc: Implement AST2600 locking behaviour Peter Maydell
2020-05-11 13:33 ` [PULL 05/34] hw/arm/nrf51: Add NRF51_PERIPHERAL_SIZE definition Peter Maydell
2020-05-11 13:33 ` [PULL 06/34] hw/timer/nrf51_timer: Display timer ID in trace events Peter Maydell
2020-05-11 13:33 ` [PULL 07/34] hw/timer/nrf51_timer: Add trace event of counter value update Peter Maydell
2020-05-11 13:33 ` [PULL 08/34] exec: Add block comments for watchpoint routines Peter Maydell
2020-05-11 13:33 ` [PULL 09/34] exec: Fix cpu_watchpoint_address_matches address length Peter Maydell
2020-05-11 13:33 ` [PULL 10/34] accel/tcg: Add block comment for probe_access Peter Maydell
2020-05-11 13:33 ` [PULL 11/34] accel/tcg: Adjust probe_access call to page_check_range Peter Maydell
2020-05-11 13:33 ` [PULL 12/34] accel/tcg: Add probe_access_flags Peter Maydell
2020-05-11 13:33 ` [PULL 13/34] accel/tcg: Add endian-specific cpu_{ld, st}* operations Peter Maydell
2020-05-11 13:33 ` [PULL 14/34] target/arm: Use cpu_*_data_ra for sve_ldst_tlb_fn Peter Maydell
2020-05-11 13:33 ` [PULL 15/34] target/arm: Drop manual handling of set/clear_helper_retaddr Peter Maydell
2020-05-11 13:33 ` [PULL 16/34] target/arm: Add sve infrastructure for page lookup Peter Maydell
2020-05-11 13:33 ` [PULL 17/34] target/arm: Adjust interface of sve_ld1_host_fn Peter Maydell
2020-05-11 13:33 ` [PULL 18/34] target/arm: Use SVEContLdSt in sve_ld1_r Peter Maydell
2020-05-11 13:33 ` [PULL 19/34] target/arm: Handle watchpoints " Peter Maydell
2020-05-11 13:33 ` [PULL 20/34] target/arm: Use SVEContLdSt for multi-register contiguous loads Peter Maydell
2020-05-11 13:33 ` [PULL 21/34] target/arm: Update contiguous first-fault and no-fault loads Peter Maydell
2020-05-11 13:33 ` [PULL 22/34] target/arm: Use SVEContLdSt for contiguous stores Peter Maydell
2020-05-11 13:33 ` [PULL 23/34] target/arm: Reuse sve_probe_page for gather first-fault loads Peter Maydell
2020-05-11 13:33 ` [PULL 24/34] target/arm: Reuse sve_probe_page for scatter stores Peter Maydell
2020-05-11 13:33 ` [PULL 25/34] target/arm: Reuse sve_probe_page for gather loads Peter Maydell
2020-05-11 13:33 ` [PULL 26/34] target/arm: Remove sve_memopidx Peter Maydell
2020-05-11 13:33 ` [PULL 27/34] target/arm/kvm: Inline set_feature() calls Peter Maydell
2020-05-11 13:33 ` [PULL 28/34] target/arm: Make set_feature() available for other files Peter Maydell
2020-05-11 13:34 ` [PULL 29/34] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[] Peter Maydell
2020-05-11 13:34 ` [PULL 30/34] target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUs Peter Maydell
2020-05-11 13:34 ` [PULL 31/34] target/arm: Restrict TCG cpus to TCG accel Peter Maydell
2020-05-11 13:34 ` [PULL 32/34] hw/arm/musicpal: Map the UART devices unconditionally Peter Maydell
2020-05-11 13:34 ` [PULL 33/34] target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA Peter Maydell
2020-05-11 13:34 ` [PULL 34/34] target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed) Peter Maydell
2020-05-11 14:03 ` [PULL 00/34] target-arm queue Peter Maydell
2020-05-11 14:25 ` Peter Maydell [this message]
2020-05-11 15:17 ` no-reply
2020-05-11 15:44 ` Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2023-01-05 16:43 Peter Maydell
2023-01-06 12:10 ` Peter Maydell
2020-07-03 16:53 Peter Maydell
2020-07-03 17:50 ` no-reply
2020-07-04 17:43 ` Peter Maydell
2019-12-16 11:08 Peter Maydell
2019-12-16 14:07 ` Peter Maydell
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