From: Peter Maydell <peter.maydell@linaro.org>
To: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PULL 00/34] target-arm queue
Date: Mon, 16 Dec 2019 14:07:27 +0000 [thread overview]
Message-ID: <CAFEAcA98eUpMieL3z3PFake18LeSQmX=aL8cmgUqotii5-+8LQ@mail.gmail.com> (raw)
In-Reply-To: <20191216110904.30815-1-peter.maydell@linaro.org>
On Mon, 16 Dec 2019 at 11:09, Peter Maydell <peter.maydell@linaro.org> wrote:
>
>
> First arm pullreq of 5.0!
>
> The following changes since commit 084a398bf8aa7634738e6c6c0103236ee1b3b72f:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging (2019-12-13 18:14:07 +0000)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20191216-1
>
> for you to fetch changes up to f80741d107673f162e3b097fc76a1590036cc9d1:
>
> target/arm: ensure we use current exception state after SCR update (2019-12-16 10:52:58 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Add support for Cortex-M7 CPU
> * exynos4210_gic: Suppress gcc9 format-truncation warnings
> * aspeed: Various minor bug fixes and improvements
> * aspeed: Add support for the tacoma-bmc board
> * Honour HCR_EL32.TID1 and .TID2 trapping requirements
> * Handle trapping to EL2 of AArch32 VMRS instructions
> * Handle AArch32 CP15 trapping via HSTR_EL2
> * Add support for missing Jazelle system registers
> * arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on
> * Add support for DC CVAP & DC CVADP instructions
> * Fix assertion when SCR.NS is changed in Secure-SVC &c
> * enable SHPC native hot plug in arm ACPI
>
> ----------------------------------------------------------------
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.0
for any user-visible changes.
-- PMM
next prev parent reply other threads:[~2019-12-16 14:16 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-16 11:08 [PULL 00/34] target-arm queue Peter Maydell
2019-12-16 11:08 ` [PULL 01/34] target/arm: Add support for cortex-m7 CPU Peter Maydell
2019-12-16 11:08 ` [PULL 02/34] exynos4210_gic: Suppress gcc9 format-truncation warnings Peter Maydell
2019-12-16 11:08 ` [PULL 03/34] aspeed/i2c: Add support for pool buffer transfers Peter Maydell
2019-12-16 11:08 ` [PULL 04/34] aspeed/i2c: Check SRAM enablement on AST2500 Peter Maydell
2019-12-16 11:08 ` [PULL 05/34] aspeed: Add a DRAM memory region at the SoC level Peter Maydell
2019-12-16 11:08 ` [PULL 06/34] aspeed/i2c: Add support for DMA transfers Peter Maydell
2019-12-16 11:08 ` [PULL 07/34] aspeed/i2c: Add trace events Peter Maydell
2019-12-16 11:08 ` [PULL 08/34] aspeed/sdmc: Make ast2600 default 1G Peter Maydell
2019-12-16 11:08 ` [PULL 09/34] aspeed/scu: Fix W1C behavior Peter Maydell
2019-12-16 11:08 ` [PULL 10/34] watchdog/aspeed: Improve watchdog timeout message Peter Maydell
2019-12-16 11:08 ` [PULL 11/34] watchdog/aspeed: Fix AST2600 frequency behaviour Peter Maydell
2019-12-16 11:08 ` [PULL 12/34] aspeed/smc: Restore default AHB window mapping at reset Peter Maydell
2019-12-16 11:08 ` [PULL 13/34] aspeed/smc: Do not map disabled segment on the AST2600 Peter Maydell
2019-12-16 11:08 ` [PULL 14/34] aspeed/smc: Add AST2600 timings registers Peter Maydell
2019-12-16 11:08 ` [PULL 15/34] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass Peter Maydell
2019-12-16 11:08 ` [PULL 16/34] aspeed: Add support for the tacoma-bmc board Peter Maydell
2019-12-16 11:08 ` [PULL 17/34] gpio: fix memory leak in aspeed_gpio_init() Peter Maydell
2019-12-16 11:08 ` [PULL 18/34] aspeed: Change the "scu" property definition Peter Maydell
2019-12-16 11:08 ` [PULL 19/34] aspeed: Change the "nic" " Peter Maydell
2019-12-16 11:08 ` [PULL 20/34] target/arm: Honor HCR_EL2.TID2 trapping requirements Peter Maydell
2019-12-16 11:08 ` [PULL 21/34] target/arm: Honor HCR_EL2.TID1 " Peter Maydell
2019-12-16 11:08 ` [PULL 22/34] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions Peter Maydell
2019-12-16 11:08 ` [PULL 23/34] target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 Peter Maydell
2019-12-16 11:08 ` [PULL 24/34] target/arm: Add support for missing Jazelle system registers Peter Maydell
2019-12-16 11:08 ` [PULL 25/34] arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() Peter Maydell
2019-12-16 11:08 ` [PULL 26/34] tcg: cputlb: Add probe_read Peter Maydell
2019-12-16 11:08 ` [PULL 27/34] Memory: Enable writeback for given memory region Peter Maydell
2019-12-16 11:08 ` [PULL 28/34] migration: ram: Switch to ram block writeback Peter Maydell
2019-12-16 11:08 ` [PULL 29/34] target/arm: Add support for DC CVAP & DC CVADP ins Peter Maydell
2019-12-16 11:09 ` [PULL 30/34] hw/arm/sbsa-ref: Simplify by moving the gic in the machine state Peter Maydell
2019-12-16 11:09 ` [PULL 31/34] hw/arm/acpi: simplify AML bit and/or statement Peter Maydell
2019-12-16 11:09 ` [PULL 32/34] hw/arm/acpi: enable SHPC native hot plug Peter Maydell
2019-12-16 11:09 ` [PULL 33/34] hw/arm/virt: Simplify by moving the gic in the machine state Peter Maydell
2019-12-16 11:09 ` [PULL 34/34] target/arm: ensure we use current exception state after SCR update Peter Maydell
2019-12-16 14:07 ` Peter Maydell [this message]
2020-05-11 13:33 [PULL 00/34] target-arm queue Peter Maydell
2020-05-11 14:03 ` Peter Maydell
2020-05-11 14:25 ` Peter Maydell
2020-05-11 15:17 ` no-reply
2020-05-11 15:44 ` Peter Maydell
2020-07-03 16:53 Peter Maydell
2020-07-03 17:50 ` no-reply
2020-07-04 17:43 ` Peter Maydell
2023-01-05 16:43 Peter Maydell
2023-01-06 12:10 ` Peter Maydell
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