* [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions
@ 2019-10-23 13:37 Filip Bozuta
2019-10-23 13:37 ` [PATCH 1/2] target/mips: Rearrange vector compare equal instructions Filip Bozuta
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Filip Bozuta @ 2019-10-23 13:37 UTC (permalink / raw)
To: qemu-devel; +Cc: arikalo, amarkovic, aurelien
Simplify instructions by removing unnecessary argument and creating separate
comparing functions for each instruction.
Filip Bozuta (2):
target/mips: Rearrange vector compare equal instructions
target/mips: Rearrange vector compare less than (signed) instructions
target/mips/msa_helper.c | 160 +++++++++++++++++++++++++++++------------------
1 file changed, 100 insertions(+), 60 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] target/mips: Rearrange vector compare equal instructions
2019-10-23 13:37 [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions Filip Bozuta
@ 2019-10-23 13:37 ` Filip Bozuta
2019-10-25 10:42 ` Aleksandar Markovic
2019-10-23 13:37 ` [PATCH 2/2] target/mips: Rearrange vector compare less than (signed) instructions Filip Bozuta
2019-10-25 10:46 ` [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions Aleksandar Markovic
2 siblings, 1 reply; 6+ messages in thread
From: Filip Bozuta @ 2019-10-23 13:37 UTC (permalink / raw)
To: qemu-devel; +Cc: arikalo, amarkovic, aurelien
Remove unnecessary argument and provide separate function for each
instruction.
Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com>
---
target/mips/msa_helper.c | 80 ++++++++++++++++++++++++++++++------------------
1 file changed, 50 insertions(+), 30 deletions(-)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index a2052ba..b5027e7 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -1158,28 +1158,38 @@ static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2)
return arg1 == arg2 ? -1 : 0;
}
+static inline int8_t msa_ceq_b(int8_t arg1, int8_t arg2)
+{
+ return arg1 == arg2 ? -1 : 0;
+}
+
void helper_msa_ceq_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
- pwd->b[0] = msa_ceq_df(DF_BYTE, pws->b[0], pwt->b[0]);
- pwd->b[1] = msa_ceq_df(DF_BYTE, pws->b[1], pwt->b[1]);
- pwd->b[2] = msa_ceq_df(DF_BYTE, pws->b[2], pwt->b[2]);
- pwd->b[3] = msa_ceq_df(DF_BYTE, pws->b[3], pwt->b[3]);
- pwd->b[4] = msa_ceq_df(DF_BYTE, pws->b[4], pwt->b[4]);
- pwd->b[5] = msa_ceq_df(DF_BYTE, pws->b[5], pwt->b[5]);
- pwd->b[6] = msa_ceq_df(DF_BYTE, pws->b[6], pwt->b[6]);
- pwd->b[7] = msa_ceq_df(DF_BYTE, pws->b[7], pwt->b[7]);
- pwd->b[8] = msa_ceq_df(DF_BYTE, pws->b[8], pwt->b[8]);
- pwd->b[9] = msa_ceq_df(DF_BYTE, pws->b[9], pwt->b[9]);
- pwd->b[10] = msa_ceq_df(DF_BYTE, pws->b[10], pwt->b[10]);
- pwd->b[11] = msa_ceq_df(DF_BYTE, pws->b[11], pwt->b[11]);
- pwd->b[12] = msa_ceq_df(DF_BYTE, pws->b[12], pwt->b[12]);
- pwd->b[13] = msa_ceq_df(DF_BYTE, pws->b[13], pwt->b[13]);
- pwd->b[14] = msa_ceq_df(DF_BYTE, pws->b[14], pwt->b[14]);
- pwd->b[15] = msa_ceq_df(DF_BYTE, pws->b[15], pwt->b[15]);
+ pwd->b[0] = msa_ceq_b(pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_ceq_b(pws->b[1], pwt->b[1]);
+ pwd->b[2] = msa_ceq_b(pws->b[2], pwt->b[2]);
+ pwd->b[3] = msa_ceq_b(pws->b[3], pwt->b[3]);
+ pwd->b[4] = msa_ceq_b(pws->b[4], pwt->b[4]);
+ pwd->b[5] = msa_ceq_b(pws->b[5], pwt->b[5]);
+ pwd->b[6] = msa_ceq_b(pws->b[6], pwt->b[6]);
+ pwd->b[7] = msa_ceq_b(pws->b[7], pwt->b[7]);
+ pwd->b[8] = msa_ceq_b(pws->b[8], pwt->b[8]);
+ pwd->b[9] = msa_ceq_b(pws->b[9], pwt->b[9]);
+ pwd->b[10] = msa_ceq_b(pws->b[10], pwt->b[10]);
+ pwd->b[11] = msa_ceq_b(pws->b[11], pwt->b[11]);
+ pwd->b[12] = msa_ceq_b(pws->b[12], pwt->b[12]);
+ pwd->b[13] = msa_ceq_b(pws->b[13], pwt->b[13]);
+ pwd->b[14] = msa_ceq_b(pws->b[14], pwt->b[14]);
+ pwd->b[15] = msa_ceq_b(pws->b[15], pwt->b[15]);
+}
+
+static inline int16_t msa_ceq_h(int16_t arg1, int16_t arg2)
+{
+ return arg1 == arg2 ? -1 : 0;
}
void helper_msa_ceq_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
@@ -1188,14 +1198,19 @@ void helper_msa_ceq_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
- pwd->h[0] = msa_ceq_df(DF_HALF, pws->h[0], pwt->h[0]);
- pwd->h[1] = msa_ceq_df(DF_HALF, pws->h[1], pwt->h[1]);
- pwd->h[2] = msa_ceq_df(DF_HALF, pws->h[2], pwt->h[2]);
- pwd->h[3] = msa_ceq_df(DF_HALF, pws->h[3], pwt->h[3]);
- pwd->h[4] = msa_ceq_df(DF_HALF, pws->h[4], pwt->h[4]);
- pwd->h[5] = msa_ceq_df(DF_HALF, pws->h[5], pwt->h[5]);
- pwd->h[6] = msa_ceq_df(DF_HALF, pws->h[6], pwt->h[6]);
- pwd->h[7] = msa_ceq_df(DF_HALF, pws->h[7], pwt->h[7]);
+ pwd->h[0] = msa_ceq_h(pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_ceq_h(pws->h[1], pwt->h[1]);
+ pwd->h[2] = msa_ceq_h(pws->h[2], pwt->h[2]);
+ pwd->h[3] = msa_ceq_h(pws->h[3], pwt->h[3]);
+ pwd->h[4] = msa_ceq_h(pws->h[4], pwt->h[4]);
+ pwd->h[5] = msa_ceq_h(pws->h[5], pwt->h[5]);
+ pwd->h[6] = msa_ceq_h(pws->h[6], pwt->h[6]);
+ pwd->h[7] = msa_ceq_h(pws->h[7], pwt->h[7]);
+}
+
+static inline int32_t msa_ceq_w(int32_t arg1, int32_t arg2)
+{
+ return arg1 == arg2 ? -1 : 0;
}
void helper_msa_ceq_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
@@ -1204,10 +1219,15 @@ void helper_msa_ceq_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
- pwd->w[0] = msa_ceq_df(DF_WORD, pws->w[0], pwt->w[0]);
- pwd->w[1] = msa_ceq_df(DF_WORD, pws->w[1], pwt->w[1]);
- pwd->w[2] = msa_ceq_df(DF_WORD, pws->w[2], pwt->w[2]);
- pwd->w[3] = msa_ceq_df(DF_WORD, pws->w[3], pwt->w[3]);
+ pwd->w[0] = msa_ceq_w(pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_ceq_w(pws->w[1], pwt->w[1]);
+ pwd->w[2] = msa_ceq_w(pws->w[2], pwt->w[2]);
+ pwd->w[3] = msa_ceq_w(pws->w[3], pwt->w[3]);
+}
+
+static inline int64_t msa_ceq_d(int64_t arg1, int64_t arg2)
+{
+ return arg1 == arg2 ? -1 : 0;
}
void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
@@ -1216,8 +1236,8 @@ void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
- pwd->d[0] = msa_ceq_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
- pwd->d[1] = msa_ceq_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
+ pwd->d[0] = msa_ceq_d(pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_ceq_d(pws->d[1], pwt->d[1]);
}
static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] target/mips: Rearrange vector compare less than (signed) instructions
2019-10-23 13:37 [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions Filip Bozuta
2019-10-23 13:37 ` [PATCH 1/2] target/mips: Rearrange vector compare equal instructions Filip Bozuta
@ 2019-10-23 13:37 ` Filip Bozuta
2019-10-25 10:43 ` Aleksandar Markovic
2019-10-25 10:46 ` [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions Aleksandar Markovic
2 siblings, 1 reply; 6+ messages in thread
From: Filip Bozuta @ 2019-10-23 13:37 UTC (permalink / raw)
To: qemu-devel; +Cc: arikalo, amarkovic, aurelien
Remove unnecessary argument and provide separate function for each
instruction.
Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com>
---
target/mips/msa_helper.c | 80 ++++++++++++++++++++++++++++++------------------
1 file changed, 50 insertions(+), 30 deletions(-)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index b5027e7..35bbf26 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -1389,6 +1389,11 @@ static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
return arg1 < arg2 ? -1 : 0;
}
+static inline int8_t msa_clt_s_b(int8_t arg1, int8_t arg2)
+{
+ return arg1 < arg2 ? -1 : 0;
+}
+
void helper_msa_clt_s_b(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
@@ -1396,22 +1401,27 @@ void helper_msa_clt_s_b(CPUMIPSState *env,
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
- pwd->b[0] = msa_clt_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
- pwd->b[1] = msa_clt_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
- pwd->b[2] = msa_clt_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
- pwd->b[3] = msa_clt_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
- pwd->b[4] = msa_clt_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
- pwd->b[5] = msa_clt_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
- pwd->b[6] = msa_clt_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
- pwd->b[7] = msa_clt_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
- pwd->b[8] = msa_clt_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
- pwd->b[9] = msa_clt_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
- pwd->b[10] = msa_clt_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
- pwd->b[11] = msa_clt_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
- pwd->b[12] = msa_clt_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
- pwd->b[13] = msa_clt_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
- pwd->b[14] = msa_clt_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
- pwd->b[15] = msa_clt_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
+ pwd->b[0] = msa_clt_s_b(pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_clt_s_b(pws->b[1], pwt->b[1]);
+ pwd->b[2] = msa_clt_s_b(pws->b[2], pwt->b[2]);
+ pwd->b[3] = msa_clt_s_b(pws->b[3], pwt->b[3]);
+ pwd->b[4] = msa_clt_s_b(pws->b[4], pwt->b[4]);
+ pwd->b[5] = msa_clt_s_b(pws->b[5], pwt->b[5]);
+ pwd->b[6] = msa_clt_s_b(pws->b[6], pwt->b[6]);
+ pwd->b[7] = msa_clt_s_b(pws->b[7], pwt->b[7]);
+ pwd->b[8] = msa_clt_s_b(pws->b[8], pwt->b[8]);
+ pwd->b[9] = msa_clt_s_b(pws->b[9], pwt->b[9]);
+ pwd->b[10] = msa_clt_s_b(pws->b[10], pwt->b[10]);
+ pwd->b[11] = msa_clt_s_b(pws->b[11], pwt->b[11]);
+ pwd->b[12] = msa_clt_s_b(pws->b[12], pwt->b[12]);
+ pwd->b[13] = msa_clt_s_b(pws->b[13], pwt->b[13]);
+ pwd->b[14] = msa_clt_s_b(pws->b[14], pwt->b[14]);
+ pwd->b[15] = msa_clt_s_b(pws->b[15], pwt->b[15]);
+}
+
+static inline int16_t msa_clt_s_h(int16_t arg1, int16_t arg2)
+{
+ return arg1 < arg2 ? -1 : 0;
}
void helper_msa_clt_s_h(CPUMIPSState *env,
@@ -1421,14 +1431,19 @@ void helper_msa_clt_s_h(CPUMIPSState *env,
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
- pwd->h[0] = msa_clt_s_df(DF_HALF, pws->h[0], pwt->h[0]);
- pwd->h[1] = msa_clt_s_df(DF_HALF, pws->h[1], pwt->h[1]);
- pwd->h[2] = msa_clt_s_df(DF_HALF, pws->h[2], pwt->h[2]);
- pwd->h[3] = msa_clt_s_df(DF_HALF, pws->h[3], pwt->h[3]);
- pwd->h[4] = msa_clt_s_df(DF_HALF, pws->h[4], pwt->h[4]);
- pwd->h[5] = msa_clt_s_df(DF_HALF, pws->h[5], pwt->h[5]);
- pwd->h[6] = msa_clt_s_df(DF_HALF, pws->h[6], pwt->h[6]);
- pwd->h[7] = msa_clt_s_df(DF_HALF, pws->h[7], pwt->h[7]);
+ pwd->h[0] = msa_clt_s_h(pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_clt_s_h(pws->h[1], pwt->h[1]);
+ pwd->h[2] = msa_clt_s_h(pws->h[2], pwt->h[2]);
+ pwd->h[3] = msa_clt_s_h(pws->h[3], pwt->h[3]);
+ pwd->h[4] = msa_clt_s_h(pws->h[4], pwt->h[4]);
+ pwd->h[5] = msa_clt_s_h(pws->h[5], pwt->h[5]);
+ pwd->h[6] = msa_clt_s_h(pws->h[6], pwt->h[6]);
+ pwd->h[7] = msa_clt_s_h(pws->h[7], pwt->h[7]);
+}
+
+static inline int32_t msa_clt_s_w(int32_t arg1, int32_t arg2)
+{
+ return arg1 < arg2 ? -1 : 0;
}
void helper_msa_clt_s_w(CPUMIPSState *env,
@@ -1438,10 +1453,15 @@ void helper_msa_clt_s_w(CPUMIPSState *env,
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
- pwd->w[0] = msa_clt_s_df(DF_WORD, pws->w[0], pwt->w[0]);
- pwd->w[1] = msa_clt_s_df(DF_WORD, pws->w[1], pwt->w[1]);
- pwd->w[2] = msa_clt_s_df(DF_WORD, pws->w[2], pwt->w[2]);
- pwd->w[3] = msa_clt_s_df(DF_WORD, pws->w[3], pwt->w[3]);
+ pwd->w[0] = msa_clt_s_w(pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_clt_s_w(pws->w[1], pwt->w[1]);
+ pwd->w[2] = msa_clt_s_w(pws->w[2], pwt->w[2]);
+ pwd->w[3] = msa_clt_s_w(pws->w[3], pwt->w[3]);
+}
+
+static inline int64_t msa_clt_s_d(int64_t arg1, int64_t arg2)
+{
+ return arg1 < arg2 ? -1 : 0;
}
void helper_msa_clt_s_d(CPUMIPSState *env,
@@ -1451,8 +1471,8 @@ void helper_msa_clt_s_d(CPUMIPSState *env,
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
- pwd->d[0] = msa_clt_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
- pwd->d[1] = msa_clt_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
+ pwd->d[0] = msa_clt_s_d(pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_clt_s_d(pws->d[1], pwt->d[1]);
}
static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2)
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] target/mips: Rearrange vector compare equal instructions
2019-10-23 13:37 ` [PATCH 1/2] target/mips: Rearrange vector compare equal instructions Filip Bozuta
@ 2019-10-25 10:42 ` Aleksandar Markovic
0 siblings, 0 replies; 6+ messages in thread
From: Aleksandar Markovic @ 2019-10-25 10:42 UTC (permalink / raw)
To: Filip Bozuta; +Cc: arikalo, aurelien, qemu-devel, amarkovic
[-- Attachment #1: Type: text/plain, Size: 6001 bytes --]
On Wednesday, October 23, 2019, Filip Bozuta <Filip.Bozuta@rt-rk.com> wrote:
> Remove unnecessary argument and provide separate function for each
> instruction.
>
> Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com>
> ---
> target/mips/msa_helper.c | 80 ++++++++++++++++++++++++++++++
> ------------------
> 1 file changed, 50 insertions(+), 30 deletions(-)
>
>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
> index a2052ba..b5027e7 100644
> --- a/target/mips/msa_helper.c
> +++ b/target/mips/msa_helper.c
> @@ -1158,28 +1158,38 @@ static inline int64_t msa_ceq_df(uint32_t df,
> int64_t arg1, int64_t arg2)
> return arg1 == arg2 ? -1 : 0;
> }
>
> +static inline int8_t msa_ceq_b(int8_t arg1, int8_t arg2)
> +{
> + return arg1 == arg2 ? -1 : 0;
> +}
> +
> void helper_msa_ceq_b(CPUMIPSState *env, uint32_t wd, uint32_t ws,
> uint32_t wt)
> {
> wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
>
> - pwd->b[0] = msa_ceq_df(DF_BYTE, pws->b[0], pwt->b[0]);
> - pwd->b[1] = msa_ceq_df(DF_BYTE, pws->b[1], pwt->b[1]);
> - pwd->b[2] = msa_ceq_df(DF_BYTE, pws->b[2], pwt->b[2]);
> - pwd->b[3] = msa_ceq_df(DF_BYTE, pws->b[3], pwt->b[3]);
> - pwd->b[4] = msa_ceq_df(DF_BYTE, pws->b[4], pwt->b[4]);
> - pwd->b[5] = msa_ceq_df(DF_BYTE, pws->b[5], pwt->b[5]);
> - pwd->b[6] = msa_ceq_df(DF_BYTE, pws->b[6], pwt->b[6]);
> - pwd->b[7] = msa_ceq_df(DF_BYTE, pws->b[7], pwt->b[7]);
> - pwd->b[8] = msa_ceq_df(DF_BYTE, pws->b[8], pwt->b[8]);
> - pwd->b[9] = msa_ceq_df(DF_BYTE, pws->b[9], pwt->b[9]);
> - pwd->b[10] = msa_ceq_df(DF_BYTE, pws->b[10], pwt->b[10]);
> - pwd->b[11] = msa_ceq_df(DF_BYTE, pws->b[11], pwt->b[11]);
> - pwd->b[12] = msa_ceq_df(DF_BYTE, pws->b[12], pwt->b[12]);
> - pwd->b[13] = msa_ceq_df(DF_BYTE, pws->b[13], pwt->b[13]);
> - pwd->b[14] = msa_ceq_df(DF_BYTE, pws->b[14], pwt->b[14]);
> - pwd->b[15] = msa_ceq_df(DF_BYTE, pws->b[15], pwt->b[15]);
> + pwd->b[0] = msa_ceq_b(pws->b[0], pwt->b[0]);
> + pwd->b[1] = msa_ceq_b(pws->b[1], pwt->b[1]);
> + pwd->b[2] = msa_ceq_b(pws->b[2], pwt->b[2]);
> + pwd->b[3] = msa_ceq_b(pws->b[3], pwt->b[3]);
> + pwd->b[4] = msa_ceq_b(pws->b[4], pwt->b[4]);
> + pwd->b[5] = msa_ceq_b(pws->b[5], pwt->b[5]);
> + pwd->b[6] = msa_ceq_b(pws->b[6], pwt->b[6]);
> + pwd->b[7] = msa_ceq_b(pws->b[7], pwt->b[7]);
> + pwd->b[8] = msa_ceq_b(pws->b[8], pwt->b[8]);
> + pwd->b[9] = msa_ceq_b(pws->b[9], pwt->b[9]);
> + pwd->b[10] = msa_ceq_b(pws->b[10], pwt->b[10]);
> + pwd->b[11] = msa_ceq_b(pws->b[11], pwt->b[11]);
> + pwd->b[12] = msa_ceq_b(pws->b[12], pwt->b[12]);
> + pwd->b[13] = msa_ceq_b(pws->b[13], pwt->b[13]);
> + pwd->b[14] = msa_ceq_b(pws->b[14], pwt->b[14]);
> + pwd->b[15] = msa_ceq_b(pws->b[15], pwt->b[15]);
> +}
> +
> +static inline int16_t msa_ceq_h(int16_t arg1, int16_t arg2)
> +{
> + return arg1 == arg2 ? -1 : 0;
> }
>
> void helper_msa_ceq_h(CPUMIPSState *env, uint32_t wd, uint32_t ws,
> uint32_t wt)
> @@ -1188,14 +1198,19 @@ void helper_msa_ceq_h(CPUMIPSState *env, uint32_t
> wd, uint32_t ws, uint32_t wt)
> wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
>
> - pwd->h[0] = msa_ceq_df(DF_HALF, pws->h[0], pwt->h[0]);
> - pwd->h[1] = msa_ceq_df(DF_HALF, pws->h[1], pwt->h[1]);
> - pwd->h[2] = msa_ceq_df(DF_HALF, pws->h[2], pwt->h[2]);
> - pwd->h[3] = msa_ceq_df(DF_HALF, pws->h[3], pwt->h[3]);
> - pwd->h[4] = msa_ceq_df(DF_HALF, pws->h[4], pwt->h[4]);
> - pwd->h[5] = msa_ceq_df(DF_HALF, pws->h[5], pwt->h[5]);
> - pwd->h[6] = msa_ceq_df(DF_HALF, pws->h[6], pwt->h[6]);
> - pwd->h[7] = msa_ceq_df(DF_HALF, pws->h[7], pwt->h[7]);
> + pwd->h[0] = msa_ceq_h(pws->h[0], pwt->h[0]);
> + pwd->h[1] = msa_ceq_h(pws->h[1], pwt->h[1]);
> + pwd->h[2] = msa_ceq_h(pws->h[2], pwt->h[2]);
> + pwd->h[3] = msa_ceq_h(pws->h[3], pwt->h[3]);
> + pwd->h[4] = msa_ceq_h(pws->h[4], pwt->h[4]);
> + pwd->h[5] = msa_ceq_h(pws->h[5], pwt->h[5]);
> + pwd->h[6] = msa_ceq_h(pws->h[6], pwt->h[6]);
> + pwd->h[7] = msa_ceq_h(pws->h[7], pwt->h[7]);
> +}
> +
> +static inline int32_t msa_ceq_w(int32_t arg1, int32_t arg2)
> +{
> + return arg1 == arg2 ? -1 : 0;
> }
>
> void helper_msa_ceq_w(CPUMIPSState *env, uint32_t wd, uint32_t ws,
> uint32_t wt)
> @@ -1204,10 +1219,15 @@ void helper_msa_ceq_w(CPUMIPSState *env, uint32_t
> wd, uint32_t ws, uint32_t wt)
> wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
>
> - pwd->w[0] = msa_ceq_df(DF_WORD, pws->w[0], pwt->w[0]);
> - pwd->w[1] = msa_ceq_df(DF_WORD, pws->w[1], pwt->w[1]);
> - pwd->w[2] = msa_ceq_df(DF_WORD, pws->w[2], pwt->w[2]);
> - pwd->w[3] = msa_ceq_df(DF_WORD, pws->w[3], pwt->w[3]);
> + pwd->w[0] = msa_ceq_w(pws->w[0], pwt->w[0]);
> + pwd->w[1] = msa_ceq_w(pws->w[1], pwt->w[1]);
> + pwd->w[2] = msa_ceq_w(pws->w[2], pwt->w[2]);
> + pwd->w[3] = msa_ceq_w(pws->w[3], pwt->w[3]);
> +}
> +
> +static inline int64_t msa_ceq_d(int64_t arg1, int64_t arg2)
> +{
> + return arg1 == arg2 ? -1 : 0;
> }
>
> void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws,
> uint32_t wt)
> @@ -1216,8 +1236,8 @@ void helper_msa_ceq_d(CPUMIPSState *env, uint32_t
> wd, uint32_t ws, uint32_t wt)
> wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
>
> - pwd->d[0] = msa_ceq_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
> - pwd->d[1] = msa_ceq_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
> + pwd->d[0] = msa_ceq_d(pws->d[0], pwt->d[0]);
> + pwd->d[1] = msa_ceq_d(pws->d[1], pwt->d[1]);
> }
>
> static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t
> arg2)
> --
> 2.7.4
>
>
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] target/mips: Rearrange vector compare less than (signed) instructions
2019-10-23 13:37 ` [PATCH 2/2] target/mips: Rearrange vector compare less than (signed) instructions Filip Bozuta
@ 2019-10-25 10:43 ` Aleksandar Markovic
0 siblings, 0 replies; 6+ messages in thread
From: Aleksandar Markovic @ 2019-10-25 10:43 UTC (permalink / raw)
To: Filip Bozuta; +Cc: arikalo, aurelien, qemu-devel, amarkovic
[-- Attachment #1: Type: text/plain, Size: 5937 bytes --]
On Wednesday, October 23, 2019, Filip Bozuta <Filip.Bozuta@rt-rk.com> wrote:
> Remove unnecessary argument and provide separate function for each
> instruction.
>
> Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com>
> ---
> target/mips/msa_helper.c | 80 ++++++++++++++++++++++++++++++
> ------------------
> 1 file changed, 50 insertions(+), 30 deletions(-)
>
>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
> index b5027e7..35bbf26 100644
> --- a/target/mips/msa_helper.c
> +++ b/target/mips/msa_helper.c
> @@ -1389,6 +1389,11 @@ static inline int64_t msa_clt_s_df(uint32_t df,
> int64_t arg1, int64_t arg2)
> return arg1 < arg2 ? -1 : 0;
> }
>
> +static inline int8_t msa_clt_s_b(int8_t arg1, int8_t arg2)
> +{
> + return arg1 < arg2 ? -1 : 0;
> +}
> +
> void helper_msa_clt_s_b(CPUMIPSState *env,
> uint32_t wd, uint32_t ws, uint32_t wt)
> {
> @@ -1396,22 +1401,27 @@ void helper_msa_clt_s_b(CPUMIPSState *env,
> wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
>
> - pwd->b[0] = msa_clt_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
> - pwd->b[1] = msa_clt_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
> - pwd->b[2] = msa_clt_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
> - pwd->b[3] = msa_clt_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
> - pwd->b[4] = msa_clt_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
> - pwd->b[5] = msa_clt_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
> - pwd->b[6] = msa_clt_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
> - pwd->b[7] = msa_clt_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
> - pwd->b[8] = msa_clt_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
> - pwd->b[9] = msa_clt_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
> - pwd->b[10] = msa_clt_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
> - pwd->b[11] = msa_clt_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
> - pwd->b[12] = msa_clt_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
> - pwd->b[13] = msa_clt_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
> - pwd->b[14] = msa_clt_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
> - pwd->b[15] = msa_clt_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
> + pwd->b[0] = msa_clt_s_b(pws->b[0], pwt->b[0]);
> + pwd->b[1] = msa_clt_s_b(pws->b[1], pwt->b[1]);
> + pwd->b[2] = msa_clt_s_b(pws->b[2], pwt->b[2]);
> + pwd->b[3] = msa_clt_s_b(pws->b[3], pwt->b[3]);
> + pwd->b[4] = msa_clt_s_b(pws->b[4], pwt->b[4]);
> + pwd->b[5] = msa_clt_s_b(pws->b[5], pwt->b[5]);
> + pwd->b[6] = msa_clt_s_b(pws->b[6], pwt->b[6]);
> + pwd->b[7] = msa_clt_s_b(pws->b[7], pwt->b[7]);
> + pwd->b[8] = msa_clt_s_b(pws->b[8], pwt->b[8]);
> + pwd->b[9] = msa_clt_s_b(pws->b[9], pwt->b[9]);
> + pwd->b[10] = msa_clt_s_b(pws->b[10], pwt->b[10]);
> + pwd->b[11] = msa_clt_s_b(pws->b[11], pwt->b[11]);
> + pwd->b[12] = msa_clt_s_b(pws->b[12], pwt->b[12]);
> + pwd->b[13] = msa_clt_s_b(pws->b[13], pwt->b[13]);
> + pwd->b[14] = msa_clt_s_b(pws->b[14], pwt->b[14]);
> + pwd->b[15] = msa_clt_s_b(pws->b[15], pwt->b[15]);
> +}
> +
> +static inline int16_t msa_clt_s_h(int16_t arg1, int16_t arg2)
> +{
> + return arg1 < arg2 ? -1 : 0;
> }
>
> void helper_msa_clt_s_h(CPUMIPSState *env,
> @@ -1421,14 +1431,19 @@ void helper_msa_clt_s_h(CPUMIPSState *env,
> wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
>
> - pwd->h[0] = msa_clt_s_df(DF_HALF, pws->h[0], pwt->h[0]);
> - pwd->h[1] = msa_clt_s_df(DF_HALF, pws->h[1], pwt->h[1]);
> - pwd->h[2] = msa_clt_s_df(DF_HALF, pws->h[2], pwt->h[2]);
> - pwd->h[3] = msa_clt_s_df(DF_HALF, pws->h[3], pwt->h[3]);
> - pwd->h[4] = msa_clt_s_df(DF_HALF, pws->h[4], pwt->h[4]);
> - pwd->h[5] = msa_clt_s_df(DF_HALF, pws->h[5], pwt->h[5]);
> - pwd->h[6] = msa_clt_s_df(DF_HALF, pws->h[6], pwt->h[6]);
> - pwd->h[7] = msa_clt_s_df(DF_HALF, pws->h[7], pwt->h[7]);
> + pwd->h[0] = msa_clt_s_h(pws->h[0], pwt->h[0]);
> + pwd->h[1] = msa_clt_s_h(pws->h[1], pwt->h[1]);
> + pwd->h[2] = msa_clt_s_h(pws->h[2], pwt->h[2]);
> + pwd->h[3] = msa_clt_s_h(pws->h[3], pwt->h[3]);
> + pwd->h[4] = msa_clt_s_h(pws->h[4], pwt->h[4]);
> + pwd->h[5] = msa_clt_s_h(pws->h[5], pwt->h[5]);
> + pwd->h[6] = msa_clt_s_h(pws->h[6], pwt->h[6]);
> + pwd->h[7] = msa_clt_s_h(pws->h[7], pwt->h[7]);
> +}
> +
> +static inline int32_t msa_clt_s_w(int32_t arg1, int32_t arg2)
> +{
> + return arg1 < arg2 ? -1 : 0;
> }
>
> void helper_msa_clt_s_w(CPUMIPSState *env,
> @@ -1438,10 +1453,15 @@ void helper_msa_clt_s_w(CPUMIPSState *env,
> wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
>
> - pwd->w[0] = msa_clt_s_df(DF_WORD, pws->w[0], pwt->w[0]);
> - pwd->w[1] = msa_clt_s_df(DF_WORD, pws->w[1], pwt->w[1]);
> - pwd->w[2] = msa_clt_s_df(DF_WORD, pws->w[2], pwt->w[2]);
> - pwd->w[3] = msa_clt_s_df(DF_WORD, pws->w[3], pwt->w[3]);
> + pwd->w[0] = msa_clt_s_w(pws->w[0], pwt->w[0]);
> + pwd->w[1] = msa_clt_s_w(pws->w[1], pwt->w[1]);
> + pwd->w[2] = msa_clt_s_w(pws->w[2], pwt->w[2]);
> + pwd->w[3] = msa_clt_s_w(pws->w[3], pwt->w[3]);
> +}
> +
> +static inline int64_t msa_clt_s_d(int64_t arg1, int64_t arg2)
> +{
> + return arg1 < arg2 ? -1 : 0;
> }
>
> void helper_msa_clt_s_d(CPUMIPSState *env,
> @@ -1451,8 +1471,8 @@ void helper_msa_clt_s_d(CPUMIPSState *env,
> wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
>
> - pwd->d[0] = msa_clt_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
> - pwd->d[1] = msa_clt_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
> + pwd->d[0] = msa_clt_s_d(pws->d[0], pwt->d[0]);
> + pwd->d[1] = msa_clt_s_d(pws->d[1], pwt->d[1]);
> }
>
> static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t
> arg2)
> --
> 2.7.4
>
>
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions
2019-10-23 13:37 [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions Filip Bozuta
2019-10-23 13:37 ` [PATCH 1/2] target/mips: Rearrange vector compare equal instructions Filip Bozuta
2019-10-23 13:37 ` [PATCH 2/2] target/mips: Rearrange vector compare less than (signed) instructions Filip Bozuta
@ 2019-10-25 10:46 ` Aleksandar Markovic
2 siblings, 0 replies; 6+ messages in thread
From: Aleksandar Markovic @ 2019-10-25 10:46 UTC (permalink / raw)
To: Filip Bozuta; +Cc: arikalo, aurelien, qemu-devel, amarkovic
[-- Attachment #1: Type: text/plain, Size: 780 bytes --]
On Wednesday, October 23, 2019, Filip Bozuta <Filip.Bozuta@rt-rk.com> wrote:
> Simplify instructions by removing unnecessary argument and creating
> separate
> comparing functions for each instruction.
>
> Filip Bozuta (2):
> target/mips: Rearrange vector compare equal instructions
> target/mips: Rearrange vector compare less than (signed) instructions
>
> target/mips/msa_helper.c | 160 +++++++++++++++++++++++++++++-
> -----------------
> 1 file changed, 100 insertions(+), 60 deletions(-)
Welcome to QEMU open source community, Filip!
This series looks good. I may do just some minor corrections in commit
messages, I'll do it while applying, you don't need to do anything.
Hope you'll do more refactoring like this in future!
Aleksandar
>
> --
> 2.7.4
>
>
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-10-25 11:09 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2019-10-23 13:37 [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions Filip Bozuta
2019-10-23 13:37 ` [PATCH 1/2] target/mips: Rearrange vector compare equal instructions Filip Bozuta
2019-10-25 10:42 ` Aleksandar Markovic
2019-10-23 13:37 ` [PATCH 2/2] target/mips: Rearrange vector compare less than (signed) instructions Filip Bozuta
2019-10-25 10:43 ` Aleksandar Markovic
2019-10-25 10:46 ` [PATCH 0/2] target/mips: Rearrange handling of vector compare instructions Aleksandar Markovic
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