qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
To: Michael Rolnik <mrolnik@gmail.com>
Cc: "thuth@redhat.com" <thuth@redhat.com>,
	"me@xcancerberox.com.ar" <me@xcancerberox.com.ar>,
	"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"dovgaluk@ispras.ru" <dovgaluk@ispras.ru>,
	"imammedo@redhat.com" <imammedo@redhat.com>,
	"philmd@redhat.com" <philmd@redhat.com>
Subject: Re: [PATCH v37 13/17] target/avr: Register AVR support with the rest of QEMU
Date: Thu, 5 Dec 2019 13:55:59 +0100	[thread overview]
Message-ID: <CAL1e-=iyTfRMChGoursOihb8zQrP6A4bSLMC-EvYX6cQUyhq=A@mail.gmail.com> (raw)
In-Reply-To: <20191127175257.23480-14-mrolnik@gmail.com>

[-- Attachment #1: Type: text/plain, Size: 3672 bytes --]

On Wednesday, November 27, 2019, Michael Rolnik <mrolnik@gmail.com> wrote:

> Add AVR related definitions into QEMU
>
> Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
>  qapi/machine.json          | 3 ++-
>  include/disas/dis-asm.h    | 6 ++++++
>  include/sysemu/arch_init.h | 1 +
>  arch_init.c                | 2 ++
>  tests/machine-none-test.c  | 1 +
>  5 files changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/qapi/machine.json b/qapi/machine.json
> index ca26779f1a..8c6df54921 100644
> --- a/qapi/machine.json
> +++ b/qapi/machine.json
> @@ -21,11 +21,12 @@
>  #        is true even for "qemu-system-x86_64".
>  #
>  # ppcemb: dropped in 3.1
> +# avr: since 5.0
>  #
>  # Since: 3.0
>  ##
>  { 'enum' : 'SysEmuTarget',
> -  'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32',
> +  'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386',
> 'lm32',
>               'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64',
>               'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc',
>               'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4',
> diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
> index e9c7dd8eb4..8bedce17ac 100644
> --- a/include/disas/dis-asm.h
> +++ b/include/disas/dis-asm.h
> @@ -211,6 +211,12 @@ enum bfd_architecture
>  #define bfd_mach_m32r          0  /* backwards compatibility */
>    bfd_arch_mn10200,    /* Matsushita MN10200 */
>    bfd_arch_mn10300,    /* Matsushita MN10300 */
> +  bfd_arch_avr,       /* Atmel AVR microcontrollers.  */
> +#define bfd_mach_avr1          1
> +#define bfd_mach_avr2          2
> +#define bfd_mach_avr3          3
> +#define bfd_mach_avr4          4
> +#define bfd_mach_avr5          5


Here you should cover all avr cores, as in:

https://github.com/CyberGrandChallenge/binutils/blob/master/bfd/archures.c

I don't think this segment is used at all for AVR in QEMU currently, but
complete it just in case.


>    bfd_arch_cris,       /* Axis CRIS */
>  #define bfd_mach_cris_v0_v10   255
>  #define bfd_mach_cris_v32      32
> diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
> index 62c6fe4cf1..893df26ce2 100644
> --- a/include/sysemu/arch_init.h
> +++ b/include/sysemu/arch_init.h
> @@ -24,6 +24,7 @@ enum {
>      QEMU_ARCH_NIOS2 = (1 << 17),
>      QEMU_ARCH_HPPA = (1 << 18),
>      QEMU_ARCH_RISCV = (1 << 19),
> +    QEMU_ARCH_AVR = (1 << 20),
>  };
>
>  extern const uint32_t arch_type;
> diff --git a/arch_init.c b/arch_init.c
> index 705d0b94ad..6a741165b2 100644
> --- a/arch_init.c
> +++ b/arch_init.c
> @@ -89,6 +89,8 @@ int graphic_depth = 32;
>  #define QEMU_ARCH QEMU_ARCH_UNICORE32
>  #elif defined(TARGET_XTENSA)
>  #define QEMU_ARCH QEMU_ARCH_XTENSA
> +#elif defined(TARGET_AVR)
> +#define QEMU_ARCH QEMU_ARCH_AVR
>  #endif
>
>  const uint32_t arch_type = QEMU_ARCH;
> diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c
> index 5953d31755..3e5c74e73e 100644
> --- a/tests/machine-none-test.c
> +++ b/tests/machine-none-test.c
> @@ -27,6 +27,7 @@ static struct arch2cpu cpus_map[] = {
>      /* tested targets list */
>      { "arm", "cortex-a15" },
>      { "aarch64", "cortex-a57" },
> +    { "avr", "avr6-avr-cpu" },

     { "x86_64", "qemu64,apic-id=0" },
>      { "i386", "qemu32,apic-id=0" },
>      { "alpha", "ev67" },
> --


This single line should be a sepatare patch "target/avr: Add machine none
test"


> 2.17.2 (Apple Git-113)
>
>

[-- Attachment #2: Type: text/html, Size: 5286 bytes --]

  reply	other threads:[~2019-12-05 14:03 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-27 17:52 [PATCH v37 00/17] QEMU AVR 8 bit cores Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 01/17] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-11-27 22:25   ` Philippe Mathieu-Daudé
2019-11-28 12:04     ` Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 02/17] target/avr: Add instruction helpers Michael Rolnik
2019-11-27 22:26   ` Philippe Mathieu-Daudé
2019-11-27 17:52 ` [PATCH v37 03/17] target/avr: Add instruction decoding Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 04/17] target/avr: Add instruction translation - Registers definition Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 05/17] target/avr: Add instruction translation - Arithmetic and Logic Instructions Michael Rolnik
2019-11-30 10:33   ` Aleksandar Markovic
2019-11-30 16:29     ` Aleksandar Markovic
2019-11-30 17:05       ` Michael Rolnik
2019-11-30 17:14         ` Aleksandar Markovic
2019-11-30 23:11         ` Aleksandar Markovic
2019-12-02  7:41           ` Michael Rolnik
2019-12-02  8:55             ` Aleksandar Markovic
2019-12-02  9:01               ` Aleksandar Markovic
2019-11-27 17:52 ` [PATCH v37 06/17] target/avr: Add instruction translation - Branch Instructions Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 07/17] target/avr: Add instruction translation - Bit and Bit-test Instructions Michael Rolnik
2019-12-05 12:28   ` Aleksandar Markovic
2019-12-05 13:17     ` Michael Rolnik
2019-12-05 13:28       ` Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 08/17] target/avr: Add instruction translation - MCU Control Instructions Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 09/17] target/avr: Add instruction translation - CPU main translation function Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 10/17] target/avr: Add instruction disassembly function Michael Rolnik
2019-12-02  0:28   ` Aleksandar Markovic
2019-12-02  7:04     ` Michael Rolnik
2019-12-02 10:12       ` Aleksandar Markovic
2019-12-02 12:01       ` Aleksandar Markovic
2019-12-03 11:18       ` Philippe Mathieu-Daudé
2019-12-03 14:24         ` Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 11/17] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 12/17] target/avr: Add example board configuration Michael Rolnik
2019-11-30 10:49   ` Aleksandar Markovic
2019-11-30 16:57     ` Michael Rolnik
2019-12-03 11:29       ` Philippe Mathieu-Daudé
2019-11-27 17:52 ` [PATCH v37 13/17] target/avr: Register AVR support with the rest of QEMU Michael Rolnik
2019-12-05 12:55   ` Aleksandar Markovic [this message]
2019-11-27 17:52 ` [PATCH v37 14/17] target/avr: Update build system Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 15/17] target/avr: Add boot serial test Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 16/17] target/avr: Add Avocado test Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 17/17] target/avr: Update MAINTAINERS file Michael Rolnik
2019-11-28 20:19   ` Philippe Mathieu-Daudé
2019-11-30 13:43   ` Aleksandar Markovic
2019-11-27 21:06 ` [PATCH v37 00/17] QEMU AVR 8 bit cores Aleksandar Markovic
2019-11-28 12:28   ` Michael Rolnik
2019-11-28 13:22     ` Aleksandar Markovic
2019-11-28 13:25       ` Michael Rolnik
2019-11-28 13:31         ` Aleksandar Markovic
2019-11-28 16:20           ` Alex Bennée
2019-11-28 19:32             ` Aleksandar Markovic
2019-11-29 22:49             ` Aleksandar Markovic
2019-11-29 23:52               ` Aleksandar Markovic
2019-11-28 13:34         ` Philippe Mathieu-Daudé
2019-11-28 13:41           ` Aleksandar Markovic
2019-11-28 13:46             ` Michael Rolnik
2019-11-28 14:16               ` Philippe Mathieu-Daudé
2019-11-28 14:50                 ` Aleksandar Markovic
2019-11-28 18:09                 ` Aleksandar Markovic
2019-12-01 13:09               ` Aleksandar Markovic
2019-12-01 13:11                 ` Aleksandar Markovic
2019-11-29  9:24     ` Sarah Harris
2019-11-28 15:00 ` Aleksandar Markovic
2019-11-30 11:28 ` Aleksandar Markovic
2019-11-30 17:00   ` Michael Rolnik
2019-12-02  9:35     ` Aleksandar Markovic
2019-12-02  9:59       ` Aleksandar Markovic
2019-12-02 13:24         ` Michael Rolnik
2019-12-02 14:01           ` Aleksandar Markovic
2019-12-02 16:09             ` Michael Rolnik
2019-12-02 21:15               ` Aleksandar Markovic
2019-12-02 23:37                 ` Aleksandar Markovic
2019-12-03  1:17                   ` Aleksandar Markovic
2019-12-03  1:48                     ` Aleksandar Markovic
2019-12-03  9:56                       ` Michael Rolnik

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAL1e-=iyTfRMChGoursOihb8zQrP6A4bSLMC-EvYX6cQUyhq=A@mail.gmail.com' \
    --to=aleksandar.m.mail@gmail.com \
    --cc=dovgaluk@ispras.ru \
    --cc=imammedo@redhat.com \
    --cc=me@xcancerberox.com.ar \
    --cc=mrolnik@gmail.com \
    --cc=philmd@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=thuth@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).