From: Paolo Montesel <paolo.montesel.revng@gmail.com>
To: Taylor Simpson <tsimpson@quicinc.com>
Cc: Alessandro Di Federico <ale@rev.ng>,
Brian Cain <bcain@quicinc.com>,
"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Alessandro Di Federico <ale.qemu@rev.ng>,
"nizzo@rev.ng" <nizzo@rev.ng>,
"philmd@redhat.com" <philmd@redhat.com>
Subject: Re: [PATCH v4 09/12] target/hexagon: import lexer for idef-parser
Date: Thu, 29 Apr 2021 12:53:22 +0200 [thread overview]
Message-ID: <CANnx7NOcYKv5g7w_3+k6v6--dyXZRp9VsPzfKTuKj7gH0j3ydg@mail.gmail.com> (raw)
In-Reply-To: <BYAPR02MB4886605BF4386A88B443375EDE409@BYAPR02MB4886.namprd02.prod.outlook.com>
On Wed, Apr 28, 2021 at 5:55 PM Taylor Simpson <tsimpson@quicinc.com> wrote:
>
>
>
> >From: Paolo Montesel <paolo.montesel.revng@gmail.com>
> >Sent: Wednesday, April 28, 2021 5:25 AM
> >To: Taylor Simpson <tsimpson@quicinc.com>
> >Cc: Alessandro Di Federico <ale.qemu@rev.ng>; qemu-devel@nongnu.org; Brian Cain <bcain@quicinc.com>; nizzo@rev.ng; >philmd@redhat.com; richard.henderson@linaro.org; Alessandro Di Federico <ale@rev.ng>
> >Subject: Re: [PATCH v4 09/12] target/hexagon: import lexer for idef-parser
> >
> >Thanks for spotting this. It's actually a bug in the lexer. The token `{IMM_ID}"iV"` didn't initialize `bit_width`. Now it does. This is the >result:
> >
> >void emit_J2_jump(DisasContext *ctx, Insn *insn, Packet *pkt, int riV)
> >/* fIMMEXT(riV); (riV = riV & ~3); (PC = fREAD_PC()+riV);} */
> >{
> >int64_t qemu_tmp_0 = ~((int64_t)3ULL);
> >int32_t qemu_tmp_1 = riV & qemu_tmp_0;
> >riV = qemu_tmp_1;
> >TCGv_i32 tmp_0 = tcg_temp_local_new_i32();
> >tcg_gen_movi_i32(tmp_0, ctx->base.pc_next);
> >TCGv_i32 tmp_1 = tcg_temp_local_new_i32();
> >tcg_gen_addi_i32(tmp_1, tmp_0, (int64_t)riV);
> >tcg_temp_free_i32(tmp_0);
> >gen_write_new_pc(tmp_1);
> >tcg_temp_free_i32(tmp_1);
> >}
> >
> >The `(int64_t)riV` cast is actually useless so I simply dropped it, thanks for pointing it out.
> >
> >This is all gonna be in the next patchset ofc.
> >
> >~Paolo
>
> This could be further simplified by doing the add in the parser and generating
> TCGv tmp_1 = tcg_const_tl(ctx->base.pc_next + riV);
> Have you looked at the host code that is generated? I would expect it to do the constant folding, so the executed code is OK. However, there's extra time spent building up TCG that could be avoided.
I agree. Since relative jumps happen somewhat often, I went ahead and
added two immediate types (one for the current PC and one for next
PC).
I also noticed that we were using temps for `rvalue_materialize` when,
in fact, we can simply use `tcg_const`.
Overall it should give a nice improvement.
Anyway, this is how the code looks like now:
void emit_J2_jump(DisasContext *ctx, Insn *insn, Packet *pkt, int riV)
/* fIMMEXT(riV); (riV = riV & ~3); (PC = fREAD_PC()+riV);} */
{
int64_t qemu_tmp_0 = ~((int64_t)3ULL);
int32_t qemu_tmp_1 = riV & qemu_tmp_0;
riV = qemu_tmp_1;
int32_t qemu_tmp_2 = ctx->base.pc_next + riV;
TCGv_i32 tmp_0 = tcg_const_i32(qemu_tmp_2);
gen_write_new_pc(tmp_0);
tcg_temp_free_i32(tmp_0);
}
That doesn't look too bad (:
next prev parent reply other threads:[~2021-04-29 10:54 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-15 16:34 [PATCH v4 00/12] target/hexagon: introduce idef-parser Alessandro Di Federico via
2021-04-15 16:34 ` [PATCH v4 01/12] tcg: expose TCGCond manipulation routines Alessandro Di Federico via
2021-04-18 20:57 ` Richard Henderson
2021-04-15 16:34 ` [PATCH v4 02/12] target/hexagon: update MAINTAINERS for idef-parser Alessandro Di Federico via
2021-04-18 20:58 ` Richard Henderson
2021-04-15 16:34 ` [PATCH v4 03/12] target/hexagon: import README " Alessandro Di Federico via
2021-04-15 16:34 ` [PATCH v4 04/12] target/hexagon: make slot number an unsigned Alessandro Di Federico via
2021-04-18 21:10 ` Richard Henderson
2021-04-15 16:34 ` [PATCH v4 05/12] target/hexagon: make helper functions non-static Alessandro Di Federico via
2021-04-18 21:11 ` Richard Henderson
2021-04-15 16:34 ` [PATCH v4 06/12] target/hexagon: introduce new helper functions Alessandro Di Federico via
2021-04-18 21:31 ` Richard Henderson
2021-04-19 15:00 ` Taylor Simpson
2021-04-20 6:39 ` Alessandro Di Federico via
2021-04-15 16:34 ` [PATCH v4 07/12] target/hexagon: expose next PC in DisasContext Alessandro Di Federico via
2021-04-18 21:34 ` Richard Henderson
2021-04-15 16:34 ` [PATCH v4 08/12] target/hexagon: prepare input for the idef-parser Alessandro Di Federico via
2021-04-18 21:43 ` Richard Henderson
2021-04-15 16:34 ` [PATCH v4 09/12] target/hexagon: import lexer for idef-parser Alessandro Di Federico via
2021-04-27 2:01 ` Taylor Simpson
2021-04-28 10:25 ` Paolo Montesel
2021-04-28 15:55 ` Taylor Simpson
2021-04-29 10:53 ` Paolo Montesel [this message]
2021-04-15 16:34 ` [PATCH v4 10/12] target/hexagon: import parser " Alessandro Di Federico via
2021-04-15 16:34 ` [PATCH v4 11/12] target/hexagon: call idef-parser functions Alessandro Di Federico via
2021-04-29 15:59 ` Taylor Simpson
2021-04-15 16:34 ` [PATCH v4 12/12] target/hexagon: import additional tests Alessandro Di Federico via
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