[Qemu-devel] [PATCH for 4.1 v4 0/5] target/mips: Fixes for 4.1 rc1

[Qemu-devel] [PATCH for 4.1 v4 0/5] target/mips: Fixes for 4.1 rc1

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

At the moment, this includes fixes for problems in switch statements
found by GCC 8.3 improved code analysis features, and one big endian
host fix.

v3->v4:

  - complete the last patch

v2->v3:

  - fix handling of MSA pack instructions on big endian host

v1->v2:

  - excluded the patch on "ucontext" that will go into linux user queue

Aleksandar Markovic (5):
  target/mips: Add 'fall through' comments for handling nanoMips' SHXS,
    SWXS
  target/mips: Add missing 'break' for a case of MTHC0 handling
  target/mips: Add missing 'break' for certain cases of MFTR handling
  target/mips: Add missing 'break' for certain cases of MTTR handling
  target/mips: Fix emulation of MSA pack instructions on big endian
    hosts

 target/mips/msa_helper.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++++
 target/mips/translate.c  |  7 +++++
 2 files changed, 81 insertions(+)

-- 
2.7.4

[Qemu-devel] [PATCH for 4.1 v4 1/5] target/mips: Add 'fall through' comments for handling nanoMips' SHXS, SWXS

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

This was found by GCC 8.3 static analysis.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index f96f141..2be5e2d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20136,12 +20136,14 @@ static void gen_p_lsx(DisasContext *ctx, int rd, int rs, int rt)
         switch (extract32(ctx->opcode, 7, 4)) {
         case NM_SHXS:
             check_nms(ctx);
+            /* fall through */
         case NM_LHXS:
         case NM_LHUXS:
             tcg_gen_shli_tl(t0, t0, 1);
             break;
         case NM_SWXS:
             check_nms(ctx);
+            /* fall through */
         case NM_LWXS:
         case NM_LWC1XS:
         case NM_SWC1XS:
-- 
2.7.4

[Qemu-devel] [PATCH for 4.1 v4 2/5] target/mips: Add missing 'break' for a case of MTHC0 handling

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

This was found by GCC 8.3 static analysis.

Fixes: 5fb2dcd1792

Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 2be5e2d..59d4acd 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -6745,6 +6745,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         default:
             goto cp0_unimplemented;
         }
+        break;
     case CP0_REGISTER_17:
         switch (sel) {
         case 0:
-- 
2.7.4

[Qemu-devel] [PATCH for 4.1 v4 3/5] target/mips: Add missing 'break' for certain cases of MFTR handling

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

This was found by GCC 8.3 static analysis.

Fixes: ead9360e2fb

Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 59d4acd..b1cf5f0 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -9826,6 +9826,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
                 gen_mfc0(ctx, t0, rt, sel);
                 break;
             }
+            break;
         case 12:
             switch (sel) {
             case 0:
@@ -9835,6 +9836,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
                 gen_mfc0(ctx, t0, rt, sel);
                 break;
             }
+            break;
         case 13:
             switch (sel) {
             case 0:
-- 
2.7.4

[Qemu-devel] [PATCH for 4.1 v4 4/5] target/mips: Add missing 'break' for certain cases of MTTR handling

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

This was found by GCC 8.3 static analysis.

Fixes: ead9360e2fb

Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index b1cf5f0..ca62800 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -10055,6 +10055,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
                 gen_mtc0(ctx, t0, rd, sel);
                 break;
             }
+            break;
         case 12:
             switch (sel) {
             case 0:
@@ -10064,6 +10065,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
                 gen_mtc0(ctx, t0, rd, sel);
                 break;
             }
+            break;
         case 13:
             switch (sel) {
             case 0:
-- 
2.7.4

[Qemu-devel] [PATCH for 4.1 v4 5/5] target/mips: Fix emulation of MSA pack instructions on big endian hosts

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

Fix emulation of MSA pack instructions on big endian hosts.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/msa_helper.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)

diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index a383c40..27560ac 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -2113,6 +2113,24 @@ void helper_msa_pckev_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
 
     switch (df) {
     case DF_BYTE:
+#if defined(HOST_WORDS_BIGENDIAN)
+        pwd->b[8]  = pws->b[9];
+        pwd->b[10] = pws->b[13];
+        pwd->b[12] = pws->b[1];
+        pwd->b[14] = pws->b[5];
+        pwd->b[0]  = pwt->b[9];
+        pwd->b[2]  = pwt->b[13];
+        pwd->b[4]  = pwt->b[1];
+        pwd->b[6]  = pwt->b[5];
+        pwd->b[9]  = pws->b[11];
+        pwd->b[13] = pws->b[3];
+        pwd->b[1]  = pwt->b[11];
+        pwd->b[5]  = pwt->b[3];
+        pwd->b[11] = pws->b[15];
+        pwd->b[3]  = pwt->b[15];
+        pwd->b[15] = pws->b[7];
+        pwd->b[7]  = pwt->b[7];
+#else
         pwd->b[15] = pws->b[14];
         pwd->b[13] = pws->b[10];
         pwd->b[11] = pws->b[6];
@@ -2129,8 +2147,19 @@ void helper_msa_pckev_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
         pwd->b[4]  = pwt->b[8];
         pwd->b[8]  = pws->b[0];
         pwd->b[0]  = pwt->b[0];
+#endif
         break;
     case DF_HALF:
+#if defined(HOST_WORDS_BIGENDIAN)
+        pwd->h[4] = pws->h[5];
+        pwd->h[6] = pws->h[1];
+        pwd->h[0] = pwt->h[5];
+        pwd->h[2] = pwt->h[1];
+        pwd->h[5] = pws->h[7];
+        pwd->h[1] = pwt->h[7];
+        pwd->h[7] = pws->h[3];
+        pwd->h[3] = pwt->h[3];
+#else
         pwd->h[7] = pws->h[6];
         pwd->h[5] = pws->h[2];
         pwd->h[3] = pwt->h[6];
@@ -2139,12 +2168,20 @@ void helper_msa_pckev_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
         pwd->h[2] = pwt->h[4];
         pwd->h[4] = pws->h[0];
         pwd->h[0] = pwt->h[0];
+#endif
         break;
     case DF_WORD:
+#if defined(HOST_WORDS_BIGENDIAN)
+        pwd->w[2] = pws->w[3];
+        pwd->w[0] = pwt->w[3];
+        pwd->w[3] = pws->w[1];
+        pwd->w[1] = pwt->w[1];
+#else
         pwd->w[3] = pws->w[2];
         pwd->w[1] = pwt->w[2];
         pwd->w[2] = pws->w[0];
         pwd->w[0] = pwt->w[0];
+#endif
         break;
     case DF_DOUBLE:
         pwd->d[1] = pws->d[0];
@@ -2164,6 +2201,24 @@ void helper_msa_pckod_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
 
     switch (df) {
     case DF_BYTE:
+#if defined(HOST_WORDS_BIGENDIAN)
+        pwd->b[7]  = pws->b[6];
+        pwd->b[5]  = pws->b[2];
+        pwd->b[3]  = pws->b[14];
+        pwd->b[1]  = pws->b[10];
+        pwd->b[15] = pwt->b[6];
+        pwd->b[13] = pwt->b[2];
+        pwd->b[11] = pwt->b[14];
+        pwd->b[9]  = pwt->b[10];
+        pwd->b[6]  = pws->b[4];
+        pwd->b[2]  = pws->b[12];
+        pwd->b[14] = pwt->b[4];
+        pwd->b[10] = pwt->b[12];
+        pwd->b[4]  = pws->b[0];
+        pwd->b[12] = pwt->b[0];
+        pwd->b[0]  = pws->b[8];
+        pwd->b[8]  = pwt->b[8];
+#else
         pwd->b[0]  = pwt->b[1];
         pwd->b[2]  = pwt->b[5];
         pwd->b[4]  = pwt->b[9];
@@ -2180,8 +2235,19 @@ void helper_msa_pckod_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
         pwd->b[11] = pws->b[7];
         pwd->b[7]  = pwt->b[15];
         pwd->b[15] = pws->b[15];
+#endif
         break;
     case DF_HALF:
+#if defined(HOST_WORDS_BIGENDIAN)
+        pwd->h[3] = pws->h[2];
+        pwd->h[1] = pws->h[6];
+        pwd->h[7] = pwt->h[2];
+        pwd->h[5] = pwt->h[6];
+        pwd->h[2] = pws->h[0];
+        pwd->h[6] = pwt->h[0];
+        pwd->h[0] = pws->h[4];
+        pwd->h[4] = pwt->h[4];
+#else
         pwd->h[0] = pwt->h[1];
         pwd->h[2] = pwt->h[5];
         pwd->h[4] = pws->h[1];
@@ -2190,12 +2256,20 @@ void helper_msa_pckod_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
         pwd->h[5] = pws->h[3];
         pwd->h[3] = pwt->h[7];
         pwd->h[7] = pws->h[7];
+#endif
         break;
     case DF_WORD:
+#if defined(HOST_WORDS_BIGENDIAN)
+        pwd->w[1] = pws->w[0];
+        pwd->w[3] = pwt->w[0];
+        pwd->w[0] = pws->w[2];
+        pwd->w[2] = pwt->w[2];
+#else
         pwd->w[0] = pwt->w[1];
         pwd->w[2] = pws->w[1];
         pwd->w[1] = pwt->w[3];
         pwd->w[3] = pws->w[3];
+#endif
         break;
     case DF_DOUBLE:
         pwd->d[0] = pwt->d[1];
-- 
2.7.4

Re: [Qemu-devel] [PATCH for 4.1 v4 5/5] target/mips: Fix emulation of MSA pack instructions on big endian hosts

[Aleksandar Rikalo]

> From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
> Sent: Monday, July 15, 2019 10:00 PM
> To: qemu-devel@nongnu.org
> Cc: sw@weilnetz.de; Aleksandar Markovic; Aleksandar Rikalo
> Subject: [PATCH for 4.1 v4 5/5] target/mips: Fix emulation of MSA pack instructions on big endian hosts
>
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> Fix emulation of MSA pack instructions on big endian hosts.
>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
>  target/mips/msa_helper.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 74 insertions(+)
>
> diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
> index a383c40..27560ac 100644
> --- a/target/mips/msa_helper.c
> +++ b/target/mips/msa_helper.c
> @@ -2113,6 +2113,24 @@ void helper_msa_pckev_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
>
>      switch (df) {
>      case DF_BYTE:
> +#if defined(HOST_WORDS_BIGENDIAN)
> +        pwd->b[8]  = pws->b[9];
> +        pwd->b[10] = pws->b[13];
> +        pwd->b[12] = pws->b[1];
> +        pwd->b[14] = pws->b[5];
> +        pwd->b[0]  = pwt->b[9];
> +        pwd->b[2]  = pwt->b[13];
> +        pwd->b[4]  = pwt->b[1];
> +        pwd->b[6]  = pwt->b[5];
> +        pwd->b[9]  = pws->b[11];
> +        pwd->b[13] = pws->b[3];
> +        pwd->b[1]  = pwt->b[11];
> +        pwd->b[5]  = pwt->b[3];
> +        pwd->b[11] = pws->b[15];
> +        pwd->b[3]  = pwt->b[15];
> +        pwd->b[15] = pws->b[7];
> +        pwd->b[7]  = pwt->b[7];
> +#else
>          pwd->b[15] = pws->b[14];
>          pwd->b[13] = pws->b[10];
>          pwd->b[11] = pws->b[6];
> @@ -2129,8 +2147,19 @@ void helper_msa_pckev_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
>          pwd->b[4]  = pwt->b[8];
>          pwd->b[8]  = pws->b[0];
>          pwd->b[0]  = pwt->b[0];
> +#endif
>          break;
>      case DF_HALF:
> +#if defined(HOST_WORDS_BIGENDIAN)
> +        pwd->h[4] = pws->h[5];
> +        pwd->h[6] = pws->h[1];
> +        pwd->h[0] = pwt->h[5];
> +        pwd->h[2] = pwt->h[1];
> +        pwd->h[5] = pws->h[7];
> +        pwd->h[1] = pwt->h[7];
> +        pwd->h[7] = pws->h[3];
> +        pwd->h[3] = pwt->h[3];
> +#else
>          pwd->h[7] = pws->h[6];
>          pwd->h[5] = pws->h[2];
>          pwd->h[3] = pwt->h[6];
> @@ -2139,12 +2168,20 @@ void helper_msa_pckev_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
>          pwd->h[2] = pwt->h[4];
>          pwd->h[4] = pws->h[0];
>          pwd->h[0] = pwt->h[0];
> +#endif
>          break;
>      case DF_WORD:
> +#if defined(HOST_WORDS_BIGENDIAN)
> +        pwd->w[2] = pws->w[3];
> +        pwd->w[0] = pwt->w[3];
> +        pwd->w[3] = pws->w[1];
> +        pwd->w[1] = pwt->w[1];
> +#else
>          pwd->w[3] = pws->w[2];
>          pwd->w[1] = pwt->w[2];
>          pwd->w[2] = pws->w[0];
>          pwd->w[0] = pwt->w[0];
> +#endif
>          break;
>      case DF_DOUBLE:
>          pwd->d[1] = pws->d[0];
> @@ -2164,6 +2201,24 @@ void helper_msa_pckod_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
>
>      switch (df) {
>      case DF_BYTE:
> +#if defined(HOST_WORDS_BIGENDIAN)
> +        pwd->b[7]  = pws->b[6];
> +        pwd->b[5]  = pws->b[2];
> +        pwd->b[3]  = pws->b[14];
> +        pwd->b[1]  = pws->b[10];
> +        pwd->b[15] = pwt->b[6];
> +        pwd->b[13] = pwt->b[2];
> +        pwd->b[11] = pwt->b[14];
> +        pwd->b[9]  = pwt->b[10];
> +        pwd->b[6]  = pws->b[4];
> +        pwd->b[2]  = pws->b[12];
> +        pwd->b[14] = pwt->b[4];
> +        pwd->b[10] = pwt->b[12];
> +        pwd->b[4]  = pws->b[0];
> +        pwd->b[12] = pwt->b[0];
> +        pwd->b[0]  = pws->b[8];
> +        pwd->b[8]  = pwt->b[8];
> +#else
>          pwd->b[0]  = pwt->b[1];
>          pwd->b[2]  = pwt->b[5];
>          pwd->b[4]  = pwt->b[9];
> @@ -2180,8 +2235,19 @@ void helper_msa_pckod_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
>          pwd->b[11] = pws->b[7];
>          pwd->b[7]  = pwt->b[15];
>          pwd->b[15] = pws->b[15];
> +#endif
>          break;
>      case DF_HALF:
> +#if defined(HOST_WORDS_BIGENDIAN)
> +        pwd->h[3] = pws->h[2];
> +        pwd->h[1] = pws->h[6];
> +        pwd->h[7] = pwt->h[2];
> +        pwd->h[5] = pwt->h[6];
> +        pwd->h[2] = pws->h[0];
> +        pwd->h[6] = pwt->h[0];
> +        pwd->h[0] = pws->h[4];
> +        pwd->h[4] = pwt->h[4];
> +#else
>          pwd->h[0] = pwt->h[1];
>          pwd->h[2] = pwt->h[5];
>          pwd->h[4] = pws->h[1];
> @@ -2190,12 +2256,20 @@ void helper_msa_pckod_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
>          pwd->h[5] = pws->h[3];
>          pwd->h[3] = pwt->h[7];
>          pwd->h[7] = pws->h[7];
> +#endif
>          break;
>      case DF_WORD:
> +#if defined(HOST_WORDS_BIGENDIAN)
> +        pwd->w[1] = pws->w[0];
> +        pwd->w[3] = pwt->w[0];
> +        pwd->w[0] = pws->w[2];
> +        pwd->w[2] = pwt->w[2];
> +#else
>          pwd->w[0] = pwt->w[1];
>          pwd->w[2] = pws->w[1];
>          pwd->w[1] = pwt->w[3];
>          pwd->w[3] = pws->w[3];
> +#endif
>          break;
>      case DF_DOUBLE:
>          pwd->d[0] = pwt->d[1];
> --
> 2.7.4

Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>

Re: [Qemu-devel] [PATCH for 4.1 v4 1/5] target/mips: Add 'fall through' comments for handling nanoMips' SHXS, SWXS

[Aleksandar Rikalo]

> From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
> Sent: Monday, July 15, 2019 10:00 PM
> To: qemu-devel@nongnu.org
> Cc: sw@weilnetz.de; Aleksandar Markovic; Aleksandar Rikalo
> Subject: [PATCH for 4.1 v4 1/5] target/mips: Add 'fall through' comments for handling nanoMips' SHXS, SWXS
>
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> This was found by GCC 8.3 static analysis.
>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
>  target/mips/translate.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index f96f141..2be5e2d 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -20136,12 +20136,14 @@ static void gen_p_lsx(DisasContext *ctx, int rd, int rs, int rt)
>          switch (extract32(ctx->opcode, 7, 4)) {
>          case NM_SHXS:
>              check_nms(ctx);
> +            /* fall through */
>          case NM_LHXS:
>          case NM_LHUXS:
>              tcg_gen_shli_tl(t0, t0, 1);
>              break;
>          case NM_SWXS:
>              check_nms(ctx);
> +            /* fall through */
>          case NM_LWXS:
>          case NM_LWC1XS:
>          case NM_SWC1XS:
> --
> 2.7.4

Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>